Abstract: A method for helping to control a vehicle occupant protection device (22) includes taking an image of the vehicle interior with a digital imager (50) having an array of pixels (53). A contiguous portion of the image less than the entire image is selected. At least one image enhancement technique is applied to the selected image portion. The enhanced image portion is combined with the other portions of the image to make an enhanced image. The enhanced image is analyzed to detect at least one of features and characteristics of the enhanced image. Alternatively, a selected non-contiguous group of the pixels (53) of the imager (50) are read out, as representative of the entire image, to estimate the illumination levels across the entire array of pixels. In one aspect, the imager shutter (56) speed may be controlled to enhance the image.

Abstract: An imaging system (50) for providing vehicle security and convenience features that employs face recognition software to identify and track a person. The system (50) employs infrared emitters (30) that emit an infrared signal along a predetermined field-of-view, and an infrared sensor (34), such as a CMOS sensor used as a video signal array, that receives reflected infrared illumination from objects in the field-of-view. A processor (52) including the face recognition software, is employed to detect human faces to identify and track the person. Once a face is detected, it can be compared to a data base to identify the person.

Abstract: A vehicle occupant airbag deployment system (50) that detects, identifies and tracks a person (16) in the passenger seat (18) of a vehicle (12), and provides a signal for no fire, soft fire or hard fire of the airbag (20) depending on the location of the person (16) in a crash event. The airbag deployment system (50) employs infrared emitters (30) that emit an infrared signal towards the passenger seat (18) of the vehicle (12) and an infrared detector (34) that receive reflected radiation from objects in the seat (18). Processing circuitry (52), including face recognition software, is employed to detect human face features to provide the necessary detection and tracking of the person (16).

Abstract: A human presence detection system (50) that employs a frame differencing technique for subtracting out background interference from images generated by the system. The system (50) includes an infrared source (28) that generates a beam of infrared radiation, and an infrared detector (72) that receives infrared radiation reflected from objects in the path of the beam. Face recognition software is employed to determine the presence of a person (16) from the reflected radiation. The infrared source (28) is pulsed on and off and the detector (72) is synchronously shuttered to the pulses so that image frames are generated at different times, where one frame includes reflected radiation and background radiation and another frame includes only background radiation. The frames are subtracted to separate out the background radiation.

Abstract: The present invention relates to a system and methodology to reduce size, weight and cost, improve data processing rates and serviceability, and accommodate higher I/O multi-chip modules (MCMs) for printed circuit board (PCB) assemblies employed in the electronics industry. This is accomplished by selecting low cost, pre-assembled, plastic chip type MCMs for constructing a daughter card where the daughter card material can accommodate high density lines and spaces. Optical interconnects are employed between the daughter card and the motherboard to provide a high speed interface that is substantially not effected by contaminates or limitations associated with electrical lead wires and solder bonds. The result is a high performance card that meets current and projected future demands in signal processing.

Abstract: An imaging system (50) for providing vehicle safety features that employs face recognition software to identify and track a person. The system (50) employs infrared emitters (30) that emit an infrared signal along a predetermined field-of-view, and an infrared sensor (34), such as a CMOS sensor used as a video signal array, that receives reflected infrared illumination from objects in the field-of-view. A processor (52) including the face recognition software, is employed to detect human faces to identify and track the person. Once a face is detected, it can be compared to a data base to identify the person. Various applications for the imaging system (50) for providing vehicle safety features include identifying the driver or passenger for personalizing the vehicle's airbags, providing pre-crash collision avoidance, providing blind spot detection, providing vehicle crash recording, and providing a warning signal if the driver appears drowsy.

Abstract: A method for helping to control a vehicle occupant protection device (22) includes taking an image of the vehicle interior with a digital imager (50) having an array of pixels (53). A contiguous portion of the image less than the entire image is selected. At least one image enhancement technique is applied to the selected image portion. The enhanced image portion is combined with the other portions of the image to make an enhanced image. The enhanced image is analyzed to detect at least one of features and characteristics of the enhanced image. Alternatively, a selected non-contiguous group of the pixels (53) of the imager (50) are read out, as representative of the entire image, to estimate the illumination levels across the entire array of pixels. In one aspect, the imager shutter (56) speed may be controlled to enhance the image.

Abstract: A system for providing recognition of an approaching object located in a distant no-light environment includes an illumination source for transmitting light to the distant object and an imaging device for detecting the light radiation reflected from the distant object to generate an image of the distant object corresponding thereto. The system also includes an independent digital signal processor for calculating a desired optical magnification of a lens of the imaging device as a function of a distance between the imaging device and the distant object and generates a voltage corresponding thereto. The digital signal processor applies the voltage to the digital zoom circuitry of the imaging device to adjust the magnification of the lens so that the image of the distant object is held in a fixed dimension.

Abstract: A system for providing recognition of an approaching object located in a distant no-light environment includes an illumination source for transmitting light to the distant object and an imaging device for detecting the light radiation reflected from the distant object to generate an image of the distant object corresponding thereto. The system also includes an independent digital signal processor for calculating a desired optical magnification of a lens of the imaging device as a function of a distance between the imaging device and the distant object and generates a voltage corresponding thereto. The digital signal processor applies the voltage to the digital zoom circuitry of the imaging device to adjust the magnification of the lens so that the image of the distant object is held in a fixed dimension.

Abstract: A complementary heterojunction field effect transistor (CHFET) in which the channels for the p-FET device and the n-FET device forming the complementary FET are formed from gallium antimonide (GaSb) or indium antimonide (InSb). An n-type HFET structure is grown, for example, by molecular beam epitaxy (MBE) in order to obtain the highest electron or hole mobility. The complementary p-type HFET is formed by p-type doping of a cap layer thereby eliminating the need for two implants for channel doping. In order to reduce the complexity of the process for making the CHFET, a common gold germanium alloy contact is used for both the p and n-type channel devices, thereby eliminating the need for separate ohmic contacts, resulting in a substantial reduction in the number of mask levels and, thus, complexity in fabricating the device.

Abstract: An RF switch formed as a micro electro-mechanical switch (MEMS) which can be configured in an array forming a micro electro-mechanical switch array (MEMSA). The MEMS is formed on a substrate. A pin, pivotally carried by the substrate defines a pivot point. A rigid beam or transmission line is generally centrally disposed on the pin forming a teeter-totter configuration. The use of a rigid beam and the configuration eliminates the torsional and bending forces of the beam which can reduce reliability. The switch is adapted to be monolithically integrated with other monolithic microwave integrated circuits (MMIC) for example from HBTs and HEMTs, by separating such MMICs from the switch by way of a suitable polymer layer, such as polyimide, enabling the switch to be monolithically integrated with other circuitry. In order to reduce insertion losses, the beam is formed from all metal, which improves the sensitivity of the switch and also allows the switch to be used in RF switching applications.

Abstract: A complementary heterojunction field effect transistor (CHFET) in which the channels for the p-FET device and the n-FET device forming the complementary FET are formed from gallium antimonide (GaSb) or indium antimonide (InSb). An n-type HFET structure is grown, for example, by molecular beam epitaxy (MBE) in order to obtain the highest electron or hole mobility. The complementary p-type HFET is formed by p-type doping of a cap layer thereby eliminating the need for two implants for channel doping. In order to reduce the complexity of the process for making the CHFET, a common gold germanium alloy contact is used for both the p and n-type channel devices, thereby eliminating the need for separate ohmic contacts, resulting in a substantial reduction in the number of mask levels and, thus, complexity in fabricating the device.

Abstract: A switched resonator formed from a series capacitor and a single microstrip transmission line with a plurality of RF switches to connect it to ground along its length. The microstrip transmission line is grounded at one end and the RF switches are used to tune its length. The other end of the microstrip transmission line is connected to the capacitor to form a resonator. The resonant frequency of the resonator is varied by grounding the center conductor through RF switches connected to ground at different points along its length, which effectively varies the electrical length of the transmission line connected to the capacitor thereby forming a switched resonator. The switched resonator is suitable for use with a single VCO to provide relatively wideband tuning of the significantly reduced size due to the use of a single VCO.

Abstract: A complementary heterojunction field effect transistor (CHFET) in which the channels for the p-FET device and the n-FET device forming the complementary FET are formed from gallium antimonide (GaSb) or indium antimonide (InSb). An n-type HFET structure is grown, for example, by molecular beam epitaxy (MBE) in order to obtain the highest electron or hole mobility. The complementary p-type HFET is formed by p-type doping of a cap layer thereby eliminating the need for two implants for channel doping. In order to reduce the complexity of the process for making the CHFET, a common gold germanium alloy contact is used for both the p and n-type channel devices, thereby eliminating the need for separate ohmic contacts, resulting in a substantial reduction in the number of mask levels and, thus, complexity in fabricating the device.

Abstract: Disclosed is a method for producing ultra dense and ultra fast integrated circuits utilizing an advanced ion beam processing system. An exposure chamber which supports a focused ion beam column and an ancillary chamber, both of which are maintained under ultra high vacuum are utilized to perform resistless in-situ etching, deposition, implantation and oxidation processes. By performing these processes within the exposure chamber and the ancillary chamber which contains various connecting chambers, ultra dense and ultra fast integrated circuits can be produced with reduced manufacturing steps thereby increasing production yield and throughput.

Abstract: A monolithic high frequency downconverter which utilizes a three-stage low-noise amplifier, a singly balanced mixer, and a two-stage intermediate frequency amplifier. The downconverter is suitable for applications in a range of systems utilizing EHF frequencies, such as satellites, or phased array antennas. Other applications include RF front end of smart weapons operating at frequencies ranging from 35 to 94 GHz, and avionic systems employing channelized receivers and EW (electronic warfare) systems. The three-stage low-noise amplifier employs four-gate finger HEMT devices for reduced gate resistance and source impedance matching. The singly balanced active HEMT mixer employs a compact 180.sub.-- rat-race hybrid ring which significantly reduces the chip size and provides low conversion loss, high LO to RF isolation, high output, IP.sub.3 and high-spur rejection as compared to single-ended mixer designs.

Abstract: A transistor according to the invention for simultaneously providing at least two current-voltage characteristics includes a base, a collector, and an emitter. At least one of the base, collector, and emitter includes a first layer grown using molecular beam epitaxy (MBE). The first layer includes a first strip having a first doping characteristic created using focused ion beam processing. A second strip has a second doping characteristic created by focused ion beam processing. A middle section of undoped material is located between the first and second strips. A resonant tunneling junction is grown on the first layer using MBE and includes a plurality of layers.

Abstract: A focal plane imaging array (FPIA) (16) for use in a direct detection imaging device (10) for conducting radiometric imaging at microwave and millimeter-wave frequencies is disclosed as having an internal electronic calibration source (36). The plurality of energy detecting pixel elements (14) which comprise the FPIA (16) include a detection circuit (34) and a calibration circuit (36). The calibration circuit (36) is uni-directionally coupled to the detection circuit (34) to allow a known calibration signal "pulse" to be introduced into the detection circuit (34). The calibration pulse is processed by the pixel detection circuit and the output signal is compared with the pixel's responsivity value. Adjustments in the pixel gain and sensitivity may then be made as appropriate.

Abstract: A field-effect transistor (FET) and a corresponding method for its fabrication, the transistor having a source and a gate located at opposite faces of an active channel region formed in a substrate, the source being substantially shorter in effective length than the gate and located symmetrically with respect to the gate. The transistor also has two drains, located one at each end of the channel region, and charge carriers flow from the source to the drains in two paths, under control of the same gate. Electrical contact with the source is made from beneath the substrate, while contact with the gate and drains is made from above. The resulting device has a large incremental transconductance and relatively small parasitic impedances, and therefore can operate at much higher frequencies than conventional FET's.

Abstract: A high electron mobility transistor (HEMT) structure, and a corresponding method for its fabrication, in which the maximum power output is increased by a factor of approximately two. The structure includes a stop etch layer, which is of aluminum arsenide in the disclosed embodiment, and which functions both to facilitate selective etching during fabrication and, because of its relatively wide band-gap, as a current confinement layer during operation. Since the current confinement action has a detrimental effect in the region of the source contact of the device, by tending to raise the source resistance and the threshold voltage at which current saturation occurs, this effect is avoided by aligning the source region with an edge of the gate electrode during fabrication, to minimize the source resistance and the threshold voltage for maximum current saturation.