Patents by Inventor John J. Vaglica
John J. Vaglica has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9824242Abstract: A storage location of a device that can be configured to act as a master in a particular security mode, such as a Direct Memory Access (DMA) having one or more channels, can be programmed to indicate a security indicator to be provided when configured to operate as a master device.Type: GrantFiled: July 27, 2015Date of Patent: November 21, 2017Assignee: NXP USA, INC.Inventors: Joseph C. Circello, Daniel M. McCarthy, John D. Mitchell, Peter J. Wilson, John J. Vaglica
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Patent number: 9392640Abstract: A method and apparatus automatically controls the insertion of information flow data over a shared CPRI link (561) by providing a hardware control mechanism (504-509) at a local radio base station subsystem (501) connected in a CPRI daisy chain configuration between a downstream RE device (570) and an upstream REC device (560) for determining whether the control word being transmitted is sourced from a downstream device (e.g., forwarded data from a downstream RE device) or from the local device.Type: GrantFiled: October 1, 2012Date of Patent: July 12, 2016Assignee: FREESCALE SEMICONDUCTOR, INC.Inventors: Tuongvu V. Nguyen, John J. Vaglica, Roy Shor, Somvir Dahiya, Ori Goren, Avraham Horn, Arvind Kaushik, Arindam Sinha, Puneet Wadhawan
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Patent number: 9219540Abstract: A method and apparatus for a radio base station (300) aligns IQ data blocks for transmission over multiple radio frequency (RF) signal paths (318, 328, 338) between a base station controller (304) and a plurality of antennas (340) at the base station by determining a path delay (317, 327, 337) for each RF signal path, and then transmitting IQ data blocks from JESD 204 transmit interfaces (301-303) over each RF signal path ahead of a first predetermined time slot by an advance time period equaling the path delay for each RF signal path, thereby aligning IQ data block signaling to the first predetermined time slot at the antennas.Type: GrantFiled: July 20, 2012Date of Patent: December 22, 2015Assignee: Freescale Semiconductor, Inc.Inventors: Mieu Van V. Vu, John J. Vaglica
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Patent number: 9198224Abstract: A cellular mobile station including a modem processor and memory. The memory includes instructions for the modem processor to perform layer 1 processor operations, layer 2 processor operations, and layer 3 processor operations. The modem processor executes the instructions to perform processor operations for the cellular mobile station to communication data as per a cellular communications protocol. In one example, the mobile station includes different levels of memory to provide different deterministic access times.Type: GrantFiled: February 5, 2012Date of Patent: November 24, 2015Inventors: John J. Vaglica, Christopher K. Y. Chun, Jose G. Corleto-Mena, Arnaldo R. Cruz, Jianping Tao, Mieu V. Vu, Mark E. Elledge, Charbel Khawand, Arthur M. Goldberg, David J. Hayes
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Publication number: 20150332069Abstract: A storage location of a device that can be configured to act as a master in a particular security mode, such as a Direct Memory Access (DMA) having one or more channels, can be programmed to indicate a security indicator to be provided when configured to operate as a master device.Type: ApplicationFiled: July 27, 2015Publication date: November 19, 2015Inventors: Joseph C. Circello, Daniel M. McCarthy, John D. Mitchell, Peter J. Wilson, John J. Vaglica
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Patent number: 9092647Abstract: A storage location of a device that can be configured to act as a master in a particular security mode, such as a Direct Memory Access (DMA) having one or more channels, can be programmed to indicate a security indicator to be provided when configured to operate as a master device.Type: GrantFiled: March 7, 2013Date of Patent: July 28, 2015Assignee: Freescale Semiconductor, Inc.Inventors: Joseph C. Circello, Daniel M. McCarthy, John D. Mitchell, Peter J. Wilson, John J. Vaglica
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Patent number: 8964791Abstract: A method and apparatus automatically maintains a JESD204 serial data link (252) as active by using an idle signal (254) and multiplexer selection circuit (247) to selectively switch signal data samples (246) and dummy samples (0, . . . 0) onto a serial interface input to a JESD module (248) for serialization into a plurality of symbols for transmission over the JESD204 serial data link (252) in response to a transmit clock signal (253) so that serialized symbols generated from signal data samples are transmitted when there are signal data samples available, and serialized symbols generated from dummy samples are transmitted when there are no signal data samples available.Type: GrantFiled: October 11, 2012Date of Patent: February 24, 2015Assignee: Freescale Semiconductor, Inc.Inventors: Mieu Van Vu, John J. Vaglica
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Publication number: 20140259149Abstract: A storage location of a device that can be configured to act as a master in a particular security mode, such as a Direct Memory Access (DMA) having one or more channels, can be programmed to indicate a security indicator to be provided when configured to operate as a master device.Type: ApplicationFiled: March 7, 2013Publication date: September 11, 2014Inventors: Joseph C. Circello, Daniel M. McCarthy, John D. Mitchell, Peter J. Wilson, John J. Vaglica
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Publication number: 20140105101Abstract: A method and apparatus automatically maintains a JESD204 serial data link (252) as active by using an idle signal (254) and multiplexer selection circuit (247) to selectively switch signal data samples (246) and dummy samples (0, . . . 0) onto a serial interface input to a JESD module (248) for serialization into a plurality of symbols for transmission over the JESD204 serial data link (252) in response to a transmit clock signal (253) so that serialized symbols generated from signal data samples are transmitted when there are signal data samples available, and serialized symbols generated from dummy samples are transmitted when there are no signal data samples available.Type: ApplicationFiled: October 11, 2012Publication date: April 17, 2014Applicant: FREESCALE SEMICONDUCTOR, INC.Inventors: Mieu Van Vu, John J. Vaglica
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Publication number: 20140094157Abstract: A method and apparatus automatically controls the insertion of information flow data over a shared CPRI link (561) by providing a hardware control mechanism (504-509) at a local radio base station subsystem (501) connected in a CPRI daisy chain configuration between a downstream RE device (570) and an upstream REC device (560) for determining whether the control word being transmitted is sourced from a downstream device (e.g., forwarded data from a downstream RE device) or from the local device.Type: ApplicationFiled: October 1, 2012Publication date: April 3, 2014Applicant: FREESCALE SEMICONDUCTOR, INC.Inventors: Tuongvu V. Nguyen, John J. Vaglica, Roy Shor, Somvir Dahiya, Ori Goren, Avraham Horn, Arvind Kaushik, Arindam Sinha, Puneet Wadhawan
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Publication number: 20140023048Abstract: A method and apparatus for a radio base station (300) aligns IQ data blocks for transmission over multiple radio frequency (RF) signal paths (318, 328, 338) between a base station controller (304) and a plurality of antennas (340) at the base station by determining a path delay (317, 327, 337) for each RF signal path, and then transmitting IQ data blocks from JESD 204 transmit interfaces (301-303) over each RF signal path ahead of a first predetermined time slot by an advance time period equaling the path delay for each RF signal path, thereby aligning IQ data block signaling to the first predetermined time slot at the antennas.Type: ApplicationFiled: July 20, 2012Publication date: January 23, 2014Inventors: Mieu Van V. Vu, John J. Vaglica
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Patent number: 8332641Abstract: Under the direction of a first party, an integrated circuit (IC) device is configured to temporarily enable access to a debug interface of the IC device via authentication of the first party by a challenge/response process using a key of the IC device and a challenge value generated at the IC device. The first party then may conduct a software evaluation of the IC device via the debug interface. In response to failing to identify an issue with the IC device from the software evaluation, the first party can permanently enable open access to the debug interface while authenticated and provide the IC device to a second party. Under the direction of the second party, a hardware evaluation of the IC device is conducted via the debug interface that was permanently opened by the first party.Type: GrantFiled: January 30, 2009Date of Patent: December 11, 2012Assignee: Freescale Semiconductor, Inc.Inventors: Lawrence L. Case, Asaf Ashkenazi, Ruchir Chhabra, Carlin R. Covey, David H. Hartley, Troy E. Mackie, Alistair N. Muir, Mark D. Redman, Thomas E. Tkacik, John J. Vaglica, Rodney D. Ziolkowski
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Publication number: 20120183029Abstract: A cellular mobile station including a modem processor and memory. The memory includes instructions for the modem processor to perform layer 1 processor operations, layer 2 processor operations, and layer 3 processor operations. The modem processor executes the instructions to perform processor operations for the cellular mobile station to communication data as per a cellular communications protocol.Type: ApplicationFiled: February 5, 2012Publication date: July 19, 2012Applicant: FREESCALE SEMICONDUCTOR, INC.Inventors: John J. Vaglica, Christopher K. Y. Chun, Jose G. Corleto-Mena, Arnaldo R. Cruz, Jianping Tao, Mieu V. Vu, Mark E. Elledge, Charbel Khawand, Arthur M. Goldberg, David J. Hayes
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Patent number: 8131316Abstract: A cellular mobile station including a modem processor and memory. The memory includes instructions for the modem processor to perform layer 1 processor operations, layer 2 processor operations, and layer 3 processor operations. The modem processor executes the instructions to perform processor operations for the cellular mobile station to communication data as per a cellular communications protocol. In one example, the mobile station includes different levels of memory to provide different deterministic access times.Type: GrantFiled: October 26, 2009Date of Patent: March 6, 2012Assignee: Freescale Semiconductor, Inc.Inventors: John J. Vaglica, Christopher K. Y. Chun, Jose G. Corleto-Mena, Arnaldo R. Cruz, Jianping Tao, Mieu V. Vu, Mark E. Elledge, Charbel Khawand, Arthur M. Goldberg, David J. Hayes
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Patent number: 7802038Abstract: New approaches for providing communication between multiple masters (12, 14) and one or more shared resources (24, 30, 100) are needed. One example of a resource that may need to be shared is circuitry complying with the Universal Serial Bus (USB) standard (100). The USB specification defines the use of USB endpoints as data and control channels that reside in a USB device. In some cases it is desirable to have a certain number of endpoints controlled by one processor, and other endpoints controlled by a different processor, thus providing a shared control of all the endpoints. Circuitry (402, 417, 480) may be used to provide steering for additional signals such as interrupts. Other shared resources (24, 30) may use more centralized circuitry (36) to perform a steering function for additional signals.Type: GrantFiled: November 21, 2008Date of Patent: September 21, 2010Assignee: Freescale Semiconductor, Inc.Inventors: Ryan D. Bedwell, Arnold R. Cruz, John J. Vaglica, William C. Moyer
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Patent number: 7773714Abstract: The invention concerns a method (500) for employing adaptive event codes. The method includes the steps of generating (512) at least one adaptive event code in which the adaptive event code corresponds to a preexisting event code, storing (514) the adaptive event code in at least one table (154, 156), running (516) the table in which the adaptive event codes are at least initially disabled and enabling (522) the adaptive event code in response to a system event in which the preexisting event code that corresponds to the enabled adaptive event code is executed (526). The method can further include the step of ignoring (518) the adaptive event codes during the running step when the adaptive event codes are disabled.Type: GrantFiled: December 29, 2003Date of Patent: August 10, 2010Assignee: Motorola, Inc.Inventors: Charbel Khawand, Jianping Tao, John J. Vaglica
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Publication number: 20100199077Abstract: Under the direction of a first party, an integrated circuit (IC) device is configured to temporarily enable access to a debug interface of the IC device via authentication of the first party by a challenge/response process using a key of the IC device and a challenge value generated at the IC device. The first party then may conduct a software evaluation of the IC device via the debug interface. In response to failing to identify an issue with the IC device from the software evaluation, the first party can permanently enable open access to the debug interface while authenticated and provide the IC device to a second party. Under the direction of the second party, a hardware evaluation of the IC device is conducted via the debug interface that was permanently opened by the first party.Type: ApplicationFiled: January 30, 2009Publication date: August 5, 2010Applicant: FREESCALE SEMICONDUCTOR, INC.Inventors: Lawrence L. Case, Asaf Ashkenazi, Ruchir Chhabra, Carlin R. Covey, David H. Hartley, Troy E. Mackie, Alistair N. Muir, Mark D. Redman, Thomas E. Tkacik, John J. Vaglica, Rodney D. Ziolkowski
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Publication number: 20100113003Abstract: A cellular mobile station including a modem processor and memory. The memory includes instructions for the modem processor to perform layer 1 processor operations, layer 2 processor operations, and layer 3 processor operations. The modem processor executes the instructions to perform processor operations for the cellular mobile station to communication data as per a cellular communications protocol.Type: ApplicationFiled: October 26, 2009Publication date: May 6, 2010Applicant: FREESCALE SIMICONDUCTOR, INC.Inventors: JOHN J. VAGLICA, CHRISTOPHER K. Y. CHUN, JOSE G. CORLETO-MENA, ARMALDO R. CRUZ, JIANPING TAO, MIEU V. VU, MARK E. ELLEDGE, CHARBEL KHAWAND, ARTHUR M. GOLDBERG, DAVID J. HAYES
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Patent number: 7623894Abstract: A cellular mobile station including a modem processor and memory. The memory includes instructions for the modem processor to perform layer 1 processor operations, layer 2 processor operations, and layer 3 processor operations. The modem processor executes the instructions to perform processor operations for the cellular mobile station to communication data as per a cellular communications protocol. In one example, the mobile station includes different levels of memory to provide different deterministic access times.Type: GrantFiled: October 9, 2003Date of Patent: November 24, 2009Assignee: Freescale Semiconductor, Inc.Inventors: John J. Vaglica, Christopher K. Y. Chun, Jose G. Corleto-Mena, Arnaldo R. Cruz, Jianping Tao, Mieu V. Vu, Mark E. Elledge, Charbel Khawand, Arthur M. Goldberg, David J. Hayes
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Publication number: 20090077291Abstract: New approaches for providing communication between multiple masters (12, 14) and one or more shared resources (24, 30, 100) are needed. One example of a resource that may need to be shared is circuitry complying with the Universal Serial Bus (USB) standard (100). The USB specification defines the use of USB endpoints as data and control channels that reside in a USB device. In some cases it is desirable to have a certain number of endpoints controlled by one processor, and other endpoints controlled by a different processor, thus providing a shared control of all the endpoints. Circuitry (402, 417, 480) may be used to provide steering for additional signals such as interrupts. Other shared resources (24, 30) may use more centralized circuitry (36) to perform a steering function for additional signals.Type: ApplicationFiled: November 21, 2008Publication date: March 19, 2009Applicant: Freescale Semiconductor, Inc.Inventors: Ryan D. Bedwell, Arnaldo R. Cruz, John J. Vaglica, William C. Moyer