Patents by Inventor John L. Melanson

John L. Melanson has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12047086
    Abstract: A digital-to-analog converter may include an integrator, an input network comprising a plurality of parallel taps, each member of the plurality of parallel taps comprising a respective input resistance, and control circuitry configured to selectively enable and selectively disable particular members of the plurality of parallel taps in order to program an effective input resistance of the input network to control an analog gain of the digital-to-analog converter.
    Type: Grant
    Filed: November 3, 2022
    Date of Patent: July 23, 2024
    Assignee: Cirrus Logic Inc.
    Inventors: Paul M. Astrachan, Lingli Zhang, John L. Melanson, James Kelton
  • Publication number: 20240226960
    Abstract: This application relates to methods and apparatus for driving a transducer with switching drivers. A driver circuit has first and second switching drivers for driving the transducer in a bridge-tied-load configuration, each of the switching drivers having a respective output stage for controllably switching the respective driver output node between high and low switching voltages with a controlled duty cycle. Each of switching drivers is operable in a plurality of different driver modes, wherein the switching voltages are different in said different driver modes. A controller controls the driver mode of operation and the duty cycle of the switching drivers based on the input signal. The controller is configured to control the duty cycles of the first and second switching drivers within defined minimum and maximum limits of duty cycles; and to transition between driver modes of operation when the duty cycle of one of the switching drivers reaches a duty cycle limit.
    Type: Application
    Filed: March 25, 2024
    Publication date: July 11, 2024
    Applicant: Cirrus Logic International Semiconductor Ltd.
    Inventors: Axel THOMSEN, Eric J. KING, Anthony S. DOY, Thomas H. HOFF, John L. MELANSON
  • Patent number: 12009829
    Abstract: A digital-to-analog converter may include an integrator, an input network comprising a plurality of parallel taps, each member of the plurality of parallel taps having a signal delay such that at least two of the signal delays of the members of the plurality of parallel taps are different, and wherein each member of the plurality of parallel taps is coupled between an input of the digital-to-analog converter and an input of the integrator, and control circuitry configured to selectively enable and disable particular members of the plurality of parallel taps in order to program an effective input resistance of the input network to control an analog gain of the digital-to-analog converter, such that the control circuitry enables an even number of members at a time, with half of such enabled members in a first group and half of such enabled members in a second group.
    Type: Grant
    Filed: November 3, 2022
    Date of Patent: June 11, 2024
    Assignee: Cirrus Logic Inc.
    Inventors: John L. Melanson, Lingli Zhang, Paul M. Astrachan, James Kelton
  • Publication number: 20240187205
    Abstract: A system may include a plurality of devices coupled to one another via a shared digital wired communication link, the plurality of devices comprising a first device configured to periodically transmit a synchronization packet onto the shared digital wired communication link to synchronize other of the plurality of devices to a reference clock of the first device, a second device configured to receive the synchronization packet and transmit one or more first data packets onto the shared digital wired communication link in response to the synchronization packet, and a third device configured to receive the synchronization packet and transmit one or more second data packets onto the shared digital wired communication link in response to the synchronization packet and the one or more second data packets.
    Type: Application
    Filed: September 21, 2023
    Publication date: June 6, 2024
    Applicant: Cirrus Logic International Semiconductor Ltd.
    Inventors: Jeffrey SKARZYNSKI, Wai-Shun SHUM, Amar VELLANKI, Venugopal CHOUKINISHI, Xin ZHAO, John L. MELANSON
  • Publication number: 20240178693
    Abstract: A system for controlling charging of a battery, the system comprising: charging circuitry for supplying a charging current or voltage to the battery, wherein the charging circuitry is configured to periodically detect an impedance of the battery and to control the charging current or voltage based on the detected impedance.
    Type: Application
    Filed: August 30, 2023
    Publication date: May 30, 2024
    Applicant: Cirrus Logic International Semiconductor Ltd.
    Inventors: Jeffrey D. ALDERSON, Jon D. HENDRIX, John L. MELANSON
  • Publication number: 20240168506
    Abstract: The present disclosure relates to circuitry for driving a load. The circuitry comprises: primary driver circuitry coupled to a primary signal path and operable to drive the load with a playback signal in a first mode of operation of the circuitry, wherein a playback signal comprises a signal that drives the load to generate a desired output; auxiliary driver circuitry coupled to an auxiliary signal path; an auxiliary current sense resistor in the auxiliary signal path; and current detection circuitry coupled to the auxiliary current sense resistor and configured to generate a signal indicative of a current through the load. One of the primary driver circuitry and the auxiliary driver circuitry is operable to drive the load with a pilot signal in a second mode of operation of the circuitry, wherein a pilot signal comprises a signal having a predefined frequency or frequency content and a predefined magnitude.
    Type: Application
    Filed: March 14, 2022
    Publication date: May 23, 2024
    Applicant: Cirrus Logic International Semiconductor Ltd.
    Inventors: Tejasvi DAS, Siddharth MARU, Cory J. PETERSON, John L. MELANSON
  • Patent number: 11990896
    Abstract: This application relates to methods and apparatus for driving a transducer with switching drivers. A switching driver has first and second supply node for receiving supply voltages and includes an output bridge stage, a capacitor and a network of switches. The network of switches is operable in different switch states to provide different switching voltages to the output bridge stage. A controller is configured to control the switch state of the network of switches and a duty cycle of output switches of the output bridge stage based on an input signal to generate an output signal for driving the transducer.
    Type: Grant
    Filed: July 27, 2022
    Date of Patent: May 21, 2024
    Assignee: Cirrus Logic Inc.
    Inventors: Axel Thomsen, Eric J. King, Thomas H. Hoff, John L. Melanson, Angus Black, Ross C. Morgan, Malcolm Blyth
  • Patent number: 11980913
    Abstract: This application relates to methods and apparatus for driving a transducer with switching drivers. A driver circuit has first and second switching drivers for driving the transducer in a bridge-tied-load configuration, each of the switching drivers having a respective output stage for controllably switching the respective driver output node between high and low switching voltages with a controlled duty cycle. Each of switching drivers is operable in a plurality of different driver modes, wherein the switching voltages are different in said different driver modes. A controller controls the driver mode of operation and the duty cycle of the switching drivers based on the input signal. The controller is configured to control the duty cycles of the first and second switching drivers within defined minimum and maximum limits of duty cycles; and to transition between driver modes of operation when the duty cycle of one of the switching drivers reaches a duty cycle limit.
    Type: Grant
    Filed: May 25, 2023
    Date of Patent: May 14, 2024
    Assignee: Cirrus Logic Inc.
    Inventors: Axel Thomsen, Eric J. King, Anthony S. Doy, Thomas H. Hoff, John L. Melanson
  • Publication number: 20240154201
    Abstract: A battery temperature control system for controlling a temperature of a battery of an electronic device, the battery temperature control system comprising: a heating component network comprising a heat-dissipating component; and a heating controller, wherein the heating controller is configured to: receive an indication of a temperature of the battery; and output a control signal to control operation of a heat dissipating component of the heating component network so as to dissipate heat to at least a portion of the battery.
    Type: Application
    Filed: September 20, 2023
    Publication date: May 9, 2024
    Applicant: Cirrus Logic International Semiconductor Ltd.
    Inventor: John L. MELANSON
  • Publication number: 20240151776
    Abstract: A method for estimating a battery state of charge may include determining a first estimated state of charge and a first estimated accuracy of the state of charge using a first estimation approach, determining a second estimated state of charge and a second estimated accuracy of the state of charge using a second estimation approach, and estimating the battery state of charge based on the first estimated state of charge, the first estimated accuracy of the state of charge, the second estimated state of charge, and the second estimated accuracy of the state of charge.
    Type: Application
    Filed: November 8, 2022
    Publication date: May 9, 2024
    Applicant: Cirrus Logic International Semiconductor Ltd.
    Inventors: Yandong ZHANG, John L. MELANSON
  • Publication number: 20240136930
    Abstract: A method for intelligently generating a stimulus for use in characterization of parameters of a model of a battery may include dynamically analyzing a current drawn from the battery by a load, based on analysis of the current, determining an augmented current for augmenting the current drawn by the load, and generating the augmented current based on a determined need to update the parameters.
    Type: Application
    Filed: August 24, 2023
    Publication date: April 25, 2024
    Applicant: Cirrus Logic International Semiconductor Ltd.
    Inventors: Samuel P. EBENEZER, Emmanuel A. MARCHAIS, Eric J. KING, John L. MELANSON
  • Patent number: 11933822
    Abstract: A method for estimating actuator parameters for an actuator, in-situ and in real-time, may include driving the actuator with a test signal imperceptible to a user of a device comprising the actuator during real-time operation of the device, measuring a voltage and a current associated with the actuator and caused by the test signal, determining one or more parameters of the actuator based on the voltage and the current, determining an actuator type of the actuator based on the one or more parameters, and controlling a playback signal to the actuator based on the actuator type.
    Type: Grant
    Filed: January 12, 2022
    Date of Patent: March 19, 2024
    Assignee: Cirrus Logic Inc.
    Inventors: Jorge L. Reynaga, Marco A. Janko, Emmanuel A. Marchais, John L. Melanson
  • Patent number: 11936373
    Abstract: Pre-conditioning circuitry for pre-conditioning a node of a circuit to support a change in operation of the circuit, wherein the circuit is operative to change a state of the node to effect the change in operation of the circuit, and wherein the pre-conditioning circuitry is configured to apply a voltage, current or charge directly to the node to reduce the magnitude of the change to the state of the node required by the circuit to achieve the change in operation of the circuit.
    Type: Grant
    Filed: June 24, 2021
    Date of Patent: March 19, 2024
    Assignee: Cirrus Logic Inc.
    Inventors: Hamed Sadati, John A. Breslin, Sushanth Hegde, John L. Melanson
  • Publication number: 20240080034
    Abstract: A method may include, for a signal path comprising a passive antialiasing filter sampled by a switched-capacitor front-end, monitoring a change of a first impedance of a resistor of the passive antialiasing filter responsive to an environmental condition relative to a second impedance of a switched capacitor of the switched-capacitor front end and compensating the signal path for a change in gain of the signal path resulting from the change of the first impedance.
    Type: Application
    Filed: September 7, 2022
    Publication date: March 7, 2024
    Applicant: Cirrus Logic International Semiconductor Ltd.
    Inventors: Arashk NOROUZPOURSHIRAZI, John L. MELANSON, Axel THOMSEN
  • Publication number: 20240072823
    Abstract: In accordance with embodiments of the present disclosure, a method may include, in a system comprising a differential filter comprising a plurality of impedance elements, applying a common-mode signal to the differential filter, measuring an output signal of the differential filter in response to the common-mode signal to determine an error due to impedance mismatch of the impedance elements, and tuning one or more of the plurality of impedance elements to minimize the error.
    Type: Application
    Filed: August 25, 2022
    Publication date: February 29, 2024
    Applicant: Cirrus Logic International Semiconductor Ltd.
    Inventors: Arashk NOROUZPOURSHIRAZI, John L. MELANSON, Axel THOMSEN
  • Publication number: 20240060920
    Abstract: A system may include a resonant sensor configured to sense a physical quantity, a measurement circuit communicatively coupled to the resonant sensor and configured to measure one or more resonance parameters associated with the resonant sensor and indicative of the physical quantity using an incident/quadrature detector having an incident channel and a quadrature channel and perform a calibration of a non-ideality between the incident channel and the quadrature channel of the system, the calibration comprising determining the non-ideality by controlling the sensor signal, an oscillation signal for the incident channel, and an oscillation signal for the quadrature channel; and correcting for the non-ideality.
    Type: Application
    Filed: September 19, 2023
    Publication date: February 22, 2024
    Applicant: Cirrus Logic International Semiconductor Ltd.
    Inventors: Tejasvi DAS, Siddharth MARU, John L. MELANSON
  • Patent number: 11906993
    Abstract: A feedforward correction block for use in a multi-level output system may include circuitry configured to determine an occurrence of a mode transition between operating modes of the multi-level output system, capture a loop filter output of a signal path of the multi-level output system occurring before and after the occurrence of the mode transition, and based on the transition and a change in the loop filter output responsive to the transition, determine a transition-specific compensation function to apply to a feedforward input signal of the signal path that is combined with the loop filter output.
    Type: Grant
    Filed: October 5, 2022
    Date of Patent: February 20, 2024
    Assignee: Cirrus Logic Inc.
    Inventors: John L. Melanson, Thomas H. Hoff
  • Publication number: 20240056039
    Abstract: Switching amplifier circuitry for driving an inductive load, the switching amplifier circuitry comprising modulator circuitry and output stage circuitry, wherein the switching amplifier circuitry is configured to: while the modulator circuitry is outputting a modulated output signal that gives rise to ripple current in the load: adjust a switching frequency of the modulator circuitry over a predetermined range of frequencies; monitor a power of the switching amplifier circuitry as the switching frequency is adjusted over the predetermined range of frequencies; and select, as an operational switching frequency for the modulator circuitry, a frequency within the predetermined range of frequencies at which the monitored power meets a predefined criterion.
    Type: Application
    Filed: August 11, 2022
    Publication date: February 15, 2024
    Applicant: Cirrus Logic International Semiconductor Ltd.
    Inventors: Matthew BEARDSWORTH, John L. MELANSON
  • Patent number: 11888492
    Abstract: A background offset calibration system for an analog signal comparator provides low offset without compromising tracking bandwidth. The comparator includes a preamplifier and a decision latch. A switching selectively couples outputs of an analog circuit to the inputs of the preamplifier stage. A state control logic alternatively operates the system in a first phase in which the analog circuit acquires an input signal while the comparator is calibrated, and a second phase in which a comparison is performed by the comparator. In the first phase, the switching circuit disconnects the outputs of the analog circuit from the preamplifier stage and applies a common mode reference to the inputs of the preamplifier. An offset correction circuit determines correction changes from a history of states of the decision latch across multiple sampling cycles. The offset correction circuit adjusts a threshold voltage of the decision latch by applying the correction changes.
    Type: Grant
    Filed: March 1, 2022
    Date of Patent: January 30, 2024
    Assignee: CIRRUS LOGIC, INC.
    Inventors: Jianping Wen, John L. Melanson
  • Publication number: 20230421951
    Abstract: Circuitry for acoustic crosstalk cancellation between first and second acoustic signals, the circuitry comprising: crosstalk cancellation circuitry configured to: receive a first audio signal and, based on the received first audio signal, generate a first crosstalk cancellation signal; receive a second audio signal and, based on the received second audio signal, generate a second crosstalk cancellation signal; combine the first crosstalk cancellation signal with a signal indicative of the second audio signal to generate a first crosstalk cancellation circuitry output signal; and combine the second crosstalk cancellation signal with a signal indicative of the first audio signal to generate a second crosstalk cancellation circuitry output signal; and output stage circuitry configured to: receive the first crosstalk cancellation circuitry output signal and, based on the received first crosstalk cancellation circuitry, generate a first drive signal for driving a first speaker to generate the first acoustic signal
    Type: Application
    Filed: June 23, 2022
    Publication date: December 28, 2023
    Applicant: Cirrus Logic International Semiconductor Ltd.
    Inventors: Dayong ZHOU, Brad ZWERNEMANN, Kaichow LAU, Dana J. TAIPALE, John L. MELANSON