Abstract: Driver circuitry for driving a load based on an input signal, comprising: at least one variable boost stage comprising: first and second input nodes configured to receive a first voltage and a second voltage respectively; first and second flying capacitor nodes for connection to a flying capacitor therebetween; a network of switching paths for selectively connecting the first and second input nodes with the first and second flying capacitor nodes; an output stage for selectively connecting a driver output node to each of the first and second flying capacitor nodes; and a controller operable in a first boost mode to: control the output stage to selectively connect the driver output node to the first flying capacitor node; control the network of switching paths to switch connection of the second flying capacitor node between the first and second input nodes at a controlled duty cycle; and in a first charge top-up cycle, control the network of switching paths to connect the first input node to the first flying c

Abstract: A system may include a digital delta-sigma modulator configured to receive a digital audio input signal and quantize the digital audio input signal into a quantized signal, a filter configured to receive the quantized signal and perform filtering on the quantized signal to generate a filtered quantized signal, the filter having a variable group delay, and a current-mode digital-to-analog converter configured to receive the filtered quantized signal and convert the filtered quantized signal into an equivalent current-mode analog audio signal.

Abstract: A method may include controlling commutation of a plurality of switches of an output stage comprising the plurality of switches in order to transfer charge between an energy storage device and a load to generate an output voltage across the load as an amplified version of an input signal, wherein the load comprises capacitive energy storage and controlling the power converter in order to regulate a cumulative electrical energy present in the system at an energy target, wherein the power converter is configured to transfer electrical energy from a source of electrical energy coupled to an input of the power converter to the energy storage device coupled to the output of the power converter and configured to store the electrical energy transferred from the source of electrical energy.

Abstract: A multi-path subsystem may include a first processing path, a second processing path, a mixed signal return path, and a calibration engine configured to: estimate and cancel a direct current (DC) offset of the mixed signal return path, estimate and cancel a DC offset between the first processing path and the second processing path, estimate and cancel a phase difference between the first processing path and a sum of the second processing path and the mixed signal return path, estimate and cancel a return path gain of the mixed signal return path, and track and correct for a gain difference between the first processing path and the second processing path.

Abstract: This application relates to methods and apparatus for driving a transducer with switching drivers where the switching driver has an output bridge stage for switching an output node between switching voltages and a modulator for controlling the duty cycle of the output bridge stage based on an input signal. The switching driver also includes a voltage controller for providing the switching voltages which is operable to provide different switching voltages in different driver modes. A controller is provided to control the driver mode of operation and the duty cycle of the switching driver based on the input signal, and the controller is configured to transition from a present driver mode to a new driver mode by controlling the voltage controller to provide the switching voltages for the new mode and controlling the modulator to vary the duty cycle of the output bridge stage. The change in duty cycle is controlled such that there is no substantial discontinuity in switching ripple due to the mode transition.

Abstract: A system may include an electromagnetic load capable of generating a haptic event and a haptic processor configured to receive at least one first parameter indicative of a desired perception of the haptic event to a user of a device comprising the electromagnetic load, receive at least one second parameter indicative of one or more characteristics of the device, and process the at least one first parameter and the at least one second parameter to generate a driving signal to the electromagnetic load in order to produce the desired perception to the user despite variances in the device that cause an actual perception of the haptic event to vary from the desired perception.

Abstract: A signal processing system may include a sensor readout channel configured to convert an electronic signal into a digital quantity, the sensor readout channel comprising an analog-to-digital converter (ADC) having an input and an output, first outside chopping switches located at the input of the ADC, and second outside chopping switches located at the output of the ADC. The ADC may comprise a memory element, first inside chopping switches located at the input of the memory element, and second inside chopping switches located at the output of the memory element. The first outside chopping switches, the second outside chopping switches, the first inside chopping switches, and the second inside chopping switches may be switched at the same frequency such that the memory element is swapped periodically in synchronization with the first outside chopping switches and second outside chopping switches.

Abstract: A signal processing system may include a sensor readout channel configured to convert an electronic signal into a digital quantity. The sensor readout channel may include a first-order sigma-delta modulator having a modulator input and a modulator output, first outside chopping switches located at the modulator input, second outside chopping switches located at the modulator output, an auxiliary path comprising an analog-to-digital converter (ADC) having an auxiliary path input and an auxiliary path output, the auxiliary path input configured to receive as its input signal a signal output by a memory element of the first-order sigma-delta modulator, and a signal combiner configured to combine a modulator output signal generated by the first-order sigma-delta modulator with an auxiliary path output signal generated by the auxiliary path to generate a combined output signal.

Abstract: A signal processing system may include a signal path and a chop management circuit. The signal path may comprise a chopper configured to chop a differential input signal to the signal path at a chopping frequency and a low-pass filter downstream of the chopper and configured to filter out intermodulation products of a direct current offset of the signal path and intermodulation products of an aggressor on the differential input signal in order to generate an output signal. The chop management circuit may be communicatively coupled to the chopper and configured to, based on operational parameters associated with the signal path, dynamically manage energy of one or more clock signals used to define the chopping frequency.

Abstract: A system may include a front end differential amplifier having two input terminals, two input resistors, each of the two input resistors coupled to a respective one of the two input terminals, and an input common mode biasing circuit for an output stage of the front end differential amplifier, the input common mode biasing circuit comprising two current sources configured to generate currents for biasing the output stage of the front end differential amplifier.

Abstract: Class-D amplifier circuits provide operation with low-distortion zero crossings outside of a unipolar power supply voltage range. The amplifiers include a first H-bridge driver circuit and a second H-bridge driver circuit. The class-D amplifier circuits also include a control circuit having an input for receiving an input signal to be reproduced by the class-D amplifier circuit. The control circuit has outputs coupled to inputs of the first and second H-bridge drivers, and includes one or more modulators. The control circuit selects between actively operating a selected one of the driver circuits or both, according to the signal to be reproduced, while setting an unselected driver circuit to turn either a high-side switch or a low-side switch of the unselected one of the first driver circuit or the second driver circuit fully on for at least some cycles of the one or more modulators.

Abstract: Driver circuitry for driving an electromechanical load with a drive output signal based on a digital reference signal at a first sample rate, the drive output signal inducing a first electrical quantity at the electromechanical load, the driver circuitry comprising: a function block configured, based on said first electrical quantity, to digitally determine at a second sample rate higher than the first sample rate an adjustment signal indicative of a second electrical quantity which would be induced at a target output impedance of the driver circuitry due to said first electrical quantity; and a driver configured to generate the drive output signal based on the reference signal and the adjustment signal to cause the drive output signal to behave as if an output impedance of the driver circuitry has been adjusted to comprise the target output impedance, wherein the first electrical quantity is a current and the second electrical quantity is a voltage, or vice versa.

Abstract: Calibration of devices communicating on a shared data bus may improve data integrity on the shared data bus by reducing duty cycle distortion. Duty cycle distortion may be reduced by adjusting timing of a transceiver in a device for communicating on the shared data bus using calibration codes. The calibration codes may be loaded into memory and used to reconfigure the transceiver timing on the shared data bus with reconfiguration occurring within one or more unit-intervals of time. The calibration code may be used, for example, to adjust a PMOS or NMOS trim circuit at the transceiver.

Abstract: A two-cell battery management system may include a switching network comprising a plurality of switches configured to electrically couple two battery cells to one another and a first load configured to receive electrical energy from the two battery cells and control circuitry configured to dynamically control the switching network among a plurality of switching configurations comprising a first switching configuration in which the first load is in parallel with both of the two battery cells, a second switching configuration in which the first load is in parallel with a first battery cell of the two battery cells and is electrically isolated from a second battery cell of the two battery cells, and a third switching configuration in which the first load is in parallel with the second battery cell and is electrically isolated from the first battery cell.

Abstract: A method for screening a semiconductor device for production of excessive random telegraph sequence (RTS) noise includes measuring noise of the semiconductor device at a first temperature, changing the temperature of the semiconductor device to a second temperature different from the first temperature, measuring noise of the semiconductor device at the second temperature, extracting a characteristic of the measured noise at the first and second temperatures (e.g., standard deviation, HMM output, frequency domain spectrum of time domain noise measurement), making a comparison of the extracted first and second noise characteristics, and making a determination whether the semiconductor device produces excessive RTS noise based on whether the comparison is above a predetermined threshold. Two different bias conditions of the device may be employed rather than, or in addition to, the two different temperatures.

Abstract: Circuitry comprising: a capacitor; first circuitry; and second circuitry, wherein the circuitry is operable to couple the capacitor to the first circuitry when the first circuitry is active, and to couple the capacitor to the second circuitry when the first circuitry is inactive or is not actively using the capacitor.

Abstract: The present disclosure relates to switching drivers for driving a transducer. A switching driver (202) has supply nodes for receiving supply voltages (VSH, VSL) defining at least one input voltage and an output node (104). A controller (205) controls operation of the first switching driver to generate a drive signal for the transducer at the output node (104), based on an input signal (Sin). A first capacitor (201a) is connected between first and second capacitor nodes (104, 204a) and a second capacitor (201b) is connected between the second capacitor node (204a) and a third capacitor node (204b). A network of switches (203) selectively connects any of the driver output node, the second capacitor node and the third capacitor node to either of a respective pair of said supply nodes, with the first capacitor node connected to the first driver output node.

Abstract: A system may include an electromagnetic load capable of generating a haptic event and a haptic processor configured to receive at least one first parameter indicative of a desired perception of the haptic event to a user of a device comprising the electromagnetic load, receive at least one second parameter indicative of one or more characteristics of the device, and process the at least one first parameter and the at least one second parameter to generate a driving signal to the electromagnetic load in order to produce the desired perception to the user despite variances in the device that cause an actual perception of the haptic event to vary from the desired perception.

Abstract: This application relates to methods and apparatus for driving a transducer with switching drivers where the switching driver has an output bridge stage for switching an output node between switching voltages and a modulator for controlling the duty cycle of the output bridge stage based on an input signal. The switching driver also includes a voltage controller for providing the switching voltages which is operable to provide different switching voltages in different driver modes. A controller is provided to control the driver mode of operation and the duty cycle of the switching driver based on the input signal, and the controller is configured to transition from a present driver mode to a new driver mode by controlling the voltage controller to provide the switching voltages for the new mode and controlling the modulator to vary the duty cycle of the output bridge stage. The change in duty cycle is controlled such that there is no substantial discontinuity in switching ripple due to the mode transition.

Abstract: A method for use in an analog circuit having a plurality of differential pairs of elements, wherein for each pair of the plurality of differential pairs of elements, the elements of the pair are designed to match but may have mismatch that induces error. The method includes, for each pair of at least two pairs of the plurality of differential pairs of elements: spectrally separating the mismatch-induced error of the pair from mismatch-induced error of a remainder of the plurality of differential pairs of elements, monitoring, by an analog-to-digital converter (ADC), an output of the analog circuit, and analyzing the monitored output to measure the mismatch-induced error of the pair.