Patents by Inventor John Leete
John Leete has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8862077Abstract: An apparatus includes a dynamically configurable transformer configured to provide a gain to a target signal. The gain is dynamically configurable. The dynamically configurable transformer includes at least one parallel resistive element configured to be dynamically activated in parallel with a load.Type: GrantFiled: July 15, 2013Date of Patent: October 14, 2014Assignee: Broadcom CorporationInventors: Ahmad Mirzaei, John Leete, Hooman Darabi
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Patent number: 8854145Abstract: Methods and systems are provided to calibrate an oscillator circuit to reduce frequency pulling as a result of a change in power to a portion of the oscillator circuit. In an embodiment, an oscillator is coupled to a clock buffer circuit and a tuning capacitor configured to tune a frequency of the oscillator to a baseline frequency required for cellular communications. A change in power to the clock buffer circuit initiates a change in an amount of capacitance seen by the oscillator, which negatively impacts the tuning of the oscillator. A register stores a frequency offset caused by the change in power, and the tuning capacitor is adjusted, using the frequency offset, in response to the change in power, such that the total amount of capacitance seen by the oscillator is not changed when the change in power occurs.Type: GrantFiled: January 14, 2013Date of Patent: October 7, 2014Assignee: Broadcom CorporationInventors: Yuyu Chang, John Leete, Walid Ahmed, Wei Luo
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Publication number: 20130303095Abstract: An apparatus includes a dynamically configurable transformer configured to provide a gain to a target signal. The gain is dynamically configurable. The dynamically configurable transformer includes at least one parallel resistive element configured to be dynamically activated in parallel with a load.Type: ApplicationFiled: July 15, 2013Publication date: November 14, 2013Inventors: Ahmad MIRZAEI, John LEETE, Hooman DARABI
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Patent number: 8515368Abstract: An apparatus comprising: a baseband filter configured to produce a baseband signal utilizing an input signal; a mixer unit configured to produce an intermediate signal utilizing the baseband signal and a local oscillator signal; and a dynamically configurable transformer configured to provide a gain to the intermediate signal, wherein the gain is dynamically configurable.Type: GrantFiled: November 29, 2007Date of Patent: August 20, 2013Assignee: Broadcom CorporationInventors: Ahmad Mirzaei, John Leete, Hooman Darabi
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Patent number: 8358991Abstract: Embodiments of an RF receiver front-end are presented herein. In an embodiment, the RF receiver front-end comprises a transconductance LNA, a passive mixer, and a gm-enhanced common-gate buffer. The transconductance LNA is configured to convert an RF voltage signal to an RF current signal and provide the RF current signal at an output. The passive mixer is coupled to the output of the transconductance LNA and is configured to mix the RF current signal with a local oscillator signal to produce a frequency translated current signal. The gm-enhanced common-gate buffer is configured to receive the frequency translated current signal at an input and convert the frequency translated current signal to a frequency translated voltage signal. In an embodiment, the input of the gm-enhanced common-gate buffer is configured to provide a low input impedance to limit a voltage swing of the frequency translated current signal.Type: GrantFiled: January 26, 2010Date of Patent: January 22, 2013Assignee: Broadcom CorporationInventors: Xinyu Chen, Calvin (Shr-Lung) Chen, John Leete
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Patent number: 8354890Abstract: Methods and systems are provided to calibrate an oscillator circuit to reduce frequency pulling as a result of a change in power to a portion of the oscillator circuit. In an embodiment, an oscillator is coupled to a clock buffer circuit and a tuning capacitor configured to tune a frequency of the oscillator to a baseline frequency required for cellular communications. A change in power to the clock buffer circuit initiates a change in an amount of capacitance seen by the oscillator, which negatively impacts the tuning of the oscillator. A register stores a frequency offset caused by the change in power, and the tuning capacitor is adjusted, using the frequency offset, in response to the change in power, such that the total amount of capacitance seen by the oscillator is not changed when the change in power occurs.Type: GrantFiled: October 28, 2010Date of Patent: January 15, 2013Assignee: Broadcom CorporationInventors: Yuyu Chang, John Leete, Walid Ahmed, Wei Luo
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Patent number: 8301101Abstract: Embodiments of a frequency translated filter (FTF) are presented. An FTF includes a passive mixer and a baseband impedance. The baseband impedance includes a network of one or more passive components (e.g., resistors, inductors, and capacitors) that form a low-Q filter. The passive mixer is configured to translate the baseband impedance to a higher frequency. The translated baseband impedance forms a high-Q filter and is presented at the input of the FTF. The FTF can be fully integrated in CMOS IC technology (or others, e.g., Bipolar, BiCMOS, and SiGe) and applied in wireless receiver systems including GSM, Wideband Code Division Multiple Access (WCDMA), Bluetooth, and wireless LANs (e.g., IEEE 802.11).Type: GrantFiled: May 22, 2009Date of Patent: October 30, 2012Assignee: Broadcom CorporationInventors: Ahmad Mirzaei, Hooman Darabi, John Leete
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Patent number: 8183905Abstract: A method to provide a low-power clock signal or a low-noise clock signal is described herein. It is determined whether a low-power mode or a low-noise mode is in use. A voltage reference input of a low-dropout voltage regulator (LDO) is switched to a low-power voltage reference for low-power mode and to a low-noise voltage reference for low-noise mode. The LDO provides a constant voltage output to a crystal oscillator. A clock signal is generated using the crystal oscillator. The clock signal is limited using a low-power limiter to generate a low-power output clock signal and/or is limited using a low-noise limiter to generate a low-noise clock signal. The low-power output clock signal or the low-noise output clock signal is selected using a mux.Type: GrantFiled: August 11, 2009Date of Patent: May 22, 2012Assignee: Broadcom CorporationInventors: Yuyu Chang, Qiang Li, John Leete, Hooman Darabi, Yiannis Kokolakis
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Publication number: 20120068780Abstract: Methods and systems are provided to calibrate an oscillator circuit to reduce frequency pulling as a result of a change in power to a portion of the oscillator circuit. In an embodiment, an oscillator is coupled to a clock buffer circuit and a tuning capacitor configured to tune a frequency of the oscillator to a baseline frequency required for cellular communications. A change in power to the clock buffer circuit initiates a change in an amount of capacitance seen by the oscillator, which negatively impacts the tuning of the oscillator. A register stores a frequency offset caused by the change in power, and the tuning capacitor is adjusted, using the frequency offset, in response to the change in power, such that the total amount of capacitance seen by the oscillator is not changed when the change in power occurs.Type: ApplicationFiled: October 28, 2010Publication date: March 22, 2012Applicant: Broadcom CorporationInventors: Yuyu Chang, John Leete, Walid Ahmed, Wei Luo
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Publication number: 20110092180Abstract: Embodiments of an RF receiver front-end are presented herein. In an embodiment, the RF receiver front-end comprises a transconductance LNA, a passive mixer, and a gm-enhanced common-gate buffer. The transconductance LNA is configured to convert an RF voltage signal to an RF current signal and provide the RF current signal at an output. The passive mixer is coupled to the output of the transconductance LNA and is configured to mix the RF current signal with a local oscillator signal to produce a frequency translated current signal. The gm-enhanced common-gate buffer is configured to receive the frequency translated current signal at an input and convert the frequency translated current signal to a frequency translated voltage signal. In an embodiment, the input of the gm-enhanced common-gate buffer is configured to provide a low input impedance to limit a voltage swing of the frequency translated current signal.Type: ApplicationFiled: January 26, 2010Publication date: April 21, 2011Applicant: Broadcom CorporationInventors: Xinyu CHEN, Calvin (Shr-Lung) Chen, John Leete
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Patent number: 7899423Abstract: A method for processing signals is disclosed and may include performing using one or more circuits in a multiband radio, functions including receiving an input signal from an oscillator that generates signals for each of a plurality of bands handled by the multiband radio. The received input signal may be divided. A feedback loop reference signal may be generated from the input signal. A coarse calibration signal and/or a fine calibration signal may be generated from the generated feedback loop reference signal. The oscillator may be calibrated utilizing the coarse calibration signal and/or the fine calibration signal. The input signal generated by the oscillator may be between about 3.4 GHz and 4 GHz. The receive input signal may be buffered. The generated feedback loop reference signal may also be buffered.Type: GrantFiled: March 17, 2009Date of Patent: March 1, 2011Inventors: Hooman Darabi, John Leete
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Publication number: 20110018604Abstract: A method to provide a low-power clock signal or a low-noise clock signal is described herein. It is determined whether a low-power mode or a low-noise mode is in use. A voltage reference input of a low-dropout voltage regulator (LDO) is switched to a low-power voltage reference for low-power mode and to a low-noise voltage reference for low-noise mode. The LDO provides a constant voltage output to a crystal oscillator. A clock signal is generated using the crystal oscillator. The clock signal is limited using a low-power limiter to generate a low-power output clock signal and/or is limited using a low-noise limiter to generate a low-noise clock signal. The low-power output clock signal or the low-noise output clock signal is selected using a mux.Type: ApplicationFiled: August 11, 2009Publication date: January 27, 2011Applicant: Broadcom CorporationInventors: Yuyu Chang, Qiang Li, John Leete, Hooman Darabi, Yiannis Kokolakis
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Publication number: 20100267354Abstract: Embodiments of a frequency translated filter (FTF) are presented. An FTF includes a passive mixer and a baseband impedance. The baseband impedance includes a network of one or more passive components (e.g., resistors, inductors, and capacitors) that form a low-Q filter. The passive mixer is configured to translate the baseband impedance to a higher frequency. The translated baseband impedance forms a high-Q filter and is presented at the input of the FTF. The FTF can be fully integrated in CMOS IC technology (or others, e.g., Bipolar, BiCMOS, and SiGe) and applied in wireless receiver systems including GSM, Wideband Code Division Multiple Access (WCDMA), Bluetooth, and wireless LANs (e.g., IEEE 802.11).Type: ApplicationFiled: May 22, 2009Publication date: October 21, 2010Applicant: Broadcom CorporationInventors: Ahmad Mirzaei, Hooman Darabi, John Leete
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Publication number: 20100159821Abstract: An exhaust vent apparatus provides a wall vent sleeve including a rear opening and a front opening, and a moveable damper disposed within the wall vent sleeve at a recessed position from the front opening, wherein the moveable damper conducts gas flow in a direction from the rear opening to the front opening and prevents gas flow in a direction from the front opening and to the rear opening.Type: ApplicationFiled: December 23, 2009Publication date: June 24, 2010Applicant: FSH INDUSTRIES, LLCInventors: Thomas Bredahl, John Leete
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Patent number: 7733167Abstract: Methods and systems for reducing parasitic capacitance of a buffer for an electric circuit are disclosed and may include coupling a gate of a first transistor to a first differential input of the buffer via a first capacitor, coupling a gate of a second transistor to a second differential input of the buffer via a second capacitor. The first and second transistors may be biased by a common mode output of a direct current (DC) voltage source for the buffer. The common mode output of the DC voltage source may be directly coupled to at least one differential output of the buffer via an inductor. The first transistor and the second transistor may comprise NMOS transistors and/or PMOS transistors. The DC voltage source may comprise a PMOS transistor and/or an NMOS transistor.Type: GrantFiled: October 30, 2007Date of Patent: June 8, 2010Inventor: John Leete
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Publication number: 20090181631Abstract: A method for processing signals is disclosed and may include performing using one or more circuits in a multiband radio, functions including receiving an input signal from an oscillator that generates signals for each of a plurality of bands handled by the multiband radio. The received input signal may be divided. A feedback loop reference signal may be generated from the input signal. A coarse calibration signal and/or a fine calibration signal may be generated from the generated feedback loop reference signal. The oscillator may be calibrated utilizing the coarse calibration signal and/or the fine calibration signal. The input signal generated by the oscillator may be between about 3.4 GHz and 4 GHz. The receive input signal may be buffered. The generated feedback loop reference signal may also be buffered.Type: ApplicationFiled: March 17, 2009Publication date: July 16, 2009Inventors: Hooman Darabi, John Leete
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Publication number: 20090143033Abstract: An apparatus comprising: a baseband filter configured to produce a baseband signal utilizing an input signal; a mixer unit configured to produce an intermediate signal utilizing the baseband signal and a local oscillator signal; and a dynamically configurable transformer configured to provide a gain to the intermediate signal, wherein the gain is dynamically configurable.Type: ApplicationFiled: November 29, 2007Publication date: June 4, 2009Applicant: BROADCOM CORPORATIONInventors: Ahmad Mirzaei, John Leete, Hooman Darabi
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Patent number: 7505749Abstract: Methods and systems for processing signals for a multiband radio are disclosed herein. Aspects of the method may comprise dividing an input signal generated by an oscillator used to generate signals for each of a plurality of bands for the multiband radio. A feedback loop reference signal may be generated from the input signal and a coarse calibration signal may be generated from the feedback loop reference signal. The oscillator may be calibrated utilizing the coarse calibration signal. The input signal may be buffered and/or divided by a divide by four (4) divider circuit. The input signal generated by the oscillator may be between about 3.4 GHz and 4 GHz. The generated feedback loop reference signal may be buffered and/or divided prior to the calibration. The coarse calibration signal may comprise a 7-bit calibration signal. A fine calibration signal may be generated from the feedback loop reference signal.Type: GrantFiled: October 29, 2004Date of Patent: March 17, 2009Assignee: Broadcom CorporationInventors: Hooman Darabi, John Leete
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Patent number: 7432763Abstract: A gain boost circuit and methodology are described for providing improved gain boosting with tuned amplifier circuits, such as differential low noise amplifier circuits having output resonant tank circuits. By selectively controlling the current source for a negative transconductance stage coupled between the differential amplifier output and the output resonant tank circuits, the amplifier gain may be adjusted to compensate for temperature variations. In addition, the amplifier gain boost may be selectively added, removed or even incrementally adjusted by using a current source control circuit in the negative transconductance stage to adjust the negative transconductance value generated by the negative transconductance stage.Type: GrantFiled: March 26, 2007Date of Patent: October 7, 2008Assignee: Broadcom CorporationInventor: John Leete
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Publication number: 20080054983Abstract: Methods and systems for reducing parasitic capacitance of a buffer for an electric circuit are disclosed and may include coupling a gate of a first transistor to a first differential input of the buffer via a first capacitor, coupling a gate of a second transistor to a second differential input of the buffer via a second capacitor. The first and second transistors may be biased by a common mode output of a direct current (DC) voltage source for the buffer. The common mode output of the DC voltage source may be directly coupled to at least one differential output of the buffer via an inductor. The first transistor and the second transistor may comprise NMOS transistors and/or PMOS transistors. The DC voltage source may comprise a PMOS transistor and/or an NMOS transistor.Type: ApplicationFiled: October 30, 2007Publication date: March 6, 2008Inventor: John Leete