Abstract: A switch protocol for network communications (particularly but not exclusively for multiple computer systems) is disclosed in which each switch (S1, S2, S3) maintains a list of addresses which can be reached via each port (A, B, C) of the switch. In addition, prior to delivering a message or packet to a port, the switch deletes any address in the message or packet which is unable to be reached via that port. The arrangement saves the repetitive sending of uni-cast messages and also saves broadcast messages being sent via the switches to computers which are not intended to receive the messages.

Abstract: A multiple computer system is disclosed in which n computers (M1, M2 . . . Mn) each run a different portion of a single application program written to execute only on a single computer. The local memory of each computer is maintained substantially the same by updating all computers with every change made to addressed memory locations. Contention can arise when the same memory location is substantially simultaneously updated by two or more machines because of transmission delays and latency of the communications network interconnecting all the computers. In particular a method of data consolidation which permits contention detection and resolution is disclosed. A count value indicative of the cumulative number of times each memory location has been updated is utilized. Contention is indicated if the currently stored count value and the incoming updating count value are the same.

Abstract: A network protocol is disclosed in which the network switch reports failure to transmit a message or packet to the source computer of a multiple computer system. The destination computer(s) is/are then instructed by the source computer to re-initialize the relevant memory locations. A transaction identifier (TID) is used to identify a source computer sending a stream of updating data for a specific memory location.

Abstract: A system and method for interconnecting multiple computers (M1, M2, . . . , Mn) via at least two independent communications ports (28, 38) are disclosed. Data is sent and received via a data protocol which identifies the sequence position of each data packet in a transmitted sequence of data packets. The packets can be transmitted and/or received out of order. The multiple computers each execute a different portion of an application program written to execute on a single computer.

Abstract: A method of, and system for, asynchronous data transmission are disclosed which have application in the transmission of stock exchange data or replicated memory data. Later transmitted data (14) is used to overwrite earlier transmitted and received data (13). However, earlier transmitted data (14) which is received later than later transmitted data (15) (for example due to network latency) does not overwrite the later transmitted data (15). Transmitted data packets include a count value (15) indicative of the sequence position of each data packet in a transmitted sequence (13, 14, 15) of data packets. A transmitter and receiver for asynchronous data transmission and reception, and a packet signal structure are also disclosed.

Abstract: A system and method for interconnecting multiple computers (M1, M2, . . . , Mn) via at least two communications networks (N1, N2, N3) are disclosed. The connections are made via multiple communications ports (28, 38). Data is sent and received via a data protocol which identifies the sequence position of each data packet in a transmitted sequence of data packets. The packets can be transmitted and/or received out of order. The multiple computers each execute a different portion of an applications program written to execute on a single computer.

Abstract: A multiple computer environment is disclosed in which an application program executes simultaneously on a plurality of computers (M1, M2, . . . Mn) interconnected by a communications network (3) and in which the local memory of each computer is maintained substantially the same by updating in due course. A lock mechanism is provided to permit exclusive access to an asset, object, or structure (ie memory location) by acquisition and release of the lock. In particular, before a new lock can be acquired by any other computer on a memory location previously locked by one computer, any updating count(s) for the previously locked memory location are transmitted to all the other computers and their corresponding memory locations (before the in due course updating). Thus the lock acquiring computer can ascertain if its local memory has been adequately updated.

Abstract: A multiple computer system is disclosed in which n computers (M1, M2 . . . Mn) each run a different portion of a single application program written to execute only on a single computer. The local memory of each computer is maintained substantially the same by updating all computers with every change made to addressed memory locations. Contention can arise when the same memory location is substantially simultaneously updated by two or more machines because of transmission delays and latency of the communications network interconnecting all the computers. In particular a method of detecting and resolving contention is disclosed which utilizes a count value indicative of the number of the sequence of occasions on which each memory location has been updated. Contention is indicated if the currently stored count value and the incoming updating count value are the same. The contention can be resolved by providing a further rule.

Abstract: An architecture for multiple computer systems which incorporates redundancy is disclosed. For each group of “n” first computers M1/1, M2/1, . . . Mn/1, a second “mirror” group of computers M1/2, M2/2 . . . Mn/2 is provided. Changes to the memory locations of each computer of the first group are communicated to the corresponding computers of the second group to update a replicated memory. Memory locations (A/1, B/1, C/1) stored on one machine (M2/1) and the mirror machine (M1/2) are stored on both the hierarchically adjacent machines M1/2, M2/2 and maintained updated. In the event of the failure of one machine, the mirror machine has the memory locations of the failed machine and is able to resume or take over the computational tasks of the failed machine thereby providing a first measure of redundancy. In the event of failure of both a first group machine and its mirror machine, the hierarchically adjacent mirror machine is able to resume or take over.

Abstract: A multiple computer system is disclosed in which the local memory of each computer (M1, M2, . . . Mn) can be different having some memory locations (A, B) which are replicated in other computers and other memory locations (E) which are not. When any computer seeks to acquire or release a synchronizing lock a check (171, 181) is made to see if the relevant memory location is present on any other machine. If yes, synchronization is carried out.

Abstract: A multiple computer system incorporating a redundant memory architecture is disclosed. Memory locations (0-99, A-C) stored on one machine (C1, M1) are stored on the hierarchically adjacent machines (C2, M2) and maintained updated. In the event of the failure of only one machine, the hierarchically adjacent machine has the memory locations of the failed machine and is able to resume or take over the computational tasks of the failed machine thereby providing a measure of redundancy. Both distributed memory systems (DSM) and replicated memory system (RSM) are disclosed. In particular, a partially replicated memory system, structure, and method for replicating in using the same, are all disclosed.

Abstract: A multiple computer system is disclosed in which each computer (M1, M2, Mn, Mn+1) operates a different portion of an application program (15) written to be executed on only a single computer, said computers being interconnected via a communications network (53). An instruction such as “new thread ( )” which creates an additional thread (Tm+1) is not created on a computer (Mn) including that instruction and existing operating thread Tm. Instead the instruction is intercepted or detected and passed to another machine (Mn+1) which creates the additional thread (Tm+1). Preferably the computers (Mn) and (Mn+1) are adjacent computers in a closed loop of consecutively numbered computers.

Abstract: A system and method for interconnecting multiple computers (M1, M2, . . . , Mn) via at least two communications networks (N1, N2, N3) are disclosed. The connections are made via multiple communications ports (28, 38). Data is sent and received via a data protocol which identifies the sequence position of each data packet in a transmitted sequence of data packets. The packets can be transmitted and/or received out of order. The multiple computers each execute a different portion of an applications program written to execute on a single computer.

Abstract: An architecture for multiple computer systems which incorporates redundancy is disclosed. For each group of “n” first computers M/1, M2/1, . . . Mn/1, a second “mirror” group of computers M1/2, M2/2 . . . Mn/2 is provided. Changes to the memory locations of each computer of the first group are communicated to the corresponding computers of the second group to update a replicated memory. Memory locations (A/1, B/1, C/1) stored on one machine (M2/1) and the mirror machine (M1/2) are stored on both the hierarchically adjacent machines M1/2, M2/2 and maintained updated. In the event of the failure of one machine, the mirror machine has the memory locations of the failed machine and is able to resume or take over the computational tasks of the failed machine thereby providing a first measure of redundancy. In the event of failure of both a first group machine and its mirror machine, the hierarchically adjacent mirror machine is able to resume or take over.

Abstract: A multiple computer system is disclosed in which each computer (M1, M2, Mn, Mn+1) operates a different portion of an application program (15) written to be executed on only a single computer, said computers being interconnected via a communications network (53). An instruction such as “new thread ( )” which creates an additional thread (Tm+1) is not created on a computer (Mn) including that instruction and existing operating thread Tm. Instead the instruction is intercepted or detected and passed to another machine (Mn+1) which creates the additional thread (Tm+1). Preferably the computers (Mn) and (Mn+1) are adjacent computers in a closed loop of consecutively numbered computers.

Abstract: A multiple computer system with hybrid replicated shared memory is disclosed. The local memory (10, 20, . . . 80) of each of the multiple computers M1, M2, . . . Mn is partitioned into a first part (11, 21, . . . 81) and a second part (12, 22, . . . 82). Each of the first parts are identical and each of the second parts are independent. The total memory available to the system is the first memory part plus n times the second memory part, n being the total number of application running multiple computers.

Abstract: An architecture for multiple computer systems which incorporates redundancy is disclosed. For each group of “n” first computers M1/1, M2/1, . . . Mn/1, a second “mirror” group of computers M1/2, M2/2 . . . Mn/2 is provided. Changes to the memory locations of each computer of the first group are communicated to the corresponding computers of the second group to update a replicated memory. Both distributed shared memory (DSM) and replicated shared memory (RSM) are disclosed.

Abstract: A system and method for interconnecting multiple computers (M1, M2, . . . , Mn) via at least two independent communications ports (28, 38) are disclosed. Data is sent and received via a data protocol which identifies the sequence position of each data packet in a transmitted sequence of data packets. The packets can be transmitted and/or received out of order. The multiple computers each execute a different portion of an application program written to execute on a single computer.

Abstract: A multiple computer system incorporating a redundant memory architecture is disclosed. Memory locations (0-99, A-C) stored on one machine (C1, M1) are stored on the hierarchically adjacent machines (C2, M2) and maintained updated. In the event of the failure of only one machine, the hierarchically adjacent machine has the memory locations of the failed machine and is able to resume or take over the computational tasks of the failed machine thereby providing a measure of redundancy. Both distributed memory systems (DSM) and replicated memory system (RSM) are disclosed. In particular, a partially replicated memory system, structure, and method for replicating in using the same, are all disclosed.

Abstract: A multiple computer system incorporating a redundant memory architecture is disclosed. Memory locations (0-99, A-C) stored on one machine (C1, M1) are stored on the hierarchically adjacent machines (C2, M2) and maintained updated. In the event of the failure of only one machine, the hierarchically adjacent machine has the memory locations of the failed machine and is able to resume or take over the computational tasks of the failed machine thereby providing a measure of redundancy. Both distributed memory systems (DSM) and replicated memory system (RSM) are disclosed. In particular, a partially replicated memory system, structure, and method for replicating in using the same, are all disclosed.