Abstract: A flat-panel display is fabricated by a process in which a spacer (24) having a rough face (54 or 56) is positioned between a pair of plate structure (20 and 22). When electrons strike the spacer, the roughness in the spacer's face causes the number of secondary electrons that escape the spacer to be reduced, thereby alleviating positive charge buildup on the spacer. As a result, the image produced by the display is improved. The spacer facial roughness can be achieved in various ways such as providing suitable depressions (60, 62, 64, 66, 70, 74, or 80) or/and protuberances (82, 84, 88, and 92) along the spacer's face.

Abstract: A method is provided for creating gated filament structures for a field emission display. A multi-layer structure is provided that includes a substrate, an insulating layer and a metal gate layer positioned on at least a portion of a top surface of the insulating layer. A plurality of patterned gates are also provided in order to define a plurality of gate apertures on the top surface of the insulating layer. A plurality of spacers are formed in the gate apertures at edges of the patterned gates on the top surface of the insulating layer. The spacers are used as masks for etching the insulating layer and forming a plurality of pores in the insulating layer. The pores are plated with a filament material that extends from the insulating pores, into the gate apertures, and creates a plurality of filaments. The spacers are then removed. The multi-layer structure can further include a conductivity layer on at least a portion of a top surface of the substrate.

Abstract: A flat-panel display contains a pair of plate structure (20 and 22) separated by a spacer (24) having a rough face (54 or 56). When electrons strike the spacer, the roughness in the spacer's face causes the number of secondary electrons that escape the spacer to be reduced, thereby alleviating positive charge buildup on the spacer. As a result, the image produced by the display is improved. The spacer facial roughness can be achieved in various ways such as depressions (60, 62, 64, 66, 70, 74, or 80) or/and protuberances (82, 84, 88, and 92). Various techniques are presented for manufacturing the display, including the rough-faced spacer.

Abstract: A gated filament structure for a field emission display includes a plurality of filaments. Included is a substrate, an insulating layer positioned adjacent to the substrate, and a metal gate layer position adjacent to the insulating layer. The metal gate layer has a plurality of gates, the metal gate layer having an average thickness “s” and a top metal gate layer planar surface that is substantially parallel to a bottom metal gate layer planar surface. The metal gate layer includes a plurality of apertures extending through the gates. Each aperture has an average width “r” along a bottom planar surface of the aperture. Each aperture defines a midpoint plane positioned parallel to and equally distant from the top metal gate layer planar surface and the bottom metal gate layer planar surface. A plurality of filaments are individually positioned in an aperture. Each filament has a filament axis. The intersection of the filament axis and the midpoint plane defines a point “O”.

Abstract: A cathode structure suitable for a flat panel display is provided with coated emitters. The emitters are formed with material, typically nickel, capable of growing to a high aspect ratio. These emitters are then coated with carbon containing material for improving the chemical robustness and reducing the work function. One coating process is a DC plasma deposition process in which acetylene is pumped through a DC plasma reactor to create a DC plasma for coating the cathode structure. An alternative coating process is to electrically deposit raw carbon-based material onto the surface of the emitters, and subsequently reduce the raw carbon-based material to the carbon containing material. Work function of coated emitters is typically reduced by about 0.8 to 1.0 eV.

Abstract: A cathode structure suitable for a flat panel display is provided with coated emitters. The emitters are formed with material, typically nickel, capable of growing to a high aspect ratio. These emitters are then coated with carbon containing material for improving the chemical robustness and reducing the work function. One coating process is a DC plasma deposition process in which acetylene is pumped through a DC plasma reactor to create a DC plasma for coating the cathode structure. An alternative coating process is to electrically deposit raw carbon-based material onto the surface of the emitters, and subsequently reduce the raw carbon-based material to the carbon containing material. Work function of coated emitters is typically reduced by about 0.8 to 1.0 eV.

Abstract: A cathode structure suitable for a flat-panel display contains an emitter layer (213) divided into emitter lines, a plurality of electron emitters (229, 239, or 230) situated over the emitter lines, and a gate layer (215A) having an upper surface spaced largely above the electron emitters. The gate layer has a plurality of gate holes (215B) each corresponding to one of the electron emitters. The cathode structure further includes a carbon-containing layer (340, 240, or 241) coated over the electron emitters and directly on at least part of the upper surface of the gate layer such that at least part of the carbon-containing layer extending along and above the gate layer is exposed.

Abstract: A cathode structure suitable for a flat panel display is provided with coated emitters. The emitters are formed with material, typically nickel, capable of growing to a high aspect ratio. These emitters are then coated with carbon containing material for improving the chemical robustness and reducing the work function. One coating process is a DC plasma deposition process in which acetylene is pumped through a DC plasma reactor to create a DC plasma for coating the cathode structure. An alternative coating process is to electrically deposit raw carbon-based material onto the surface of the emitters, and subsequently reduce the raw carbon-based material to the carbon containing material. Work function of coated emitters is typically reduced by about 0.8 to 1.0 eV.

Abstract: A cathode structure suitable for a flat panel display is provided with coated emitters. The emitters are formed with material, typically nickel, capable of growing to a high aspect ratio. These emitters are then coated with carbon containing material for improving the chemical robustness and reducing the work function. One coating process is a DC plasma deposition process in which acetylene is pumped through a DC plasma reactor to create a DC plasma for coating the cathode structure. An alternative coating process is to electrically deposit raw carbon-based material onto the surface of the emitters, and subsequently reduce the raw carbon-based material to the carbon containing material. Work function of coated emitters is typically reduced by about 0.8 to 1.0 eV.

Abstract: An electron-emitting device contains a lower conductive region (22), a porous insulating layer (24A, 24B, 24D, 24E, or 24F) overlying the lower conductive region, and a multiplicity of electron-emissive elements (30, 30A, or 30B) situated in pores (281) extending through the porous layer. The pores are situated at locations substantially random relative to one another. The lower conductive region typically contains a highly conductive portion (22A) and an overlying highly resistive portion (22B). Alternatively or additionally, a patterned gate layer (34B, 40B, or 46B) overlies the porous layer. Openings (36, 42, or 541) corresponding to the filaments extend through the gate layer at locations generally centered on the filaments such that the filaments are separated from the gate layer.

Abstract: An electron-emitting device is fabricated by a process in which particles (46) are distributed over an initial structure. The particles are utilized in defining primary openings (52, 64, or 78) that extend through a primary layer (50A, 62A, or 72) provided over a gate layer (48A, 60A, or 60B) formed over an insulating layer (44) and in defining corresponding gate openings (54, 66, or 80) that extend through the gate layer. The insulating layer is etched through the primary and gate openings to form corresponding dielectric openings (56 or 68) through the insulating layer down to a lower non-insulating region (42). Electron-emissive elements (58A or 70A) are formed over the lower non-insulating region so that each electron-emissive element is at least partially situated in one dielectric opening.

Abstract: A gated electron-emitter having a lower non-insulating emitter region (42), an overlying insulating layer (44), and a gate layer (48A, 60A, 60B, 120A, or 180A/184) is fabricated by a process in which particles (46) are distributed over the insulating layer, the gate layer, a primary layer (50A, 62A, or 72) provided over the gate layer, a further layer (74) provided over the primary layer, or a pattern-transfer layer (182). The particles are utilized in defining gate openings (54, 66, 80, 122, or 186/188) through the gate layer. Spacer material is provided along the edges of the gate openings to form spacers (102A, 110A, 124A, 140, or 150B). Dielectric openings (80, 114, 128, 144, or 154) are formed through the insulating layer. The dielectric openings can be created before or after creating the spacers.

Abstract: Gated electron emitters are fabricated by processes in which charged particles are passed through a track layer (24, 48, or 144) to form charged-particle tracks (26.sub.1, 50.sub.1, or 146.sub.1). The track layer is etched along the tracks to create open spaces (28.sub.1, 52.sub.1, or 148.sub.1). Electron-emissive elements (30 or 142D) can then be formed at locations respectively centered on the open spaces after which a patterned gate layer (34B, 40B, or 158C) is provided. Alternatively, the open spaces in the track layer can be employed to etch corresponding apertures (54.sub.1) through an underlying non-insulating layer (46) which typically serves as the gate layer. An etch is performed through the apertures to form dielectric open spaces (56.sub.1, 96.sub.1, or 114.sub.1) in an insulating layer (24) that lies below the non-insulating layer. Electron-emissive elements (30B, 30/88D.sub.1, 98/102.sub.1, or 118.sub.1) can subsequently be provided, typically in the dielectric open spaces.

Abstract: A technique for creating openings in a polycarbonate film entails providing a liquid chemical formulation that contains polycarbonate material, a liquid that dissolves the polycarbonate, and possibly one or more other constituents. The liquid is typically capable of dissolving the polycarbonate to a concentration of at least 1% at 20.degree. C. and 1 atmosphere. Examples of the liquid include pyridine, a ring-substituted pyridine derivative, pyrrole, a ring-substituted pyrrole derivative, pyrrolidine, a pyrrolidine derivative, chlorobenzene, and cyclohexanone. A liquid film (36A) of the chemical formulation is formed over a substructure (30) and processed to remove the liquid, thereby converting the liquid film into a solid polycarbonate track layer (38). Charged particles (70) are passed through the track layer to form charged-particle tracks (72) at least partway through the layer. Apertures (74) are created through the track layer by a process that entails etching along the tracks.

Abstract: Fabrication of an electron-emitting device entails distributing electron-emissive carbon-containing particles (22) over a non-insulating region (12). The particles can be made electron emissive after the particle distributing step. Particle bonding material (24) is typically provided to bond the particles to the non-insulating region. The particle bonding material can include carbide formed by heating or/and can be created by modifying a layer (32) provided between the non-insulating region and the particles. In one embodiment, the particles emit electrons primarily from graphite or/and amorphous carbon regions. In another embodiment, the particles are made electron-emissive prior to the particle distributing step.

Abstract: The yield in manufacturing matrix-addressable devices, particularly flat-panel CRT displays, is increased by a technique in which a determination is first made that a defect exists in part of a first matrix-addressable plate structure (20) of a unitary first active area (32). This typically entails testing a group of the first plate structures to determine whether any of them are defective. The defective part or parts of each defective first plate structure are also identified. At least one non-defective first plate structure normally is subsequently converted into a first matrix-addressable device of the first active area. For a defective first plate structure identified in the testing, the defective part of the structure is removed in such a way that the remainder of the structure forms a second matrix-addressable plate structure (84) of a second active area (32A) smaller than the first active area.

Abstract: An impedance-assisted electrochemical method is employed for selectively removing certain material from a structure without significantly electrochemically removing certain other material of the same chemical type as the removed material.

Abstract: A gated electron-emitter having a lower non-insulating emitter region (42), an overlying insulating layer (44), and a gate layer (48A, 60A, 60B, 120A, or 180A/184) is fabricated by a process in which particles (46) are distributed over the insulating layer, the gate layer, a primary layer (50A, 62A, or 72) provided over the gate layer, a further layer (74) provided over the primary layer, or a pattern-transfer layer (182). The particles are utilized in defining gate openings (54, 66, 80, 122, or 186/188) through the gate layer. Spacer material is provided along the edges of the gate openings to form spacers (110A, 124A, 140, or 150B) but leave corresponding apertures (112A, 126A, 142, or 152) through the spacer material. The insulating layer is etched through the apertures to form dielectric openings (114, 128, 144, or 154) through the insulating layer. Emitter material is introduced into the dielectric openings to form electron-emissive elements (116B, 130A, 146A, or 156B) typically filamentary in shape.

Abstract: A field-emission structure suitable for large-area flat-panel televisions centers around an insulating porous layer that overlies a lower conductive region situated over insulating material of a supporting substrate. Electron-emissive filaments occupy pores extending through the porous layer. A conductive gate layer through which openings extend at locations centered on the filaments typically overlies the porous layer. Cavities are usually provided in the porous layer along its upper surface at locations likewise centered on the filaments.

Abstract: Gated electron emitters are fabricated by processes in which charged particles are passed through a track layer (24, 48, or 144) to form charged-particle tracks (26.sub.1, 50.sub.1, or 146.sub.1). The track layer is etched along the tracks to create open spaces (28.sub.1, 52.sub.1, or 148.sub.1). Electron-emissive elements (30 or 142D) can then be formed at locations respectively centered on the open spaces after which a patterned gate layer (34B, 40B, or 158C) is provided. Alternatively, the open spaces in the track layer can be employed to etch corresponding apertures (54.sub.1) through an underlying non-insulating layer (46) which typically serves as the gate layer. An etch is performed through the apertures to form dielectric open spaces (56.sub.1, 96.sub.1, or 114.sub.1) in an insulating layer (24) that lies below the non-insulating layer. Electron-emissive elements (30B, 30/88D.sub.1, 98/102.sub.1, or 118.sub.1) can subsequently be provided, typically in the dielectric open spaces.