Patents by Inventor John Paul Lesso

John Paul Lesso has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11658623
    Abstract: The present disclosure relates to Class D amplifier circuitry comprising a mode controller configured to dynamically adjust an operational switching mode of the Class D amplifier over a range between a Class AD mode and a Class BD mode.
    Type: Grant
    Filed: July 19, 2021
    Date of Patent: May 23, 2023
    Assignee: Cirrus Logic, Inc.
    Inventors: John Paul Lesso, Toru Ido
  • Patent number: 11651168
    Abstract: This application relates to computing circuitry, and in particular to analogue computing circuitry suitable for neuromorphic computing. An analogue computation unit for processing data is supplied with a first voltage from a voltage regulator which is operable in a sequence of phases to cyclically regulate the first voltage. A controller is configured to control operation of the voltage regulator and/or the analogue computation unit, such that the analogue computation unit processes data during a plurality of compute periods that avoid times at which the voltage regulator undergoes a phase transition which is one of a predefined set of phase transitions between defined phases in said sequence of phases. This avoids performing computation operations during a phase transition of the voltage regulator that could result in a transient or disturbance in the first voltage, which could adversely affect the computing.
    Type: Grant
    Filed: September 19, 2022
    Date of Patent: May 16, 2023
    Assignee: Cirrus Logic, Inc.
    Inventor: John Paul Lesso
  • Patent number: 11653150
    Abstract: This application relates to audio driving circuitry (100), and in particular to audio driving circuitry for outputting first and second audio driving signals for driving a stereo audio load (106), which may be a stereo audio load of an accessory apparatus (102) removably coupled to the audio driving circuitry in use. A load monitor (111) is provided for monitoring to monitor, from a monitoring node (112), an indication of a common mode return current passing through a common return path, together with an indication of a common mode component of the first and second audio driving signals and to determine an impedance characteristic of the stereo audio load. The load monitor (111) can provide dynamic monitoring of any significant change in load impedance. In some embodiments the load monitor (111) comprises an adaptive filter (301) which adapts a parameter of the filter which is related to the load impedance so as to determine the indication of load impedance.
    Type: Grant
    Filed: November 2, 2021
    Date of Patent: May 16, 2023
    Assignee: Cirrus Logic, Inc.
    Inventors: John Paul Lesso, Mark James McCloy-Stevens, John Bruce Bowlerwell, Yanto Suryono, Xin Zhao, Morgan Timothy Prior
  • Publication number: 20230129489
    Abstract: The present disclosure relates to a neuron for an artificial neural network. The neuron comprises a dot product engine operative to: receive a set of weights; receive a set of data inputs based on a set of input data signals; and calculate the dot product of the set of data inputs and the set of weights to generate a dot product engine output. The neuron further comprises an activation function module arranged to apply an activation function to a signal indicative of the dot product engine output to generate a neuron output; and gain control circuitry. The gain control circuitry is operative to control: an input gain applied to the input data signals to generate the set of data inputs; and an output gain applied to the dot product engine output or by the activation function module. The output gain is selected to compensate for the applied input gain.
    Type: Application
    Filed: December 27, 2022
    Publication date: April 27, 2023
    Applicant: Cirrus Logic International Semiconductor Ltd.
    Inventor: John Paul LESSO
  • Patent number: 11638078
    Abstract: There is described a switchable microphone device which may be switched between a digital output mode and an analog output mode. There is further described a system for use of such a device, which allows for the switching between analog and digital computing modes.
    Type: Grant
    Filed: August 23, 2021
    Date of Patent: April 25, 2023
    Assignee: Cirrus Logic, Inc.
    Inventor: John Paul Lesso
  • Patent number: 11631402
    Abstract: A method of detecting a replay attack comprises: receiving an audio signal representing speech; identifying speech content present in at least a portion of the audio signal; obtaining information about a frequency spectrum of each portion of the audio signal for which speech content is identified; and, for each portion of the audio signal for which speech content is identified: retrieving information about an expected frequency spectrum of the audio signal; comparing the frequency spectrum of portions of the audio signal for which speech content is identified with the respective expected frequency spectrum; and determining that the audio signal may result from a replay attack if a measure of a difference between the frequency spectrum of the portions of the audio signal for which speech content is identified and the respective expected frequency spectrum exceeds a threshold level.
    Type: Grant
    Filed: May 7, 2020
    Date of Patent: April 18, 2023
    Assignee: Cirrus Logic, Inc.
    Inventors: John Paul Lesso, C├ęsar Alonso
  • Publication number: 20230112556
    Abstract: The present disclosure relates to a neuron for an artificial neural network. The neuron includes: a first dot product engine operative to: receive a first set of weights; receive a set of inputs; and calculate the dot product of the set of inputs and the first set of weights to generate a first dot product engine output. The neuron further includes a second dot product engine operative to: receive a second set of weights; receive an input based on the first dot product engine output; and generate a second dot product engine output based on the product of the first dot product engine output and a weight of the second set of weights. The neuron further includes an activation function module arranged to generate a neuron output based on the second dot product engine output. The first dot product engine and the second dot product engine are structurally or functionally different.
    Type: Application
    Filed: November 18, 2022
    Publication date: April 13, 2023
    Applicant: Cirrus Logic International Semiconductor Ltd.
    Inventor: John Paul LESSO
  • Patent number: 11615803
    Abstract: A method for use in a biometric process, comprising: with a headset in a known acoustic environment, applying an acoustic stimulus at a first transducer of the headset; receiving a response signal at a second transducer of the headset, the response signal comprising a component of the acoustic stimulus reflected at an obstacle in the acoustic path of the first transducer; determining a condition of the headset based on the response signal; and performing the biometric process based on the determined condition.
    Type: Grant
    Filed: October 22, 2021
    Date of Patent: March 28, 2023
    Assignee: Cirrus Logic, Inc.
    Inventors: Thomas Ivan Harvey, John Paul Lesso, William Erik Sherwood, Fredrick D. Geiger
  • Patent number: 11609977
    Abstract: A biometric processor comprises: one or more inputs configured to receive first ear biometric data acquired in respect of a first ear of a user and second ear biometric data acquired in respect of a second ear of the user; a processing module configured to perform a biometric algorithm on the first ear biometric data and the second ear biometric data, based on a comparison of the first ear biometric data to a first stored ear biometric template for an authorised user and a comparison of the second ear biometric data to a second stored ear biometric template for the authorised user, to obtain respective first and second biometric scores; a fusion module configured to apply first and second weights to the respective first and second biometric scores to obtain first and second weighted biometric scores, and to combine at least the first and second weighted biometric scores to generate an overall biometric score, wherein the first and second weights are different to each other; and wherein a biometric result is b
    Type: Grant
    Filed: March 18, 2020
    Date of Patent: March 21, 2023
    Assignee: Cirrus Logic, Inc.
    Inventors: John Paul Lesso, William E. Sherwood, Patrick Bardsley, Khaled Lakhdhar
  • Patent number: 11604977
    Abstract: This application relates to computing circuitry (200), in particular for analogue computing circuitry suitable for neuromorphic computing. The circuitry (200) has a plurality of memory cells (201), each memory cell having an input electrode (201) for receiving a cell input signal and an output (203P, 203N) for outputting a cell output signal (IP, IN), with first and second paths connecting the input electrode to the output. The cell output signal thus depends on a differential current between the first and second paths due to the cell input signal. Each memory cell also comprises at least one programmable-resistance memory element (204) in each of the first and second paths and is controllable, by selective programming of the programmable-resistance memory elements, to store a data digit that can take any of at least three different values.
    Type: Grant
    Filed: April 27, 2020
    Date of Patent: March 14, 2023
    Assignee: Cirrus Logic, Inc.
    Inventors: John Paul Lesso, John Laurence Pennock
  • Publication number: 20230058320
    Abstract: A method for use in a biometric process, comprising: for a first function and a second function, applying an acoustic stimulus to a user's ear; and for the second function: receiving a response signal of a user's ear to the acoustic stimulus; and extracting, from the response signal, one or more features for use in a biometric process, wherein the first function is a function other than to induce the response signal for use in the biometric process.
    Type: Application
    Filed: November 4, 2022
    Publication date: February 23, 2023
    Applicant: Cirrus Logic International Semiconductor Ltd.
    Inventors: Thomas Ivan HARVEY, John Paul LESSO
  • Patent number: 11574176
    Abstract: The present disclosure relates to a neuron for an artificial neural network. The neuron comprises a dot product engine operative to: receive a set of weights; receive a set of data inputs based on a set of input data signals; and calculate the dot product of the set of data inputs and the set of weights to generate a dot product engine output. The neuron further comprises an activation function module arranged to apply an activation function to a signal indicative of the dot product engine output to generate a neuron output; and gain control circuitry. The gain control circuitry is operative to control: an input gain applied to the input data signals to generate the set of data inputs; and an output gain applied to the dot product engine output or by the activation function module. The output gain is selected to compensate for the applied input gain.
    Type: Grant
    Filed: February 12, 2020
    Date of Patent: February 7, 2023
    Assignee: Cirrus Logic, Inc.
    Inventor: John Paul Lesso
  • Publication number: 20230013761
    Abstract: This application relates to computing circuitry, and in particular to analogue computing circuitry suitable for neuromorphic computing. An analogue computation unit for processing data is supplied with a first voltage from a voltage regulator which is operable in a sequence of phases to cyclically regulate the first voltage. A controller is configured to control operation of the voltage regulator and/or the analogue computation unit, such that the analogue computation unit processes data during a plurality of compute periods that avoid times at which the voltage regulator undergoes a phase transition which is one of a predefined set of phase transitions between defined phases in said sequence of phases. This avoids performing computation operations during a phase transition of the voltage regulator that could result in a transient or disturbance in the first voltage, which could adversely affect the computing.
    Type: Application
    Filed: September 19, 2022
    Publication date: January 19, 2023
    Applicant: Cirrus Logic International Semiconductor Ltd.
    Inventor: John Paul LESSO
  • Patent number: 11558706
    Abstract: This application relates an activity detector (100) for detecting signal activity in an input audio signal (SIN), such as may be used for always-on speech detection. The activity detector has a first time-encoding modulator (TEM) 101 including a first hysteretic comparator (201) for generating a PWM (pulse-width modulation) signal based on the input audio signal. A second TEM (103) having a second hysteretic comparator (401) is arranged to receive a reference voltage (VMID) and generate a clock signal (SCLK). A time-decoding converter (102) receives the clock signal and generates count values of a number of cycles of the clock signal in periods defined by the PWM signal. An activity monitor (104) is responsive to a count signal (SCT) from the TDC 102 to determine whether the input audio signal comprises signal activity above a defined threshold.
    Type: Grant
    Filed: December 16, 2020
    Date of Patent: January 17, 2023
    Assignee: Cirrus Logic, Inc.
    Inventor: John Paul Lesso
  • Patent number: 11551075
    Abstract: The present disclosure relates to a neuron for an artificial neural network. The neuron includes: a first dot product engine operative to: receive a first set of weights; receive a set of inputs; and calculate the dot product of the set of inputs and the first set of weights to generate a first dot product engine output. The neuron further includes a second dot product engine operative to: receive a second set of weights; receive an input based on the first dot product engine output; and generate a second dot product engine output based on the product of the first dot product engine output and a weight of the second set of weights. The neuron further includes an activation function module arranged to generate a neuron output based on the second dot product engine output. The first dot product engine and the second dot product engine are structurally or functionally different.
    Type: Grant
    Filed: March 17, 2020
    Date of Patent: January 10, 2023
    Assignee: Cirrus Logic, Inc.
    Inventor: John Paul Lesso
  • Publication number: 20230005470
    Abstract: A method of own voice detection is provided for a user of a device. A first signal is detected, representing air-conducted speech using a first microphone of the device. A second signal is detected, representing bone-conducted speech using a bone-conduction sensor of the device. The first signal is filtered to obtain a component of the first signal at a speech articulation rate, and the second signal is filtered to obtain a component of the second signal at the speech articulation rate. The component of the first signal at the speech articulation rate and the component of the second signal at the speech articulation rate are compared, and it is determined that the speech has not been generated by the user of the device, if a difference between the component of the first signal at the speech articulation rate and the component of the second signal at the speech articulation rate exceeds a threshold value.
    Type: Application
    Filed: September 13, 2022
    Publication date: January 5, 2023
    Applicant: Cirrus Logic International Semiconductor Ltd.
    Inventor: John Paul LESSO
  • Patent number: 11539335
    Abstract: This application relates to method and apparatus for driving acoustic transducers, such as speakers or haptic transducers. A transducer driver circuit (200) has a hysteretic comparator (201) configured to compare, with hysteresis, an input signal (SIN) received at a first comparator input to a feedback signal (SFB) received at a second comparator input. Based on the comparison the hysteretic comparator (201) generates a pulse-width modulation (PWM) signal (SPWM) at a comparator output (206). An inductor (203) is coupled between the comparator output and an output node (204). In use a resistive component (208), which may comprise the transducer (301) is coupled to output node (204). The inductor (203) and resistive component (208) provide filtering to the PWM signal (SPWM). A feedback path extends between the output node (204) and the second comparator input to provide the feedback signal (SFB).
    Type: Grant
    Filed: April 9, 2020
    Date of Patent: December 27, 2022
    Assignee: Cirrus Logic, Inc.
    Inventor: John Paul Lesso
  • Patent number: 11531738
    Abstract: A method for use in a biometric process, comprising: for a first function and a second function, applying an acoustic stimulus to a user's ear; and for the second function: receiving a response signal of a user's ear to the acoustic stimulus; and extracting, from the response signal, one or more features for use in a biometric process, wherein the first function is a function other than to induce the response signal for use in the biometric process.
    Type: Grant
    Filed: March 30, 2020
    Date of Patent: December 20, 2022
    Assignee: Cirrus Logic, Inc.
    Inventors: Thomas Ivan Harvey, John Paul Lesso
  • Publication number: 20220383882
    Abstract: This application relates to methods and apparatus for transfer of multiple digital data streams, especially of digital audio data over a single communications link such as a single wire. The application describes audio interface circuitry comprising a pulse-length-modulation (PLM) modulator. The PLM is responsive to a plurality of data streams (PDM-R, PDM-L), to generate a series of data pulses (PLM) with a single data pulse having a rising and falling edge in each of a plurality of transfer periods defined by a first clock signal (TCLK). The timing of the rising and falling edge of each data pulse is dependent upon a combination of the then current data samples from the plurality of data streams. The duration and position of the data pulse in the transfer window in effect defines a data symbol encoding the data. Circuitry for receiving and extracting the data is also disclosed.
    Type: Application
    Filed: June 21, 2022
    Publication date: December 1, 2022
    Applicant: Cirrus Logic International Semiconductor Ltd.
    Inventors: John Paul LESSO, Peter John FRITH, John Laurence PENNOCK
  • Patent number: 11513010
    Abstract: This application relates to methods and apparatus for temperature monitoring for integrated circuits, and in particular to temperature monitoring using a locked-loop circuits, e.g. FLLs, PLLs or DLLs. According to embodiments a locked-loop circuit includes a controlled signal timing module, wherein the timing properties of an output signal (SOUT, SFB) are dependent on a value of a control signal and on temperature. A controller compares a feedback signal (SFB) output from the timing module to a reference signal (SREF) and generates a control signal (SC) to maintain a desired timing relationship. A temperature monitor monitors temperature based on the value of the control signal. For FLLs and PLLs the signal timing module may be a controlled oscillator.
    Type: Grant
    Filed: January 14, 2021
    Date of Patent: November 29, 2022
    Assignee: Cirrus Logic, Inc.
    Inventors: John Paul Lesso, Gordon James Bates