Patents by Inventor John Paul Lesso

John Paul Lesso has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11251787
    Abstract: This application relates to time-encoding modulators (TEMs). A TEM (100) receives an input signal (SIN) and outputs a time encoded signal (SPWM). A comparator (101) is located within a forward signal path of a feedback loop of the TEM. Also in the feedback loop are a filter (104) and a delay element (106) for applying a controlled delay. In some embodiments a latching element (101, 302; 106, 402) is located within the forward signal path to synchronise any signal transitions output from the latching element to a received first clock signal. Any signal transitions in the output (SOUT) from the modulator are thus synchronised to the first clock signal. In some embodiments the delay element (106) is a digital delay element which is synchronised to the first clock signal.
    Type: Grant
    Filed: August 20, 2020
    Date of Patent: February 15, 2022
    Assignee: Cirrus Logic, Inc.
    Inventor: John Paul Lesso
  • Patent number: 11233487
    Abstract: The application describes method and apparatus for amplification. An amplifier circuit (300) is described for driving a load (101) connected between first and second output nodes (103p, 103n) based on an input signal (Sin). The amplifier circuit includes first and second signal paths for generating respective first and second driving signals (Soutp and Soutn) at the first and second output nodes, each of the first and second signal paths comprising a respective sigma-delta modulator (301p, 301n). A correlation controller (302) is configured to control the first and second signal paths to provide correlation between at least some noise components of the first and second driving signals.
    Type: Grant
    Filed: September 8, 2020
    Date of Patent: January 25, 2022
    Assignee: Cirrus Logic, Inc.
    Inventor: John Paul Lesso
  • Patent number: 11227609
    Abstract: A method of analysis of an audio signal comprises: receiving an audio signal representing speech; extracting first and second components of the audio signal representing first and second acoustic classes of the speech respectively; analysing the first and second components of the audio signal with models of the first and second acoustic classes of the speech of an enrolled user. Based on the analysing, information is obtained information about at least one of a channel and noise affecting the audio signal.
    Type: Grant
    Filed: October 10, 2018
    Date of Patent: January 18, 2022
    Assignee: Cirrus Logic, Inc.
    Inventor: John Paul Lesso
  • Patent number: 11227607
    Abstract: A method of speaker identification comprises receiving an audio signal representing speech; performing a first voice biometric process on the audio signal to attempt to identify whether the speech is the speech of an enrolled speaker; and, if the first voice biometric process makes an initial determination that the speech is the speech of an enrolled user, performing a second voice biometric process on the audio signal to attempt to identify whether the speech is the speech of the enrolled speaker. The second voice biometric process is selected to be more discriminative than the first voice biometric process.
    Type: Grant
    Filed: January 23, 2018
    Date of Patent: January 18, 2022
    Assignee: Cirrus Logic, Inc.
    Inventor: John Paul Lesso
  • Patent number: 11223360
    Abstract: This application relates to control of semiconductor devices, in particular MOS devices, so as to reduce RTS/flicker noise. A circuit (100) includes a first MOS device (103, 104) and a bias controller (107). The circuit is operable in at least a first circuit state (PRO) in which the first MOS device is active to contribute to a first signal (Sout) and a second circuit state (PRST) in which the first MOS device does not contribute to the first signal. The bias controller is operable to control voltages at one or more terminals of the first MOS device to apply a pre-bias (VRB1, VPB2) during an instance of the second circuit state. The pre-bias is applied to set an occupancy state of charge carriers traps within the first MOS device, to limit noise during subsequent operation in the first circuit state. In embodiments, the bias controller is configured so that at least one parameter of the pre-bias is selectively variable in use based on one or more operating conditions.
    Type: Grant
    Filed: July 21, 2020
    Date of Patent: January 11, 2022
    Assignee: Cirrus Logic, Inc.
    Inventors: John Laurence Pennock, John Paul Lesso
  • Publication number: 20220001421
    Abstract: The present disclosure relates to driver circuitry for driving a piezoelectric transducer. The circuitry comprises: a power supply; a reservoir capacitance; switch network circuitry; and control circuitry. The control circuitry is configured to control operation of the switch network circuitry so as to charge the reservoir capacitance from the power supply and to transfer charge between the reservoir capacitance and the piezoelectric transducer.
    Type: Application
    Filed: July 6, 2020
    Publication date: January 6, 2022
    Applicant: Cirrus Logic International Semiconductor Ltd.
    Inventors: John Paul LESSO, Toru IDO
  • Patent number: 11206487
    Abstract: This application relates to audio driving circuitry (100), and in particular to audio driving circuitry for outputting first and second audio driving signals for driving a stereo audio load (106), which may be a stereo audio load of an accessory apparatus (102) removably coupled to the audio driving circuitry in use. A load monitor (111) is provided for monitoring to monitor, from a monitoring node (112), an indication of a common mode return current passing through a common return path, together with an indication of a common mode component of the first and second audio driving signals and to determine an impedance characteristic of the stereo audio load. The load monitor (111) can provide dynamic monitoring of any significant change in load impedance. In some embodiments the load monitor (111) comprises an adaptive filter (301) which adapts a parameter of the filter which is related to the load impedance so as to determine the indication of load impedance.
    Type: Grant
    Filed: December 10, 2019
    Date of Patent: December 21, 2021
    Assignee: Cirrus Logic, Inc.
    Inventors: John Paul Lesso, Mark James Mccloy-Stevens, John Bruce Bowlerwell, Yanto Suryono, Xin Zhao, Morgan Timothy Prior
  • Publication number: 20210385565
    Abstract: There is described a switchable microphone device which may be switched between a digital output mode and an analog output mode. There is further described a system for use of such a device, which allows for the switching between analog and digital computing modes.
    Type: Application
    Filed: August 23, 2021
    Publication date: December 9, 2021
    Applicant: Cirrus Logic International Semiconductor Ltd.
    Inventor: John Paul LESSO
  • Patent number: 11189300
    Abstract: A method for use in a biometric process, comprising: with a headset in a known acoustic environment, applying an acoustic stimulus at a first transducer of the headset; receiving a response signal at a second transducer of the headset, the response signal comprising a component of the acoustic stimulus reflected at an obstacle in the acoustic path of the first transducer; determining a condition of the headset based on the response signal; and performing the biometric process based on the determined condition.
    Type: Grant
    Filed: October 7, 2020
    Date of Patent: November 30, 2021
    Assignee: Cirrus Logic, Inc.
    Inventors: Thomas Ivan Harvey, John Paul Lesso, William Erik Sherwood, Fredrick D. Geiger
  • Publication number: 20210351755
    Abstract: This application relates to Class D amplifier circuits. A modulator controls a Class D output stage based on a modulator input signal (Dm) to generate an output signal (Vout) which is representative of an input signal (Din). An error block, which may comprise an ADC, generates an error signal (?) from the output signal and the input signal. In various embodiments the extent to which the error signal (?) contributes to the modulator input signal (Dm) is variable based on an indication of the amplitude of the input signal (Din). The error signal may be received at a first input of a signal selector block. The input signal may be received at a second input of the signal selector block. The signal selector block may be operable in first and second modes of operation, wherein in the first mode the modulator input signal is based at least in part on the error signal; and in the second mode the modulator input signal is based on the digital input signal and is independent of the error signal.
    Type: Application
    Filed: July 27, 2021
    Publication date: November 11, 2021
    Applicant: Cirrus Logic International Semiconductor Ltd.
    Inventors: John Paul LESSO, Toru IDO
  • Publication number: 20210344311
    Abstract: The present disclosure relates to Class D amplifier circuitry comprising a mode controller configured to dynamically adjust an operational switching mode of the Class D amplifier over a range between a Class AD mode and a Class BD mode.
    Type: Application
    Filed: July 19, 2021
    Publication date: November 4, 2021
    Applicant: Cirrus Logic International Semiconductor Ltd.
    Inventors: John Paul LESSO, Toru IDO
  • Patent number: 11165436
    Abstract: This application relates to time-encoding modulators (TEMs). A TEM receives an input signal (SIN) and outputs a time-encoded output signal (SOUT). A filter arrangement receives the input signal and also a feedback signal (SFB) from the TEM output, and generates a filtered signal (SFIL) based, at least in part, on the feedback signal. A comparator receives the filtered signal and outputs a time-encoded signal (SPWM) based at least in part on the filtered signal. The time encoding modulator is operable in a first mode with the filter arrangement configured as an active filter and in a second mode with the filter arrangement configured as a passive filter. The filter arrangement may include an op-amp, capacitance and switch network. In the first mode the op-amp is enabled, and coupled with the capacitance to provide the active filter. In the second mode the op-amp is disabled and the capacitance is coupled to a signal path for the feedback signal to provide a passive filter.
    Type: Grant
    Filed: September 18, 2020
    Date of Patent: November 2, 2021
    Assignee: Cirrus Logic, Inc.
    Inventor: John Paul Lesso
  • Patent number: 11164588
    Abstract: A method of detecting a replay attack on a voice biometrics system comprises: receiving an audio signal representing speech; detecting a magnetic field; determining if there is a correlation between the audio signal and the magnetic field; and if there is a correlation between the audio signal and the magnetic field, determining that the audio signal may result from a replay attack.
    Type: Grant
    Filed: July 27, 2020
    Date of Patent: November 2, 2021
    Assignee: Cirrus Logic, Inc.
    Inventors: César Alonso, John Paul Lesso
  • Publication number: 20210303669
    Abstract: Embodiments of the disclosure relate to methods, apparatus and systems for biometric processes. The invention relates to initiating generation of an acoustic stimulus for application to a user's ear and extracting features for use in a biometric process from a measured response signal. The measured response signal may be used to derive one or more quality metrics and the quality metrics may be used to validate features extracted from the measured response. The quality metrics may be used to provide feedback to the user seeking to carry out the biometric process.
    Type: Application
    Filed: April 6, 2021
    Publication date: September 30, 2021
    Applicant: Cirrus Logic International Semiconductor Ltd.
    Inventor: John Paul LESSO
  • Patent number: 11134324
    Abstract: There is described a switchable microphone device which may be switched between a digital output mode and an analog output mode. There is further described a system for use of such a device, which allows for the switching between analog and digital computing modes.
    Type: Grant
    Filed: November 15, 2019
    Date of Patent: September 28, 2021
    Assignee: Cirrus Logic, Inc.
    Inventor: John Paul Lesso
  • Publication number: 20210288807
    Abstract: There is described a system and method for performing biometric authentication, preferably voice biometric authentication. The system has a host device such as a mobile phone and a coupled headset device. The headset device is arranged to receive audio, and to cryptographically protect the audio before transmission to the host device for verification and biometric authentication.
    Type: Application
    Filed: October 1, 2018
    Publication date: September 16, 2021
    Applicant: Cirrus Logic International Semiconductor Ltd.
    Inventors: Michael PAGE, John Paul LESSO
  • Patent number: 11121690
    Abstract: This application relates to Class D amplifier circuits. A modulator controls a Class D output stage based on a modulator input signal (Dm) to generate an output signal (Vout) which is representative of an input signal (Din). An error block, which may comprise an ADC, generates an error signal (?) from the output signal and the input signal. In various embodiments the extent to which the error signal (?) contributes to the modulator input signal (Dm) is variable based on an indication of the amplitude of the input signal (Din). The error signal may be received at a first input of a signal selector block. The input signal may be received at a second input of the signal selector block. The signal selector block may be operable in first and second modes of operation, wherein in the first mode the modulator input signal is based at least in part on the error signal; and in the second mode the modulator input signal is based on the digital input signal and is independent of the error signal.
    Type: Grant
    Filed: August 27, 2019
    Date of Patent: September 14, 2021
    Assignee: Cirrus Logic, Inc.
    Inventors: John Paul Lesso, Toru Ido
  • Publication number: 20210279317
    Abstract: Embodiments of the invention relate to methods, apparatus and systems for biometric processes. The methods include updating stored ear model data for a user following successful authentication of the user. The ear model data may be acquired using a personal audio device that generates an acoustic stimulus and detects a measured response. The acquisition of the ear model data may be responsive to a determination that the personal audio device is inserted into or placed adjacent to the user's ear. The acquisition of the ear model data may also be responsive to the determination that the personal audio device has not been removed from or moved away from the user's ear.
    Type: Application
    Filed: March 3, 2021
    Publication date: September 9, 2021
    Applicant: Cirrus Logic International Semiconductor Ltd.
    Inventor: John Paul LESSO
  • Patent number: 11101778
    Abstract: The present disclosure relates to Class D amplifier circuitry comprising: an input for receiving an input signal; first and second output nodes for driving a load connected between the first and second output nodes. A first driver stage is provided for switching the first node between a first supply rail and a second supply rail, and a second driver stage is provided for switching the second node between the first supply rail and the second supply rail. The Class D amplifier circuitry also includes first driver control circuitry configured to receive a first carrier wave and control the switching of the first driver stage based in part on the first carrier wave; second driver control circuitry configured to receive a second carrier wave and control the switching of the second driver stage based in part on the second carrier wave; and a carrier wave generator configured to provide the first carrier wave and the second carrier wave.
    Type: Grant
    Filed: January 13, 2020
    Date of Patent: August 24, 2021
    Assignee: Cirrus Logic, Inc.
    Inventors: John Paul Lesso, Toru Ido
  • Publication number: 20210257405
    Abstract: There is described a two-terminal multi-level memristor element synthesised from binary memristors, which is configured to implement a variable resistance based on unary or binary code words. There is further described a circuit such as a synapse circuit implemented using a multi-level memristor element.
    Type: Application
    Filed: May 5, 2021
    Publication date: August 19, 2021
    Applicant: Cirrus Logic International Semiconductor Ltd.
    Inventor: John Paul LESSO