Abstract: A method of testing an integrated circuit clearance distance device (“ICCDD”) having a predetermined clearance distance in air requirement and a predetermined isolation voltage limit including calculating a value of the breakdown voltage at the predetermined clearance distance for at least one gas; and selecting a gas in which the ICCDD has a breakdown voltage that is less than the predetermined isolation voltage.

Abstract: An article of manufacture includes a semiconductor die (110) having an integrated circuit (105) on a first side of the die (110), a diffusion barrier (125) on a second side of the die (110) opposite the first side, a mat of carbon nanotubes (112) rooted to the diffusion barrier (125), a die attach adhesive (115) forming an integral mass with the mat (112) of the carbon nanotubes, and a die pad (120) adhering to the die attach adhesive and (115) and the mat (112) of carbon nanotubes for at least some thermal transfer between the die (110) and the die pad (120) via the carbon nanotubes (112). Other articles, integrated circuit devices, structures, and processes of manufacture, and assembly processes are also disclosed.

Abstract: A metal lead frame strip is provided for use in manufacturing a packaged electrical device. A ½ thickness engagement portion of the lead frame strip is encapsulated together with the electrical device in a block of encapsulating material to physically secure the lead frame strip to the device package. The device package is later physically separated from the lead frame strip without leaving residual metal exposed on the separated device package.

Abstract: An article of manufacture includes a semiconductor die (110) having an integrated circuit (105) on a first side of the die (110), a diffusion barrier (125) on a second side of the die (110) opposite the first side, a mat of carbon nanotubes (112) rooted to the diffusion barrier (125), a die attach adhesive (115) forming an integral mass with the mat (112) of the carbon nanotubes, and a die pad (120) adhering to the die attach adhesive and (115) and the mat (112) of carbon nanotubes for at least some thermal transfer between the die (110) and the die pad (120) via the carbon nanotubes (112). Other articles, integrated circuit devices, structures, and processes of manufacture, and assembly processes are also disclosed.

Abstract: A metal lead frame strip is provided for use in manufacturing a packaged electrical device. An engagement portion of the lead frame strip is encapsulated together with the electrical device in a block of encapsulating material to physically secure the lead frame strip to the device package. The device package is later physically separated from the lead frame strip without leaving residual metal exposed on the separated device package.

Abstract: A method of making an IC device includes providing a stack of leadframe sheets each including a plurality of leadframes and an interleaf member interposed between adjacent ones of the leadframe sheets. The interleaf members include indicia that identifies the leadframes sheets. The stack of leadframe sheets is loaded onto an assembly machine. A first interleaf member is removed from the first leadframe sheet. The first leadframe sheet is transferred onto a mounting surface of the assembly machine. Semiconductor die are attached to leadframes on the first leadframe sheet. The method can include reading the indicia from the first interleaf member to determine a part number and lead finish for the first leadframe sheet, verifying the part number for the first leadframe sheet by comparing to a build list, and transferring the first leadframe sheet onto a mounting surface of the assembly machine only if the part number is verified.

Abstract: A method of making an IC device includes providing a stack of leadframe sheets each including a plurality of leadframes and an interleaf member interposed between adjacent ones of the leadframe sheets. The interleaf members include indicia that identifies the leadframes sheets. The stack of leadframe sheets is loaded onto an assembly machine. A first interleaf member is removed from the first leadframe sheet. The first leadframe sheet is transferred onto a mounting surface of the assembly machine. Semiconductor die are attached to leadframes on the first leadframe sheet. The method can include reading the indicia from the first interleaf member to determine a part number and lead finish for the first leadframe sheet, verifying the part number for the first leadframe sheet by comparing to a build list, and transferring the first leadframe sheet onto a mounting surface of the assembly machine only if the part number is verified.

Abstract: A semiconductor device (400) with a plastic package (401) having on its surface (401a) a mark (402) identifying the location, where the runner for the molding compound was broken off. The device further exhibits a leadframe with a pad, which has a planar area (403) and a tab (404). The tab is bent at an angle (405) between 120° and 160°, preferably about 135°, towards the planar area and reaches a height (406) over the area. At least portions of the leadframe, including the pad and the tab, are encapsulated by the package; the tab (404) is parallel to the package side (401a) with the mark (402). The device has a semiconductor chip (410) attached to the pad; the thickness (411) of the chip is between 0.5 times and 1.0 times, preferably about 0.7 times, the tab height over the pad.

Abstract: A method of reducing a likelihood that a die pad will be delaminated from a die in an integrated circuit die package for a structure design during an attachment of a heat sink member to the die pad using solder, is provided. A sample structure of the structure design is evaluated to determine whether a volume of last solidification for the solder is centrally located with respect to the die pad and is located at or near an interface of the solder and the die pad. If the last solidification volume is centrally located and is located at or near the interface of the solder and the die pad, and if the die pad is delaminated from the die, the structure design is modified so that less metal of the heat sink member is centrally located than before the modifying.

Abstract: A method of reducing a likelihood that a die pad will be delaminated from a die in an integrated circuit die package for a structure design during an attachment of a heat sink member to the die pad using solder, is provided. A sample structure of the structure design is evaluated to determine whether a volume of last solidification for the solder is centrally located with respect to the die pad and is located at or near an interface of the solder and the die pad. If the last solidification volume is centrally located and is located at or near the interface of the solder and the die pad, and if the die pad is delaminated from the die, the structure design is modified so that less metal of the heat sink member is centrally located than before the modifying.

Abstract: A method of thermally testing for whether an integrated circuit die is attached to a die pad, is provided. Heat is applied from an external heat source to a first side of the die pad. The die is attached to a second side of the die pad. The second side of the die pad is opposite the first side of the die pad. A temperature of the die is measured at a first die location on the die. The die pad is located between the external heat source and the first die location. This method may be performed using a thermal test apparatus having a socket and the external heat source. The socket is adapted to receive and retain one or more leads of a die package. The apparatus may further include a mechanism adapted to move the heat source toward the first side of the die pad.