Patents by Inventor John S. Packer

John S. Packer has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7016999
    Abstract: A SCSI message manipulation circuit in a SCSI expander detects a specified SCSI message from either a SCSI initiator, or a SCSI target. After detecting the specified SCSI message, the SCSI message manipulation circuit detects a pre-selected message-unit, e.g., a specific byte, within the message. Upon detecting the pre-selected message unit, the SCSI message manipulation circuit sets a pre-selected sub-unit, e.g., a bit, within the pre-selected message-unit to a state, which is programmable, as the SCSI message passes through the SCSI expander.
    Type: Grant
    Filed: February 5, 2002
    Date of Patent: March 21, 2006
    Assignee: Adaptec, Inc.
    Inventor: John S. Packer
  • Patent number: 6948024
    Abstract: An expander device and method for isolating bus segments from one another in an I/O subsystem. The expander device is arranged to couple the bus segments for communication in the I/O subsystem. The expander device includes a first I/O interface circuit, a second I/O interface circuit, and an expander controller. The first I/O interface circuit is configured to be coupled to a first bus segment and is adapted to interface input and output communication signals with the first bus segment. The second I/O interface circuit is configured to be coupled to a second bus segment and is adapted to interface the input and output communication signals with the second bus segment. The expander controller is coupled to communicate the input and output communication signals between the first and second I/O interface circuits. The expander controller is further arranged to control communication between the bus segments and includes a segment controller adapted to generate a first signal.
    Type: Grant
    Filed: May 1, 2001
    Date of Patent: September 20, 2005
    Assignee: Adaptec, Inc.
    Inventors: John S. Packer, Lawrence J. Lamers
  • Patent number: 6862642
    Abstract: Expander device and method for resetting bus segments in I/O subsystem to clear bus hang in an I/O subsystem having a plurality of bus segments. Each bus segment in the I/O subsystem includes a set of devices and a bus that is coupled to the set of devices. In addition, the I/O subsystem includes at least one expander, each expander being arranged to couple a pair of buses for propagating communication signals. A reset signal is asserted on a first bus segment. In response to the reset signal, each expander coupled to the first bus segment and each device in the first bus segment reset themselves. Additionally, each expander coupled to the first bus segment isolates the reset signal such that the reset signal is not propagated to the other bus segments. For each expander coupled to the first bus segment, all communication signals are isolated such that each expander prevents propagation of the communication signals between the first bus and other bus.
    Type: Grant
    Filed: May 15, 2001
    Date of Patent: March 1, 2005
    Assignee: Adaptec, Inc.
    Inventors: John S. Packer, Lawrence J. Lamers
  • Patent number: 6816915
    Abstract: The present invention provides methods for automatically discovering topology map of an I/O subsystem. The I/O subsystem is coupled to one or more host computers and includes one or more peripheral buses, a set of peripheral devices, and a set of expanders with each expander having a valid expander address and being arranged to couple a pair of the peripheral buses. The peripheral devices and the one or more host computers are coupled to the peripheral buses. A host computer selects a peripheral device as a target device and writes a set of entries to the selected target device. Each entry written an expander address field initialized to an invalid expander address for storing an expander address. The host computer then selects the target device and reads the set of entries from the target device.
    Type: Grant
    Filed: March 2, 2001
    Date of Patent: November 9, 2004
    Assignee: Adaptec, Inc.
    Inventor: John S. Packer
  • Patent number: 6804739
    Abstract: A SCSI selective options message delay expander includes a capability for monitoring messages transferred between a first port and a second port of the expander, for delaying a pre-selected message, for modifying the delayed pre-selected message, and for storing information obtained from the delayed pre-selected message. The ability to change messages allows the expander to be used with SCSI initiators and/or SCSI target devices that have SCSI characteristics different from the SCSI characteristics of the expander.
    Type: Grant
    Filed: February 5, 2002
    Date of Patent: October 12, 2004
    Assignee: Adaptec, Inc.
    Inventors: B. Arlen Young, John S. Packer, Wei Chuan Goh
  • Patent number: 6754720
    Abstract: The present invention provides methods for automatically assigning addresses to expanders in a computer I/O subsystem that is coupled to one or more host computers. The computer I/O subsystem includes one or more peripheral buses, a set of peripheral devices, and a set of expanders with each expander being arranged to couple a pair of peripheral buses. The peripheral devices are coupled to the peripheral buses. In this configuration, a host computer selects a peripheral device as a target device and writes an address data pattern to the selected target device. The host computer then selects the target device and reads the address data pattern from the target device. Unique addresses are then assigned to one or more expanders coupling the host computer and the target device starting from the address data pattern, preferably by incrementing the address data pattern.
    Type: Grant
    Filed: March 2, 2001
    Date of Patent: June 22, 2004
    Assignee: Adaptec, Inc.
    Inventor: John S. Packer
  • Patent number: 6751693
    Abstract: The present invention provides a method for assigning addresses to expanded devices in a computer I/O subsystem, which has one or more buses. Each bus has an N-bit data bus for communication. One or more types of expanded devices are provided in the computer I/O subsystem and are coupled to one or more peripheral buses. An expanded address space is defined for the one or more types of expanded devices by partitioning an N-bit data bus into a pair of fields that includes an expanded ID field and an expanded signature field. An address is assigned to each of the expanded devices by assigning an expanded signature to each type of the expanded devices. In addition, an expanded ID is assigned to each expanded device within each type of the expanded devices, wherein more than two bits are asserted in the address.
    Type: Grant
    Filed: March 2, 2001
    Date of Patent: June 15, 2004
    Assignee: Adaptec, Inc.
    Inventors: Charles A. Monia, John S. Packer
  • Patent number: 6449111
    Abstract: Write and read processes for a disk drive handle data and overhead fields in a data frame that extends between two servo sectors on a disk. A write process fills a buffer with both data values and overhead values sufficient to fill a data frame and then writes the entire data frame based on the values in the buffer. Accordingly, activation of a separate formatting circuit is not required as those fields are written, and the write operation does not require sector pulses to control the timing for writing individual data sectors in the data frame. The overhead fields written include VFO fields and data synchronization fields. The read process uses timing signals derived from detection of servo sectors and data synchronization fields but otherwise sequentially reads data and overhead fields and transfers those fields to a buffer. The data in a requested sector can be separated from overhead information and data of other sectors in the buffer, when the disk drive outputs the requested data.
    Type: Grant
    Filed: September 15, 1998
    Date of Patent: September 10, 2002
    Assignee: Adaptec, Inc.
    Inventors: Fred A. Kool, John S. Packer
  • Patent number: 6373794
    Abstract: Disclosed is a disc drive system that includes a digital signal processor for processing information sectors read from a CD media. The digital signal processor is configured to parse the information sectors into data frames and subcode frames. A data auto-start unit for triggering a data transfer to a buffer memory when a desired data frame is detected. A subcode auto-start unit for triggering a subcode transfer to the buffer memory when a desired subcode frame is detected. Preferably, the desired data frame and the desired subcode frame have a same MSF. The disc drive system further includes a buffer manager having a plurality of counters that are configured to track the number of data frames and the number of subcode frames being transferred to the buffer memory, and releasing a block including one of the data frames and one of the subcode frames when the counters indicate that the block is complete.
    Type: Grant
    Filed: January 19, 2001
    Date of Patent: April 16, 2002
    Assignee: STMicroelectronics N.V.
    Inventor: John S. Packer
  • Publication number: 20010002894
    Abstract: Disclosed is a disc drive system that includes a digital signal processor for processing information sectors read from a CD media. The digital signal processor is configured to parse the information sectors into data frames and subcode frames. A data auto-start unit for triggering a data transfer to a buffer memory when a desired data frame is detected. A subcode auto-start unit for triggering a subcode transfer to the buffer memory when a desired subcode frame is detected. Preferably, the desired data frame and the desired subcode frame have a same MSF. The disc drive system further includes a buffer manager having a plurality of counters that are configured to track the number of data frames and the number of subcode frames being transferred to the buffer memory, and releasing a block including one of the data frames and one of the subcode frames when the counters indicate that the block is complete.
    Type: Application
    Filed: January 19, 2001
    Publication date: June 7, 2001
    Inventor: John S. Packer
  • Patent number: 6229769
    Abstract: Disclosed is a disc drive system that includes a digital signal processor for processing information sectors read from a CD media. The digital signal processor is configured to parse the information sectors into data frames and subcode frames. A data auto-start unit for triggering a data transfer to a buffer memory when a desired data frame is detected. A subcode auto-start unit for triggering a subcode transfer to the buffer memory when a desired subcode frame is detected. Preferably, the desired data frame and the desired subcode frame have a same MSF. The disc drive system further includes a buffer manager having a plurality of counters that are configured to track the number of data frames and the number of subcode frames being transferred to the buffer memory, and releasing a block including one of the data frames and one of the subcode frames when the counters indicate that the block is complete.
    Type: Grant
    Filed: August 18, 1997
    Date of Patent: May 8, 2001
    Assignee: STMicroelectronics N.V.
    Inventor: John S Packer
  • Patent number: 6131138
    Abstract: The present invention provides an improved disc drive. In one embodiment of the present invention a disc drive capable of spinning a disc, which contains more than one type of data is disclosed. A first type of data is associated with a first speed, and a second type of data is associated with a second speed that is faster than the first speed. The disc drive includes a drive mechanism, which may spin the compact disc at the first and second speeds and retrieve data from the compact disc at either speed. The disc drive also includes an elastic buffer, which is in communication with the drive mechanism. The buffer receives data from the drive mechanism at a variable input data rate and outputs data at a variable output data rate. Whereby when the drive mechanism spins the compact disc at the second speed the buffer may receive the first type of data without causing the drive mechanism to slow down to the first speed, and the buffer may output the first type of data at the variable output data rate.
    Type: Grant
    Filed: August 18, 1997
    Date of Patent: October 10, 2000
    Assignee: STMicroelectronics N.V.
    Inventors: John S. Packer, Steven D. Wilson
  • Patent number: 6064634
    Abstract: Disclosed is a compact disc apparatus having automatic start capabilities. The compact disc apparatus includes a digital signal processor for reading sectors that have a plurality of EFM frames, and the EFM frames contain at least a data component and a subcode component. Also included is a Q-subcode extractor for retrieving a Q-bit from each of the plurality of EFM frames being read by the digital signal processor. An auto-start unit is further included to analyze and process the retrieved Q-bits from each of the plurality of EFM frames, such that a determination is made as to whether a minute/second/frame derived from the retrieved Q-bits matches a desired start minute/second/frame location. Wherein the data being read from sectors by the digital signal processor starts transferring data to a memory beginning with the desired start minute/second/frame when the match is found by the auto-start unit.
    Type: Grant
    Filed: August 18, 1997
    Date of Patent: May 16, 2000
    Assignee: STMicroelectronics, N.V.
    Inventor: John S. Packer
  • Patent number: 6058453
    Abstract: A disc drive apparatus and a method for synchronizing information components read from a compact disc media are described. The method includes selecting a start minutes/seconds/frames MSF for a data component and triggering a transfer of the data component to a buffer when the start minutes/seconds/frames for the data is detected. The method also includes selecting a start minutes/seconds/frames for a subcode component and triggering a transfer of the subcode component to the buffer when the start minutes/seconds/frames for the subcode is detected. A buffer manager monitors the contents of the buffer and counts the data and subcode components through separate counters. The buffer manager releases the data component and the subcode component to a host from the buffer when synchronization of the data component and the subcode component is detected.
    Type: Grant
    Filed: August 18, 1997
    Date of Patent: May 2, 2000
    Assignee: STMicroelectronics, Inc.
    Inventor: John S. Packer
  • Patent number: 6000018
    Abstract: A disk sequencer, which is loaded with control words from a format table and a frame number associated with the first control word loaded, automatically cycles through loaded control words and finds a control word that corresponds to the current position of a data sector. The disk sequencer includes a first counter that is initialized according to a frame number read from a servo sector or according to an index mark and incremented for each end-of-servo pulse so that the first counter accurately indicates the current position of a data head to a data frame granularity. A second counter is loaded with a data frame number associated with the control words, and the second counter is incremented each time the last control word for a data frame is discarded. For automatic alignment, the disk sequencer cycles through and discards control words until comparison of the counts in the two counters indicates the control words are properly aligned.
    Type: Grant
    Filed: June 17, 1997
    Date of Patent: December 7, 1999
    Assignee: Adaptec, Inc.
    Inventors: John S. Packer, Eric C. Erickson
  • Patent number: 5940862
    Abstract: A disk sequencer uses control words to identify starts and splits in headerless data sectors. Each control word indicates an event-count, an initial event, and a terminal event. The initial event, which can be an EOS pulse, a sector pulse, or a data sync pulse, synchronizes the start of a count until the terminal event. The terminal event causes either generation of a sector pulse indicating a start of a data sector or an interrupt indicating a split in a data sector. A disk sequencer includes an event counter and a data segment sequencer. The event counter starts counting at the initial event, counts the event-count, and generates the sector pulse or interrupt at the end of the event-count. A sector pulse starts a data segment sequencer processing a first data segment of a data sector. The interrupt causes the data segment sequencer to execute an interrupt routine for fields surrounding a servo sector.
    Type: Grant
    Filed: March 24, 1997
    Date of Patent: August 17, 1999
    Assignee: Adaptec, Inc.
    Inventors: Eric C. Erickson, John S. Packer
  • Patent number: 5812755
    Abstract: A headerless hard disk architecture includes tracks that are grouped into logical zones and physical zones. The physical zones contains tracks which have similar data density and rotational velocity and therefore would have the same track format on a defect-free media. The logical zones are subdivisions of the physical zones and contain tracks similarly affected by defects on a media. A single track format for all of the tracks in a logical zone accounts for defects. A first data structure stored in a data buffer indicates boundaries of data sectors as defined by the track formats for the logical zones. A second data structure in the data buffer indicates which of the data sectors contain defects not accounted for by track formats. A disk controller uses a combination of information from the first and second data structures to identify logical data sectors requested for a data transfer.
    Type: Grant
    Filed: September 1, 1995
    Date of Patent: September 22, 1998
    Assignee: Adaptec, Incorporated
    Inventors: Fred A. Kool, John S. Packer
  • Patent number: 5812335
    Abstract: A disk controller for headerless disk drive system contains an EOS counter which increments each time a read/write head passes a servo sector. Control words in a data buffer of the disk drive system and event-counts in registers of the disk controller indicate sizes and relative positions of frame fields between the servo sectors. The disk controller decodes control words from a data buffer to determine which fields are in the data frames and determine event-counts for the frame fields. The position of read/write heads in a data frame is then determined by counting pulses of a read or write clock where counting to an event-count identifies a boundary of a frame field. The disk controller synchronizes with the media at EOS pulses and data synchronization fields and otherwise relies on the event-counts and the read or write clock signal. No sector pulses are required because data segments are identified by timing relative to EOS pulses.
    Type: Grant
    Filed: September 1, 1995
    Date of Patent: September 22, 1998
    Assignee: Adaptec, Inc.
    Inventors: Fred A. Kool, John S. Packer
  • Patent number: 5802584
    Abstract: A disk controller for headerless disk drive system contains a decoder which decodes control words from a data buffer and counts pulses of a byte clock to identify the boundaries of requested data sectors in data frames. To select the control words which correspond to the position of a read/write head relative to media containing the data, the disk controller also contains a programmable alignment processor and an EOS counter that increments in response to EOS pulses generate as the read/write head passes servo sectors. The EOS counter indicates the position of the read/write head by indicating a data frame over which the head is positioned. The alignment processor scans the control words to locate the control word corresponding the data frame indicated by the EOS counter. During the scanning, the alignment processor also aligns logical and physical data sector counters to the position of the read/write head.
    Type: Grant
    Filed: September 1, 1995
    Date of Patent: September 1, 1998
    Assignee: Adaptec, Inc.
    Inventors: Fred A. Kool, John S. Packer
  • Patent number: 5754889
    Abstract: A host interface uses a state machine to control multiple sector transfers between a host computer and a physical storage medium, so that the idle time between sector transfers is minimized and not a function of the local microprocessor. A write sector counter is provided to keep track of the largest segment in a buffer memory so that demands for the local microprocessor is minimized. In addition, start counters pointing at the next sector in the buffer memory are provided to shorten response time in a read cache. BUSY and IRQ timers are provided to accommodate various implementations of BIOS's which may inadvertently clear a host interrupt to lead to a failure condition.
    Type: Grant
    Filed: April 20, 1995
    Date of Patent: May 19, 1998
    Assignee: Adaptec, Inc.
    Inventor: John S. Packer