Abstract: A disk drive system for a constant density recording (CDR) format disk has a microprocessor which generates CDR words from split values stored in a ROM. The CDR words indicate how embedded servo sectors split data sectors into data fields. In one embodiment, during a seek to a track, the microprocessor stores in a data buffer the CDR words for requested data sectors on the track. Alternatively, track CDR tables are stored in the data buffer during start-up and altered during a seek. A disk sequencer reads CDR words from the data buffer into a FIFO buffer as required to locate splits in data sectors. Alternatively the microprocessor writes the CDR word directly into the FIFO buffer. Typically, the microprocessor writes CDR words for a data frame, into the FIFO buffer, during a servo burst preceding the data frame, but the microprocessor can wait two or more servo bursts before writing CDR words for two or more data frames. Data transfer for each requested data sector is initiated by a sector pulse.

Abstract: A host interface uses a state machine to control multiple sector transfers between a host computer and a physical storage medium, so that the idle time between sector transfers is minimized and not a function of the local microprocessor. A write sector counter is provided to keep track of the largest segment in a buffer memory so that demands for the local microprocessor is minimized. In addition, start counters pointing at the next sector in the buffer memory are provided to shorten response time in a read cache. BUSY and IRQ timers are provided to accommodate various implementations of BIOS's which may inadvertently clear a host interrupt to lead to a failure condition.

Abstract: A host interface uses a state machine to control multiple sector transfers between a host computer and a physical storage medium, so that the idle time between sector transfers is minimized and not a function of the local microprocessor. A write sector counter is provided to keep track of the largest segment in a buffer memory so that demands for the local microprocessor is minimized. In addition, start counters pointing at the next sector in the buffer memory are provided to shorten response time in a read cache. BUSY and IRQ timers are provided to accommodate various implementations of BIOS's which may inadvertently clear a host interrupt to lead to a failure condition.

Abstract: According to the principles of this invention, a disk drive includes a page mode buffer memory controller that is used to control transfer of data from and to a buffer memory. The page mode buffer memory controller transfers a page of Nb data bytes from the buffer memory to a host of the disk drive if the data transfer is not interrupted by another request to the page mode buffer memory controller. The transfer of Nb data bytes requires only four overhead clock cycles. The page mode buffer memory controller includes a buffer prioritizer, a memory sequencer, a disk FIFO circuit, a refresh counter, a buffer address generator, and a disk byte counter. The buffer prioritizer receives request signals on port input lines and generates control output signals to the memory sequencer, disk byte counter and buffer address generator. The refresh counter repetitively loads itself with a refresh time period, that is stored in a register, for refreshing the buffer memory.

Abstract: A host interface uses a state machine to control multiple sector transfers between a host computer and a physical storage medium, so that the idle time between sector transfers is minimized and not a function of the local microprocessor. A write sector counter is provided to keep track of the largest segment in a buffer memory so that demands for the local microprocessor is minimized. In addition, start counters pointing at the next sector in the buffer memory are provided to shorten response time in a read cache. BUSY and IRQ timers are provided to accommodate various implementations of BIOS's which may inadvertently clear a host interrupt to lead to a failure condition.

Abstract: The arterial CO.sub.2 monitor and closed loop controller for use with a ventilator monitors a patient's breath and determines PaCO.sub.2 based upon a determination of a deadspace ratio, which is the ratio of the alveolar deadspace to alveolar tidal volume. The method generally comprises the steps of continuously monitoring measurable parameters of a patient's breath; obtaining an input value of PaCO.sub.2 from a blood sample of the patient and using the patients breath parameters and the input value to calculate the deadspace ratio; and continuously determining PaCO.sub.2 based on the assumption that the deadspace ratio subsequently remains constant. Decision rules obtained from other measurable data are preferably also used to identify the onset of changes in the deadspace ratio, and a new deadspace ratio is then determined from the patient's breath parameters and further input value of PaCO.sub.2 from the patient's blood sample.