Abstract: A method for recovering a conduit from a wellbore includes positioning an expander tool having at least one biasing element within the conduit an expander tool and exerting a force against the at least one biasing element to radially expand the conduit to an amount sufficient to fracture solids outside of and in contact with the conduit.

Abstract: A semiconductor device may include a substrate including a first Group IV semiconductor having a recess therein, an active layer comprising a Group III-V semiconductor within the recess, and a buffer layer between the substrate and active layer and comprising a second Group IV semiconductor. The semiconductor device may further include an impurity and point defect blocking superlattice layer adjacent the buffer layer.

Abstract: An electrocoagulation unit for removing one or more dissolved constituents from an untreated feedstock comprises a non-electrically conductive housing having a fluid inlet, a fluid outlet and an interior surface; a cathode and anode arranged within the housing, the cathode and anode each having an ionizing surface, the ionizing surfaces of the anode and cathode in opposed facing relation so as to define a gap having a separation distance therebetween; the cathode and the anode configured to be electrically coupled to a DC power supply in a DC electrical circuit so as to ionize and dissolve the ionizing surface of the anode; and a controller configured to maintain the separation distance at a set value as the ionizing surface of the anode dissolves. A method for using a plurality of electrocoagulation units in series is also provided.

Abstract: A semiconductor device may include a substrate having waveguides thereon, and a superlattice overlying the substrate and waveguides. The superlattice may include stacked groups of layers, with each group of layers comprising a stacked base semiconductor monolayers defining a base semiconductor portion, and at least one non-semiconductor monolayer constrained within a crystal lattice of adjacent base semiconductor portions. The semiconductor device may further include an active device layer on the superlattice including at least one active semiconductor device.

Abstract: A semiconductor device may include a substrate and an inverted T channel on the substrate and including a superlattice. The superlattice may include stacked groups of layers, with each group of layers including stacked base semiconductor monolayers defining a base semiconductor portion, and at least one non-semiconductor monolayer constrained within a crystal lattice of adjacent base semiconductor portions. The semiconductor device may further include source and drain regions on opposing ends of the inverted T channel, and a gate overlying the inverted T channel between the source and drain regions.

Abstract: A method for making a semiconductor device may include forming an inverted T channel on a substrate, with the inverted T channel comprising a superlattice. The superlattice may include a plurality of stacked groups of layers, with each group of layers comprising a plurality of stacked base semiconductor monolayers defining a base semiconductor portion, and at least one non-semiconductor monolayer constrained within a crystal lattice of adjacent base semiconductor portions. The method may further include forming source and drain regions on opposing ends of the inverted T channel, and forming a gate overlying the inverted T channel between the source and drain.

Abstract: A method for making a semiconductor device may include forming a plurality of waveguides on a substrate, and forming a superlattice overlying the substrate and waveguides. The superlattice may include a plurality of stacked groups of layers, with each group of layers comprising a plurality of stacked base semiconductor monolayers defining a base semiconductor portion, and at least one non-semiconductor monolayer constrained within a crystal lattice of adjacent base semiconductor portions. The method may further include forming an active device layer on the superlattice comprising at least one active semiconductor device.

Abstract: A method for making a semiconductor device may include forming a recess in a substrate including a first Group IV semiconductor, forming an active layer comprising a Group III-V semiconductor within the recess, and forming a buffer layer between the substrate and active layer and comprising a second Group IV semiconductor. The method may further include forming an impurity and point defect blocking superlattice layer adjacent the buffer layer.

Abstract: A semiconductor device may include a semiconductor substrate having a trench therein, and a superlattice liner at least partially covering bottom and sidewall portions of the trench. The superlattice liner may include a plurality of stacked groups of layers, with each group of layers including a plurality of stacked base semiconductor monolayers defining a base semiconductor portion, and at least one non-semiconductor monolayer constrained within a crystal lattice of adjacent base semiconductor portions. The semiconductor device may further include a semiconductor cap layer on the superlattice liner and having a dopant constrained therein by the superlattice liner, and a conductive body within the trench.

Abstract: A semiconductor device may include a substrate including a first Group IV semiconductor having a recess therein, an active layer comprising a Group III-V semiconductor within the recess, and a buffer layer between the substrate and active layer and comprising a second Group IV semiconductor. The semiconductor device may further include an impurity and point defect blocking superlattice layer adjacent the buffer layer.

Abstract: A method for making a semiconductor device may include forming a trench in a semiconductor substrate, and forming a superlattice liner covering bottom and sidewall portions of the trench. The superlattice liner may include a plurality of stacked groups of layers, with each group of layers including a plurality of stacked base semiconductor monolayers defining a base semiconductor portion, and at least one non-semiconductor monolayer constrained within a crystal lattice of adjacent base semiconductor portions. The method may further include forming a semiconductor cap layer on the superlattice liner and having a dopant constrained therein by the superlattice liner, and forming a conductive body within the trench.

Abstract: A method for making a semiconductor device may include forming first and second spaced apart shallow trench isolation (STI) regions in a semiconductor substrate, and forming a superlattice on the semiconductor substrate and extending between the first and second STI regions. The superlattice may include stacked groups of layers, each group of layers including stacked base semiconductor monolayers defining a base semiconductor portion, and at least one non-semiconductor monolayer constrained within a crystal lattice of adjacent base semiconductor portions. The method may also include forming a first semiconductor stringer comprising a non-monocrystalline body at an interface between a first end of the superlattice and the first STI region, and forming a gate above the superlattice.

Abstract: A semiconductor device may include a semiconductor substrate and first and second spaced apart shallow trench isolation (STI) regions therein, and a superlattice on the semiconductor substrate and extending between the first and second STI regions. The superlattice may include stacked groups of layers, with each group of layers including stacked base semiconductor monolayers defining a base semiconductor portion, and at least one non-semiconductor monolayer constrained within a crystal lattice of adjacent base semiconductor portions. The semiconductor device may further include a first semiconductor stringer including a non-monocrystalline body at an interface between a first end of the superlattice and the first STI region, and a gate above the superlattice.

Abstract: A method for making a semiconductor device may include forming a superlattice on a semiconductor substrate including a respective plurality of stacked groups of layers. Each group of layers may include a plurality of stacked base semiconductor monolayers defining a base semiconductor portion, and at least one non-semiconductor monolayer constrained within a crystal lattice of adjacent base semiconductor portions. Further, at least some semiconductor atoms from opposing base semiconductor portions may be chemically bound together through the at least one non-semiconductor monolayer therebetween. The method may further include epitaxially forming a semiconductor layer on the superlattice, and annealing the superlattice to form a buried insulating layer in which the at least some semiconductor atoms are no longer chemically bound together through the at least one non-semiconductor monolayer therebetween.

Abstract: A process and system for treating wastewater is described. The invention degrades sludge produced by treatment of the wastewater to reduce or eliminate the need for sludge dewatering and disposal. The invention also reduces the amount of nutrient additives required to sustain the aerobic wastewater treatment process. In one embodiment the invention includes the steps of (a) providing an aerobic treatment system receiving a supply of the wastewater; (b) treating a supply of the sludge to rupture microbial cells present therein to produce treated sludge having an increased liquid:solid ratio and an increased degradation potential in comparison to untreated sludge; (c) conveying a supply of the treated sludge to the aerobic treatment system; and (d) substantially degrading the supply of treated sludge in the aerobic treatment system. The treated sludge may optionally be subjected to anaerobic digestion prior to delivery to the aerobic treatment system.

Abstract: A method for processing a semiconductor wafer in a single wafer processing chamber may include heating the single wafer processing chamber to a temperature in a range of 650-700° C., and forming at least one superlattice on the semiconductor wafer within the heated single wafer processing chamber by depositing silicon and oxygen to form a plurality of stacked groups of layers. Each group of layers may include a plurality of stacked base silicon monolayers defining a base silicon portion and at least one oxygen monolayer constrained within a crystal lattice of adjacent base silicon portions. Depositing the oxygen may include depositing the oxygen using an N2O gas flow.

Abstract: An apparatus and methods for making a glass ribbon includes a forming wedge with a pair of inclined forming surface portions converging along a downstream direction to form a root. The apparatus further includes an edge director intersecting with at least one of the pair of downwardly inclined forming surface portions, and a replaceable heating cartridge configured to direct heat to the edge director and thermally shield the edge director from heat loss. A replaceable heating cartridge is also provided for directing heat to the edge director and thermally shielding the edge director from heat loss.

Abstract: A method and device for treating spent wash water produced in operations such as heavy truck washing that includes hydraulic classification to remove fine sand and smaller particles from water such that up flow velocity of water plus solids in the classifier cause particulate solids to be retained in the classifier which promotes their agglomeration into larger particle sizes for easier subsequent removal for dewatering and disposal.

Abstract: A method for processing a semiconductor wafer in a single wafer processing chamber may include heating the single wafer processing chamber to a temperature in a range of 650-700° C., and forming at least one superlattice on the semiconductor wafer within the heated single wafer processing chamber by depositing silicon and oxygen to form a plurality of stacked groups of layers. Each group of layers may include a plurality of stacked base silicon monolayers defining a base silicon portion and at least one oxygen monolayer constrained within a crystal lattice of adjacent base silicon portions. Depositing the oxygen may include depositing the oxygen using an N2O gas flow.

Abstract: An apparatus and methods for making a glass ribbon includes a forming wedge with a pair of inclined forming surface portions converging along a downstream direction to form a root. The apparatus further includes an edge director intersecting with at least one of the pair of downwardly inclined forming surface portions, and a replaceable heating cartridge configured to direct heat to the edge director and thermally shield the edge director from heat loss. A replaceable heating cartridge is also provided for directing heat to the edge director and thermally shielding the edge director from heat loss.