Abstract: A method for forming a doped layer is disclosed. The doped layer may be used in a NMOS or a silicon germanium application. The doped layer may be created using an n-type halide species in a n-type dopant application, for example.

Abstract: Methods of reducing wafer bowing in 3D DRAM devices are described using a 3-color process. A plurality of film stacks are formed on a substrate surface, each of the film stacks comprises two doped SiGe layers having different dopant amounts and/or Si:Ge ratios and a doped silicon layer. 3D DRAM devices are also described.

Abstract: A method and apparatus for forming a super-lattice structure on a substrate is described herein. The super-lattice structure includes a plurality of silicon-germanium layers and a plurality of silicon layers disposed in a stacked pattern. The methods described herein produce a super-lattice structure with transition width of less than about 1.4 nm between each of the silicon-germanium layers and an adjacent silicon layer. The methods described herein include flowing one or a combination of a silicon containing gas, a germanium containing gas, and a halogenated species.

Abstract: A method for forming a doped layer is disclosed. The doped layer may be used in a NMOS or a silicon germanium application. The doped layer may be created using an n-type halide species in a n-type dopant application, for example.

Abstract: A system and method for removing both carbon-based contaminants and oxygen-based contaminants from a semiconductor substrate within a single process chamber is disclosed. The invention may comprise utilization of remote plasma units and multiple gas sources to perform the process within the single process chamber.

Abstract: A method for depositing a Group IV semiconductor is disclosed. The method may include, providing a substrate within a reaction chamber and heating the substrate to a deposition temperature. The methods may further include, exposing the substrate to at least one Group IV precursor and exposing the substrate to at least one Group IIIA metalorganic dopant precursor. The methods may further include depositing a Group IV semiconductor on a surface of the substrate. Semiconductor device structures including a Group IV semiconductor deposited by the methods of the disclosure are also provided.

Abstract: A method for depositing a Group IV semiconductor is disclosed. The method may include, providing a substrate within a reaction chamber and heating the substrate to a deposition temperature. The methods may further include, exposing the substrate to at least one Group IV precursor and exposing the substrate to at least one Group IIIA metalorganic dopant precursor. The methods may further include depositing a Group IV semiconductor on a surface of the substrate. Semiconductor device structures including a Group IV semiconductor deposited by the methods of the disclosure are also provided.

Abstract: A method for forming a layer on a substrate includes providing a substrate in a reactor of a semiconductor processing system, the reactor having a divider separating an upper chamber from a lower chamber and a substrate holder therein, the substrate having upper and lower surfaces. The wafer is positioned within the reactor using the substrate holder such that the upper surface bounds the upper chamber, a silicon-containing gas is flowed through the upper chamber to deposit a layer of the upper surface, and a halogen-containing gas is flowed through the lower chamber to etch a deposited film on at least one wall bounding the lower chamber while flowing the silicon-containing gas through the upper chamber. Semiconductor processing systems are also described.

Abstract: A system for removing an oxide material from a surface of a substrate can include a substrate tray to receive the substrate, and a cooling body to receive the substrate tray. The system may include a first temperature control element configured to control a temperature of the substrate tray and a second temperature control element configured to control a temperature of the cooling body, where the first temperature control element and the second temperature control element can be independently controlled. A method for removing oxide material from a surface of a substrate can include providing the substrate on a substrate tray having heating elements, cooling the substrate by transferring heat from the substrate tray to a cooling body, depositing a halogen-containing material on the cooled substrate while the substrate is on the cooling body, and subsequently sublimating the halogen-containing material by heating the cooled substrate by transferring heat from the substrate tray to the substrate.

Abstract: Methods and devices for epitaxially growing boron- and gallium-doped silicon germanium layers. The layers may be used, for example, as a p-type source and/or drain regions in field effect transistors.

Abstract: A flange, flange assembly, and reactor system including the flange and flange assembly are disclosed. An exemplary flange assembly includes heated and cooled sections to independently control temperatures of sections of the flange. Methods of using the flange, flange assembly and reactor system are also disclosed.

Abstract: A reactor system and related methods are provided which may include a heating element in a wafer tray. The heating element may be used to heat the wafer tray and a substrate or wafer seated on the wafer tray within a reaction chamber assembly, and may be used to cause sublimation of a native oxide of the wafer.

Abstract: A method for selectively depositing a Group IV semiconductor on a surface of a substrate is disclosed. The method may include, providing a substrate within a reaction chamber and heating the substrate to a deposition temperature. The method may further include, exposing the substrate to at least one Group IV precursor, and exposing the substrate to at least one Group IIIA halide dopant precursor. Semiconductor device structures including a Group IV semiconductor deposited by the methods of the disclosure are also provided.

Abstract: A method for depositing a Group IV semiconductor on a surface of a substrate is disclosed. The method may include: providing a substrate within a reaction chamber and heating the substrate to a deposition temperature. The methods may further include: exposing the substrate to at least one Group IV precursor and exposing the substrate to at least one Group IIIA dopant precursor; wherein the at least one Group IIIA dopant precursor comprises a borohydride, an organic borohydride, a halide, or an organohalide. Semiconductor device structures including a Group IV semiconductor deposited by the methods of the disclosure are also provided.

Abstract: A method for forming a doped layer is disclosed. The doped layer may be used in a NMOS or a silicon germanium application. The doped layer may be created using an n-type halide species in a n-type dopant application, for example.

Abstract: A method of cleaning an epitaxial reaction chamber in-situ is disclosed. The method may include a pre-coating step, a high temperature baking step, and a gas etching step. The method is able to remove residue buildup within the reaction chamber, which may be made of quartz.

Abstract: Gas-phase reactor systems and methods suitable for use with precursors that are solid phase at room temperature and pressure are disclosed. The systems and methods as described herein can be used to, for example, form amorphous, polycrystalline, or epitaxial layers (e.g., one or more doped semiconductor layers) on a surface of a substrate.

Abstract: A system and method for providing intermediate reactive species to a reaction chamber are disclosed. The system includes an intermediate reactive species formation chamber fluidly coupled to the reaction chamber to provide intermediate reactive species to the reaction chamber. A pressure control device can be used to control an operating pressure of the intermediate reactive species formation chamber, and a heater can be used to heat the intermediate reactive species formation chamber to a desired temperature.

Abstract: A flange, flange assembly, and reactor system including the flange and flange assembly are disclosed. An exemplary flange assembly includes heated and cooled sections to independently control temperatures of sections of the flange. Methods of using the flange, flange assembly and reactor system are also disclosed.

Abstract: A method for forming a forming a silicon germanium tin (SiGeSn) layer is disclosed. The method may include, providing a substrate within a reaction chamber, exposing the substrate to a pre-deposition precursor pulse, which comprises tin tetrachloride (SnCl4), exposing the substrate to a deposition precursor gas mixture comprising a hydrogenated silicon source, germane (GeH4), and tin tetrachloride (SnCl4), and depositing the silicon germanium tin (SiGeSn) layer over a surface of the substrate. Semiconductor device structures including a silicon germanium tin (SiGeSn) layer formed by the methods of the disclosure are also provided.