Patents by Inventor John Tolle

John Tolle has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20190333793
    Abstract: A system for removing an oxide material from a surface of a substrate can include a substrate tray to receive the substrate, and a cooling body to receive the substrate tray. The system may include a first temperature control element configured to control a temperature of the substrate tray and a second temperature control element configured to control a temperature of the cooling body, where the first temperature control element and the second temperature control element can be independently controlled. A method for removing oxide material from a surface of a substrate can include providing the substrate on a substrate tray having heating elements, cooling the substrate by transferring heat from the substrate tray to a cooling body, depositing a halogen-containing material on the cooled substrate while the substrate is on the cooling body, and subsequently sublimating the halogen-containing material by heating the cooled substrate by transferring heat from the substrate tray to the substrate.
    Type: Application
    Filed: June 20, 2019
    Publication date: October 31, 2019
    Inventors: JOHN TOLLE, ERIC R. HILL
  • Patent number: 10446393
    Abstract: A method for forming a silicon-containing epitaxial layer is disclosed. The method may include, heating a substrate to a temperature of less than approximately 950° C. and exposing the substrate to a first silicon source comprising a hydrogenated silicon source, a second silicon source, a dopant source, and a halogen source. The method may also include depositing a silicon-containing epitaxial layer wherein the dopant concentration within the silicon-containing epitaxial layer is greater than 3×1021 atoms per cubic centimeter.
    Type: Grant
    Filed: April 19, 2018
    Date of Patent: October 15, 2019
    Assignee: ASM IP Holding B.V.
    Inventors: Nupur Bhargava, John Tolle, Joe Margetis, Matthew Goodman, Robert Vyne
  • Publication number: 20190304780
    Abstract: Methods for depositing a co-doped polysilicon film on a surface of a substrate within a reaction chamber are provided. The method may include: heating the substrate to a deposition temperature of less than 550° C.; simultaneously contacting the substrate with a silicon precursor, a n-type dopant precursor, and a p-type dopant precursor; and depositing the co-doped polysilicon film on the surface of the substrate. Related semiconductor structures are also disclosed.
    Type: Application
    Filed: March 29, 2018
    Publication date: October 3, 2019
    Inventors: David Kohen, John Tolle
  • Patent number: 10388509
    Abstract: A process for forming a thick defect-free epitaxial layer is disclosed. The process may comprise forming a buffer layer and a sacrificial layer prior to forming the thick defect-free epitaxial layer. The sacrificial layer and the thick defect-free epitaxial layer may be formed of the same material and at the same process conditions.
    Type: Grant
    Filed: June 19, 2017
    Date of Patent: August 20, 2019
    Assignee: ASM IP HOLDING B.V.
    Inventors: Joe Margetis, John Tolle
  • Patent number: 10373850
    Abstract: A system for removing an oxide material from a surface of a substrate can include a substrate tray to receive the substrate, and a cooling body to receive the substrate tray. The system may include a first temperature control element configured to control a temperature of the substrate tray and a second temperature control element configured to control a temperature of the cooling body, where the first temperature control element and the second temperature control element can be independently controlled. A method for removing oxide material from a surface of a substrate can include providing the substrate on a substrate tray having heating elements, cooling the substrate by transferring heat from the substrate tray to a cooling body, depositing a halogen-containing material on the cooled substrate while the substrate is on the cooling body, and subsequently sublimating the halogen-containing material by heating the cooled substrate by transferring heat from the substrate tray to the substrate.
    Type: Grant
    Filed: March 11, 2015
    Date of Patent: August 6, 2019
    Assignee: ASM IP HOLDING B.V.
    Inventors: John Tolle, Eric R. Hill
  • Publication number: 20190237327
    Abstract: A method for depositing a semiconductor structure on a surface of a substrate is disclosed. The method may include: depositing a first group IVA semiconductor layer over a surface of the substrate; contacting an exposed surface of the first group IVA semiconductor layer with a first gas comprising a first chloride gas; and depositing a second group IVA semiconductor layer over a surface of the first group IVA semiconductor layer. Related semiconductor structures are also disclosed.
    Type: Application
    Filed: February 1, 2018
    Publication date: August 1, 2019
    Inventors: David Kohen, Nupur Bhargava, John Tolle, Vijay D'Costa
  • Patent number: 10262859
    Abstract: A gas distribution system is disclosed in order to obtain better film uniformity on a substrate in a cross-flow reactor. The better film uniformity may be achieved by an asymmetric bias on individual injection ports of the gas distribution system. The gas distribution may allow for varied tunability of the film properties.
    Type: Grant
    Filed: January 5, 2018
    Date of Patent: April 16, 2019
    Assignee: ASM IP Holding B.V.
    Inventors: Joe Margetis, John Tolle, Gregory Bartlett, Nupur Bhargava
  • Publication number: 20190027605
    Abstract: A method for depositing a Group IV semiconductor on a surface of a substrate is disclosed. The method may include: providing a substrate within a reaction chamber and heating the substrate to a deposition temperature. The methods may further include: exposing the substrate to at least one Group IV precursor and exposing the substrate to at least one Group IIIA dopant precursor; wherein the at least one Group IIIA dopant precursor comprises a borohydride, an organic borohydride, a halide, or an organohalide. Semiconductor device structures including a Group IV semiconductor deposited by the methods of the disclosure are also provided.
    Type: Application
    Filed: May 21, 2018
    Publication date: January 24, 2019
    Inventors: John Tolle, Joe Margetis
  • Publication number: 20190027584
    Abstract: A method for selectively depositing a Group IV semiconductor on a surface of a substrate is disclosed. The method may include, providing a substrate within a reaction chamber and heating the substrate to a deposition temperature. The method may further include, exposing the substrate to at least one Group IV precursor, and exposing the substrate to at least one Group IIIA halide dopant precursor. Semiconductor device structures including a Group IV semiconductor deposited by the methods of the disclosure are also provided.
    Type: Application
    Filed: June 5, 2018
    Publication date: January 24, 2019
    Inventors: Joe Margetis, John Tolle
  • Publication number: 20190027583
    Abstract: A method for depositing a Group IV semiconductor is disclosed. The method may include, providing a substrate within a reaction chamber and heating the substrate to a deposition temperature. The methods may further include, exposing the substrate to at least one Group IV precursor and exposing the substrate to at least one Group IIIA metalorganic dopant precursor. The methods may further include depositing a Group IV semiconductor on a surface of the substrate. Semiconductor device structures including a Group IV semiconductor deposited by the methods of the disclosure are also provided.
    Type: Application
    Filed: June 5, 2018
    Publication date: January 24, 2019
    Inventors: Joe Margetis, John Tolle
  • Publication number: 20190019670
    Abstract: A system and method for removing both carbon-based contaminants and oxygen-based contaminants from a semiconductor substrate within a single process chamber is disclosed. The invention may comprise utilization of remote plasma units and multiple gas sources to perform the process within the single process chamber.
    Type: Application
    Filed: June 5, 2018
    Publication date: January 17, 2019
    Inventors: Xing Lin, Peipei Gao, Fei Wang, John Tolle, Bubesh Babu Jotheeswaran, Vish Ramanathan, Eric Hill
  • Publication number: 20190013199
    Abstract: A method for forming a forming a silicon germanium tin (SiGeSn) layer is disclosed. The method may include, providing a substrate within a reaction chamber, exposing the substrate to a pre-deposition precursor pulse, which comprises tin tetrachloride (SnCl4), exposing the substrate to a deposition precursor gas mixture comprising a hydrogenated silicon source, germane (GeH4), and tin tetrachloride (SnCl4), and depositing the silicon germanium tin (SiGeSn) layer over a surface of the substrate. Semiconductor device structures including a silicon germanium tin (SiGeSn) layer formed by the methods of the disclosure are also provided.
    Type: Application
    Filed: May 21, 2018
    Publication date: January 10, 2019
    Inventors: Nupur Bhargava, Joe Margetis, John Tolle
  • Publication number: 20180363139
    Abstract: A semiconductor processing apparatus is disclosed. The semiconductor processing apparatus may include: a reaction chamber comprising an upper chamber wall and a lower chamber wall connected by vertical sidewalls, the chamber walls being joined by an upstream inlet flange and a downstream outlet flange wherein a longitudinal direction of the chamber extends from the inlet flange to the outlet flange and a plurality of ribs provided on an outer surface of at least the upper chamber wall, the plurality of ribs being orientated transversely to the longitudinal direction of the chamber. The semiconductor processing apparatus may also include at least one array of heating elements disposed above the reaction chamber and at least one variable positioning device coupled to the at least one array of heating elements and configured to controllably adjust the position of the at least one array of heating elements relative to the position of the plurality of ribs.
    Type: Application
    Filed: April 25, 2018
    Publication date: December 20, 2018
    Inventors: Shiva Rajavelu, John Tolle, Rich McCartney
  • Publication number: 20180323059
    Abstract: A method for forming a silicon-containing epitaxial layer is disclosed. The method may include, heating a substrate to a temperature of less than approximately 950° C. and exposing the substrate to a first silicon source comprising a hydrogenated silicon source, a second silicon source, a dopant source, and a halogen source. The method may also include depositing a silicon-containing epitaxial layer wherein the dopant concentration within the silicon-containing epitaxial layer is greater than 3×1021 atoms per cubic centimeter.
    Type: Application
    Filed: April 19, 2018
    Publication date: November 8, 2018
    Inventors: Nupur Bhargava, John Tolle, Joe Margetis, Matthew Goodman, Robert Vyne
  • Publication number: 20180312968
    Abstract: A reactor system and related methods are provided which may include a heating element in a wafer tray. The heating element may be used to heat the wafer tray and a substrate or wafer seated on the wafer tray within a reaction chamber assembly, and may be used to cause sublimation of a native oxide of the wafer.
    Type: Application
    Filed: July 6, 2018
    Publication date: November 1, 2018
    Inventors: John Tolle, Eric Hill
  • Patent number: 10053774
    Abstract: A reactor system and related methods are provided which may include a heating element in a wafer tray. The heating element may be used to heat the wafer tray and a substrate or wafer seated on the wafer tray within a reaction chamber assembly, and may be used to cause sublimation of a native oxide of the wafer.
    Type: Grant
    Filed: June 12, 2015
    Date of Patent: August 21, 2018
    Assignee: ASM IP Holding B.V.
    Inventors: John Tolle, Eric Hill
  • Publication number: 20180151358
    Abstract: A gas distribution system is disclosed in order to obtain better film uniformity on a substrate in a cross-flow reactor. The better film uniformity may be achieved by an asymmetric bias on individual injection ports of the gas distribution system. The gas distribution may allow for varied tunability of the film properties.
    Type: Application
    Filed: January 5, 2018
    Publication date: May 31, 2018
    Inventors: Joe Margetis, John Tolle, Gregory Bartlett, Nupur Bhargava
  • Publication number: 20180127876
    Abstract: A system and method for providing intermediate reactive species to a reaction chamber are disclosed. The system includes an intermediate reactive species formation chamber fluidly coupled to the reaction chamber to provide intermediate reactive species to the reaction chamber. A pressure control device can be used to control an operating pressure of the intermediate reactive species formation chamber, and a heater can be used to heat the intermediate reactive species formation chamber to a desired temperature.
    Type: Application
    Filed: January 2, 2018
    Publication date: May 10, 2018
    Inventors: John Tolle, Eric Hill, Jereld Lee Winkler
  • Patent number: 9905420
    Abstract: Methods of forming silicon germanium tin (SixGe1-xSny) films are disclosed. Exemplary methods include growing films including silicon, germanium and tin in an epitaxial chemical vapor deposition reactor. Exemplary methods are suitable for high volume manufacturing. Also disclosed are structures and devices including silicon germanium tin films.
    Type: Grant
    Filed: December 1, 2015
    Date of Patent: February 27, 2018
    Assignee: ASM IP Holding B.V.
    Inventors: Joe Margetis, John Tolle
  • Patent number: 9892913
    Abstract: A gas distribution system is disclosed in order to obtain better film uniformity on a substrate in a cross-flow reactor. The better film uniformity may be achieved by an asymmetric bias on individual injection ports of the gas distribution system. The gas distribution may allow for varied tunability of the film properties.
    Type: Grant
    Filed: March 6, 2017
    Date of Patent: February 13, 2018
    Assignee: ASM IP Holding B.V.
    Inventors: Joe Margetis, John Tolle, Gregory Bartlett, Nupur Bhargava