Patents by Inventor John X. Przybysz

John X. Przybysz has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9570695
    Abstract: A cobalt-carbon (Co—C) eutectic metal alloy ohmic contact for a radio-frequency (RF) carbon nanotube (CNT) field effect transistor (FET) device and a method of manufacturing same are disclosed. Embodiments of a method include providing a graphite crucible, placing Co and a C source within the graphite crucible, heating the graphite crucible containing the Co and C source such that the Co and C source combine with graphite from the graphite crucible to thereby form a Co—C eutectic metal alloy, and creating an ohmic contact by depositing the Co—C eutectic metal alloy directly on top surfaces of CNTs of a RF CNT FET device such that the Co—C eutectic metal alloy is in direct contact with the CNTs. The Co—C eutectic metal alloy ohmic contact formed in this manner is consistently stabile and uniform and functions as a high work function layer that also serves as an adhesion layer to the CNTs.
    Type: Grant
    Filed: July 25, 2016
    Date of Patent: February 14, 2017
    Assignee: NORTHROP GRUMMAN SYSTEMS CORPORATION
    Inventors: Monica P. Lilly, Matthew J. Walker, Wayne S. Miller, John X. Przybysz, Andre E. Berghmans
  • Publication number: 20160336524
    Abstract: A cobalt-carbon (Co—C) eutectic metal alloy ohmic contact for a radio-frequency (RF) carbon nanotube (CNT) field effect transistor (FET) device and a method of manufacturing same are disclosed. Embodiments of a method include providing a graphite crucible, placing Co and a C source within the graphite crucible, heating the graphite crucible containing the Co and C source such that the Co and C source combine with graphite from the graphite crucible to thereby form a Co—C eutectic metal alloy, and creating an ohmic contact by depositing the Co—C eutectic metal alloy directly on top surfaces of CNTs of a RF CNT FET device such that the Co—C eutectic metal alloy is in direct contact with the CNTs. The Co—C eutectic metal alloy ohmic contact formed in this manner is consistently stabile and uniform and functions as a high work function layer that also serves as an adhesion layer to the CNTs.
    Type: Application
    Filed: July 25, 2016
    Publication date: November 17, 2016
    Inventors: Monica P. Lilly, Matthew J. Walker, Wayne S. Miller, John X. Przybysz, Andre E. Berghmans
  • Patent number: 9401488
    Abstract: A cobalt-carbon (Co—C) eutectic metal alloy ohmic contact for a radio-frequency (RF) carbon nanotube (CNT) field effect transistor (FET) device and a method of manufacturing same are disclosed. Embodiments of a method include providing a graphite crucible, placing Co and a C source within the graphite crucible, heating the graphite crucible containing the Co and C source such that the Co and C source combine with graphite from the graphite crucible to thereby form a Co—C eutectic metal alloy, and creating an ohmic contact by depositing the Co—C eutectic metal alloy directly on top surfaces of CNTs of a RF CNT FET device such that the Co—C eutectic metal alloy is in direct contact with the CNTs. The Co—C eutectic metal alloy ohmic contact formed in this manner is consistently stabile and uniform and functions as a high work function layer that also serves as an adhesion layer to the CNTs.
    Type: Grant
    Filed: December 18, 2014
    Date of Patent: July 26, 2016
    Assignee: NORTHROP GRUMMAN SYSTEMS CORPORATION
    Inventors: Monica P. Lilly, Matthew J. Walker, Wayne S. Miller, John X. Przybysz, Sr., Andre E. Berghmans
  • Publication number: 20160181557
    Abstract: A cobalt-carbon (Co—C) eutectic metal alloy ohmic contact for a radio-frequency (RF) carbon nanotube (CNT) field effect transistor (FET) device and a method of manufacturing same are disclosed. Embodiments of a method include providing a graphite crucible, placing Co and a C source within the graphite crucible, heating the graphite crucible containing the Co and C source such that the Co and C source combine with graphite from the graphite crucible to thereby form a Co—C eutectic metal alloy, and creating an ohmic contact by depositing the Co—C eutectic metal alloy directly on top surfaces of CNTs of a RF CNT FET device such that the Co—C eutectic metal alloy is in direct contact with the CNTs. The Co—C eutectic metal alloy ohmic contact formed in this manner is consistently stabile and uniform and functions as a high work function layer that also serves as an adhesion layer to the CNTs.
    Type: Application
    Filed: December 18, 2014
    Publication date: June 23, 2016
    Inventors: Monica P. Lilly, Matthew J. Walker, Wayne S. Miller, John X. Przybysz, SR., Andre E. Berghmans
  • Patent number: 8559906
    Abstract: An embodiment of a system and method provides a carbon nanotube transistor (CNT) mixer with a low local oscillator power requirement and no inter-modulation products. Specifically, an embodiment of the system and method provides two kinds of device current-voltage (I-V) characteristics on the same integrated circuit: exponential and linear. The CNT I-V characteristics support both the ideal exponential control characteristic (determined by physics constants) and the ideal linear control characteristic (also determined by physics constants), resulting in an ideal multiplier. In other words, the CNT mixer is mathematically equivalent to an ideal multiplier. Such an ideal multiplier can be used as a mixer with low local oscillator power requirement and virtually no inter-modulation products.
    Type: Grant
    Filed: June 24, 2011
    Date of Patent: October 15, 2013
    Assignee: Northrop Grumman Systems Corporation
    Inventors: Dale E. Dawson, John X. Przybysz, Maaz Aziz
  • Publication number: 20120326763
    Abstract: An embodiment of a system and method provides a carbon nanotube transistor (CNT) mixer with a low local oscillator power requirement and no inter-modulation products. Specifically, an embodiment of the system and method provides two kinds of device current-voltage (I-V) characteristics on the same integrated circuit: exponential and linear. The CNT I-V characteristics support both the ideal exponential control characteristic (determined by physics constants) and the ideal linear control characteristic (also determined by physics constants), resulting in an ideal multiplier. In other words, the CNT mixer is mathematically equivalent to an ideal multiplier. Such an ideal multiplier can be used as a mixer with low local oscillator power requirement and virtually no inter-modulation products.
    Type: Application
    Filed: June 24, 2011
    Publication date: December 27, 2012
    Applicant: Northrop Grumman Systems Corporation
    Inventors: Dale E. Dawson, John X. Przybysz, Maaz Aziz
  • Patent number: 7982646
    Abstract: A second order superconductor delta-sigma analog-to-digital modulator having an input for receiving an analog signal, a first integrator coupled to the input, a second integrator cascaded with the first integrator, and a quantum comparator digitizing output from the second integrator reduces quantization noise by providing matched quantum accurate DACs in a feedback loop between output from the quantum comparator and input to the first integrator. The matched quantum accurate feedback DACs produce identically repeatable voltage pulses, may be configured for multi-bit output, may be time-interleaved to permit higher clocking rates, and may be employed in a balanced bipolar configuration to allow inductive input coupling. Bipolar feedback is balanced when gain of a first DAC exceeds gain of a matched, opposite polarity DAC by the amount of implicit feedback from the comparator into the second integrator.
    Type: Grant
    Filed: July 31, 2008
    Date of Patent: July 19, 2011
    Assignee: Northrop Grumman Systems Corporation
    Inventors: Quentin P. Herr, Aaron A. Pesetski, John X. Przybysz, Donald L. Miller
  • Publication number: 20100026538
    Abstract: A second order superconductor delta-sigma analog-to-digital modulator having an input for receiving an analog signal, a first integrator coupled to the input, a second integrator cascaded with the first integrator, and a quantum comparator digitizing output from the second integrator reduces quantization noise by providing matched quantum accurate DACs in a feedback loop between output from the quantum comparator and input to the first integrator. The matched quantum accurate feedback DACs produce identically repeatable voltage pulses, may be configured for multi-bit output, may be time-interleaved to permit higher clocking rates, and may be employed in a balanced bipolar configuration to allow inductive input coupling. Bipolar feedback is balanced when gain of a first DAC exceeds gain of a matched, opposite polarity DAC by the amount of implicit feedback from the comparator into the second integrator.
    Type: Application
    Filed: July 31, 2008
    Publication date: February 4, 2010
    Applicant: NORTHROP GRUMMAN SYSTEMS CORPORATION
    Inventors: Quentin P. Herr, Aaron A. Pesetski, John X. Przybysz, Donald L. Miller
  • Patent number: 5552735
    Abstract: A switch for controlling the throughput of a signal between a pair of input channels and a pair of output channels is provided which receives an input signal from each of the pair of input channels. The switch transmits an output signal to each of the pair of output channels. Four line channels are provided within the switch. Each of the four line channels connects one of the pair of input channels and one of the pair of output channels. Four line channel switches are also provided, one line channel switch provided on each of the line channels. Each of the four line channel switches is controlled by a signal to open or close the four line channels.
    Type: Grant
    Filed: October 7, 1994
    Date of Patent: September 3, 1996
    Assignee: Northrop Grumman Corporation
    Inventors: Joonhee Kang, John X. Przybysz, Anthony H. Worsham
  • Patent number: 5341136
    Abstract: A bandpass sigma-delta modulator for an analog-to-digital converter is provided in which an RLC circuit connected to the input analog signal is resonant at an intermediate frequency. A Josephson junction connected to the RLC circuit receives the current flowing through the RLC circuit. The Josephson junction emits a voltage pulse which reduces the RLC circuit current when the current in the Josephson junction exceeds its critical current. Selected multiples of the voltage pulse generated by the Josephson junction are fed back to the RLC circuit. A digital output is generated from the voltage pulses generated by the Josephson junction to complete the analog-to-digital conversion of the input signal.
    Type: Grant
    Filed: September 16, 1992
    Date of Patent: August 23, 1994
    Assignee: Westinghouse Electric Corp.
    Inventors: John X. Przybysz, Donald L. Miller
  • Patent number: 5327130
    Abstract: A spur-free sigma delta modulator analog-to-digital converter for converting an analog input signal to a digital output signal is provided. A race Josephson junction is provided between the pulse generator and the integrating inductor. The race Josephson junction emits a voltage pulse in response to every sampling pulse. This voltage pulse kills any retained persisting current in the integrating inductor. By adding the race Josephson junction, nonlinearities in the converter are eliminated.A multiple flux quanta feedback generator for creating a multiple digital pulse feedback in response to an input signal is provided. A quantizer connected to the input inductor produces a pulse when the current produced by the input inductor exceeds a predetermined amount. A splitter is connected to the quantizer for producing output pulses. In order to produce 2.sup.n output pulses, 2.sup.n -1 splitters are required. Each of the splitters produces two output pulses in response to a single pulse produced by the quantizer.
    Type: Grant
    Filed: August 9, 1993
    Date of Patent: July 5, 1994
    Assignee: Westinghouse Electric Corp.
    Inventors: Joonhee Kang, John X. Przybysz, Donald L. Miller
  • Patent number: 5289400
    Abstract: A serial multiplier for multiplying two n-bit numbers is provided in which a shift register having a total of n destructive read out cells contains a separate bit of a first multiplicand in each cell. A string of (2n-1) non-destructive read out cells is provided to receive the second multiplicand. Each of the first n cells of the string of non-destructive readout cells contain a separate bit of the second multiplicand. Each bit of the first multiplicand is serially multiplied with the series of bits of said second multiplicand. After each such multiplication, each bit of the second multiplicand is moved to the next adjacent cell. The partial product of the multiplication is stored in a string of 2n T flip-flop cells. Each of the T flip-flop cells has a carry path to the next adjacent T flip-flop cell. Timing means are provided to regulate and initiate the multiplication.
    Type: Grant
    Filed: July 30, 1992
    Date of Patent: February 22, 1994
    Assignee: Westinghouse Electric Corp.
    Inventors: John X. Przybysz, Donald L. Miller, Joonhee Kang
  • Patent number: 5233243
    Abstract: Push-pull flux quantum superconducting digital logic circuits are provided with a circuit branch having a pair of Josephson junctions electrically connected in series with each other. This circuit branch is connected between positive and negative bias voltage supplies which supply a bias current to the Josephson junctions. A dual polarity input voltage signal is applied to a node in the circuit branch and an output signal is extracted from a second node in the circuit branch. Various logic operations can be performed on the input signal by adding additional components and changing the points at which voltage is input to and output from the Josephson junction circuit branch.
    Type: Grant
    Filed: August 14, 1991
    Date of Patent: August 3, 1993
    Assignee: Westinghouse Electric Corp.
    Inventors: John H. Murphy, Michael R. Daniel, John X. Przybysz
  • Patent number: 5233242
    Abstract: Push-pull flux quantum gate array cells synchronously process a pair of polarized data signals. These polarized data signals can be derived from dual polarity data signals by separating the input signals into positive polarity data signals and negative polarity data signals. At least one logic or arithmetic operation is performed on each of the positive and negative polarity signals to produce modified positive and negative polarity signals respectively. These modified positive polarity and negative polarity signals can also be combined to produce a modified dual polarity output data signal. Numerous logic operations can be achieved in gate array cells which perform this signal processing method. By using push-pull flux quantum circuits, the need for auxiliary timing signals or interferometers is minimized.
    Type: Grant
    Filed: August 14, 1991
    Date of Patent: August 3, 1993
    Assignee: Westinghouse Electric Corp.
    Inventors: John H. Murphy, Michael R. Daniel, John X. Przybysz
  • Patent number: 5198815
    Abstract: A two-loop superconducting sigma-delta analog-to-digital converter includes a first superconducting inductor to which the analog signal is applied. A resistor converts to current in the first inductor to a voltage which is applied to a second superconducting inductor. The current in the second inductor, which increases quadradically with time, is applied to an overdamped Josephson junction which kicks back a single quantum voltage pulse each time its critical current is exceeded. This pulse reduces the current in the second inductor and serves as a digital ONE output. The pulses are also applied to an underdamped Josephson junction in a feedback pulse generator which latches at its gap voltage for the remainder of a half cycle of an ac bias current.
    Type: Grant
    Filed: December 12, 1991
    Date of Patent: March 30, 1993
    Assignee: Westinghouse Electric Corp.
    Inventors: John X. Przybysz, Donald L. Miller, Eric H. Naviasky
  • Patent number: 5170080
    Abstract: Superconducting digital logic circuits constructed in accordance with this invention include a circuit branch having first and second Josephson junctions electrically connected in series with each other, with a junction point between the first and second Josephson junctions connected to a neutral point; a positive bias voltage is connected to one end of the circuit branch, and a negative bias voltage is connected to a second end of the circuit branch; a first rail for applying a first input voltage signal, having a first polarity, and for extracting a first output signal is connected to one end of the circuit branch; and a second rail for applying a second input voltage signal, having a second polarity, and for extracting a second output signal is connected to the other end of the circuit branch. This invention encompasses both the above circuit and the method of signal processing performed by such circuits.
    Type: Grant
    Filed: August 14, 1991
    Date of Patent: December 8, 1992
    Assignee: Westinghouse Electric Corp.
    Inventors: John H. Murphy, Michael R. Daniel, John X. Przybysz
  • Patent number: 5164618
    Abstract: Superconducting timed gate array cells for use in single-rail logic circuits are provided by adding inputs to modified variable threshold logic (MVTL) timed inverter circuits. Data signals which are inphase with a first phase of a power source are coupled to gate array cells in which Josephson junction bias current is provided by a second phase of the power source. NOR, NAND, 2NOR-OR and 2NAND-AND circuits are disclosed for use as building blocks in the production of specialized digital logic circuits.
    Type: Grant
    Filed: August 14, 1991
    Date of Patent: November 17, 1992
    Assignee: Westinghouse Electric Corp.
    Inventors: John H. Murphy, Michael R. Daniel, John X. Przybysz
  • Patent number: 5140324
    Abstract: A superconducting sigma-delta analog-to-digital converter utilizes a superconducting inductor as the integrator and a Josephson junction connected in series between the inductor and ground as the quantizer. A SQUID generates sampling pulses at a selected GHz frequency which add to the inductor current flowing through the Josephson junction. When the combined current through the Josephson junction exceeds the critical current of the Josephson junction, a voltage pulse is generated which kicks back into the inductor to reduce the inductor current. The voltage across the Josephson junction is, therefore, a one bit digital representation of the analog signal. This one bit digital signal is converted to a multi-bit digital signal preferably by a decimator having superconducting circuits which reduce the frequency of the multi-bit digital signal to a frequency which can be further processed by semiconductor processors. Preferably, a weighting function is utilized in a conversion to improve accuracy.
    Type: Grant
    Filed: June 6, 1991
    Date of Patent: August 18, 1992
    Assignee: Westinghouse Electric Corp.
    Inventors: John X. Przybysz, Donald L. Miller, Eric H. Naviasky
  • Patent number: 5069748
    Abstract: This is a structure of, and method for preparation of, molybdenum resistors in a superconductor integrated circuit. It utilizes a pattern superconductor film; applying a titanium film on the patterned superconductor film; and then applying a molybdenum film on the titanium film to provide a titanium-molybdenum, etch-stop interface; applying a patterned resist film on the molybdenum film; etching the exposed molybdenum film to expose a portion of the titanium-molybdenum, etch-stop interface; and oxidizing the exposed titanium-molybdenum, etch-stop interface. The titanium-molybdenum etch stop interface protects the patterned superconductor film and the support (including any other underlayers) and increases processing margins for the etch time.
    Type: Grant
    Filed: January 22, 1991
    Date of Patent: December 3, 1991
    Assignee: Westinghouse Electric Corp.
    Inventor: John X. Przybysz
  • Patent number: 5021867
    Abstract: This is a structure of, and method for preparation of, molybdenum resistors in a superconductor integrated circxuit. It utilizes a pattern superconductor film; applying a titanium film on the patterned superconductor film; and then applying a molybdenum film on the titanium film to provide a titanium-molybdenum, etch-stop interface; applying a patterned resist film on the molybdenum film; etching the exposed molybdenum film to expose a portion of the titanium-molybdenum, etch-stop interface; and oxidizing the exposed titanium-molybdenum, etch-stop interface. The titanium-molybdenum etch stop interface protects the patterned superconductor film and the support (including any other underlayers) and increases processing margins for the etch time.
    Type: Grant
    Filed: May 30, 1989
    Date of Patent: June 4, 1991
    Assignee: Westinghouse Electric Corp.
    Inventor: John X. Przybysz