Patents by Inventor John X. Przybysz

John X. Przybysz has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 4983971
    Abstract: This is a superconducting analog-to-digital converter for producing a digital output signal which is a function of an analog input signal. The analog-to-digital converter uses a nonhysteresis-shunted Josephson junction, an input superconducting inductor, and an output Josephson junction, connected in superconducting loop relationship. A flux proportional to an analog input signal is coupled into the input inductor and a constant bias current source connected such that the current divides between the nonhysteresis-shunted Josephson junction and the output Josephson junction with the bias current source providing a current of at least about the sum of the critical currents of said Josephson junctions to provide voltage pulses across the nonhysteresis-shunted Josephson junction even with a constant level of flux. A Josephson junction integrating counter circuit is connected to sense the ac portion of voltage across the output Josephson junction and the Josephson junction integrating counter circuit is gated.
    Type: Grant
    Filed: June 29, 1989
    Date of Patent: January 8, 1991
    Assignee: Westinghouse Electric Corp.
    Inventors: John X. Przybysz, Clark A. Hamilton
  • Patent number: 4904341
    Abstract: This is an improved method for providing silicon dioxide with openings which expose contact pad areas for connections to superconductor in the preparation of superconducting integrated circuits. It relates to the type of method which utilizes depositing of a silicon dioxide film on a substrate (including over superconductor conductor patterns on the substrate surface), placing a resist film on the silicon dioxide film, patterning the resist film to expose portions of the silicon dioxide, and reactive ion etching the exposed portions of the silicon dioxide film to expose contact pad areas of superconductor. The improvement utilizes an etchant gas consisting essentially of 50-95 volume percent nitrogen trifluoride and 5-50 volume percent rare gas (preferably about 77 volume percent nitrogen trifluoride, with argon or neon or mixtures thereof as the rare gas) for the reactive ion etching of the exposed portions of the silicon dioxide film.
    Type: Grant
    Filed: August 22, 1988
    Date of Patent: February 27, 1990
    Assignee: Westinghouse Electric Corp.
    Inventors: Richard D. Blaugher, Joseph Buttyan, John X. Przybysz
  • Patent number: 4904980
    Abstract: This is a structure of, and method for preparation of, molybdenum resistors in a superconductor integrated circuit. It utilizes a pattern superconductor film; applying an aluminum film on the patterned superconductor film; and then applying a molybdenum film on the aluminum film to provide an aluminum-molybdenum, etch-stop interface; applying a patterned resist film on the molybdenum film; etching the exposed molybdenum film to expose a portion of the aluminum-molybdenum, etch-stop interface; and oxidizing the exposed aluminum-molybdenum, etch-stop interface. The aluminum-molybdenum etch stop interface protects the patterned superconductor film and the support (including any other underlayers) and increases processing margins for the etch time.
    Type: Grant
    Filed: August 19, 1988
    Date of Patent: February 27, 1990
    Assignee: Westinghouse Electric Corp.
    Inventors: John X. Przybysz, Joseph Buttyan
  • Patent number: 4859879
    Abstract: This is a superconducting digital logic amplifier for interfacing superconductor circuits with semiconductor circuits. It provides a gigahertz amplifier to convert low voltage superconducting logic signals to higher voltage signals, suitable for semiconductor signal processing circuits. It may, for example, provide a factor of ten voltage gain to raise the 2.5 mV Josephson logic signals of conventional metallic superconductor circuitry to 25 mV signals for input into inexpensive semiconductor amplifiers which, in turn, can power semiconductor logic circuitry. Generally, it utilizes a first series string of Josephson junctions in series with an input Josephson junction to provide a series combination which is then connected in parallel with a second string of higher critical current Josephson junctions. The input signal is introduced between the first series string and the input Josephson junction, and the output terminal is connected at the common connection opposite the input Josephson junction.
    Type: Grant
    Filed: May 16, 1988
    Date of Patent: August 22, 1989
    Assignee: Westinghouse Electric Corp.
    Inventor: John X. Przybysz
  • Patent number: 4555845
    Abstract: The present invention is directed to a process for providing overvoltage protection to a thyristor and to the thyristor so protected and comprises contacting the space charge region of the forward blocking junction of the thyristor with an electrical contact when the predetermined switching voltage is reached.
    Type: Grant
    Filed: October 13, 1982
    Date of Patent: December 3, 1985
    Assignee: Westinghouse Electric Corp.
    Inventor: John X. Przybysz
  • Patent number: 4536783
    Abstract: The present invention is directed to a light-triggered thyristor having a high di/dt, high dv/dt, and high photosensitivity. The thyristor has a three-stage cathode emitter gating structure with integrated current limiting resistors. The current limiting resistors are defined by moats etched in the cathode base region. The moats also cause a "turn-on " current to flow through substantially all of the cathode base region.
    Type: Grant
    Filed: November 14, 1983
    Date of Patent: August 20, 1985
    Assignee: Westinghouse Electric Corp.
    Inventors: Donald L. Miller, John X. Przybysz
  • Patent number: 4516315
    Abstract: The present invention is directed to a thyristor self-protected against overvoltage by the avalanche mechanism, the protection resulting from a well cut in the top surface of the thyristor and extending through one base region of the thyristor and forming two regions of opposite conductivity type at the bottom of said well, and to the process for making the thyristor.
    Type: Grant
    Filed: May 9, 1983
    Date of Patent: May 14, 1985
    Assignee: Westinghouse Electric Corp.
    Inventors: John X. Przybysz, Earl S. Schlegel, deceased
  • Patent number: 4514898
    Abstract: The present invention is directed to a thyristor self-protected against overvoltage by the avalanche mechanism, the protection resulting from a laser scribed ring shaped groove cut in the top surface of the thyristor and extending into one base region of the thyristor whereby the forward blocking junction is contoured toward the reverse blocking junction under the ring shaped groove, and to the process for making the thyristor.
    Type: Grant
    Filed: February 18, 1983
    Date of Patent: May 7, 1985
    Assignee: Westinghouse Electric Corp.
    Inventors: John X. Przybysz, John A. Ostop
  • Patent number: 4381341
    Abstract: Electrical interconnection paths or vias are provided through relatively thick type III/V semiconductive substrates, such as gallium arsenide, to permit through the substrate electrical interconnection of planar transistor devices. The vias are etched in a two-step process which ensures that the via lateral dimensions are less than the transistor contacts with which they are aligned. The first step comprises selectively thinning the thick substrate from the back surface over an area which encompasses the transistor array formed in the front surface of the substrate. The second step is to etch the individual vias through this prior thinned substrate at areas aligned with the transistor contacts.
    Type: Grant
    Filed: February 1, 1982
    Date of Patent: April 26, 1983
    Assignee: Westinghouse Electric Corp.
    Inventors: John X. Przybysz, Michael C. Driver, Harvey C. Nathanson
  • Patent number: 4353779
    Abstract: An etching solution for III/V semiconductor material, such as gallium arsenide, consists essentially of: 20 to 90 vol. % of phosphoric acid solution; 15 to 80 vol. % of hydrogen peroxide solution; 0 to 60 vol. % of water; and an amount of fluorine ion effective to provide at least 0.01 mole of fluorine ion per liter of solution, said solution being effective to etch without evolving a gaseous product.
    Type: Grant
    Filed: August 14, 1981
    Date of Patent: October 12, 1982
    Assignee: Westinghouse Electric Corp.
    Inventor: John X. Przybysz