Abstract: Subject matter herein disclosed relates to a method for the manufacture of a switching device comprising a correlated electron material. In embodiments, processes are described which may be useful for avoiding a resistive layer which tends to form between the correlated electron material and a conductive substrate and/or overlay.

Abstract: Subject matter herein disclosed relates to a method for the manufacture of a switching device comprising a correlated electron material. In embodiments, processes are described which may be useful for avoiding a resistive layer which tends to form between the correlated electron material and a conductive substrate and/or overlay.

Abstract: A resistive switching memory comprising a first electrode and a second electrode; an active resistive switching region between the first electrode and the second electrode, the resistive switching region comprising a transition metal oxide and a dopant comprising a ligand, the dopant having a first concentration; a first buffer region between the first electrode and the resistive switching material, the first buffer region comprising the transition metal oxide and the dopant, wherein the dopant has a second concentration that is greater than the first concentration. In one embodiment, the second concentration is twice the first concentration. In one embodiment, the first buffer region is thicker than the active resistive switching region.

Abstract: A resistive switching memory comprising a first electrode and a second electrode; an active resistive switching region between the first electrode and the second electrode, the resistive switching region comprising a transition metal oxide and a dopant comprising a ligand, the dopant having a first concentration; a first buffer region between the first electrode and the resistive switching material, the first buffer region comprising the transition metal oxide and the dopant, wherein the dopant has a second concentration that is greater than the first concentration. In one embodiment, the second concentration is twice the first concentration. In one embodiment, the first buffer region is thicker than the active resistive switching region.

Abstract: A re-programmable antifuse field programmable gate array (FPGA) integrated circuit, the FPGA comprising: a plurality of CeRAM resistive switching elements forming a connection block, the switching elements capable of being switched from a conductive (ON) state to a non-conductive (OFF) state and back to a conductive (ON) state; a plurality of logic elements forming a logic block; and a programming circuit for turning the CeRAM switching elements OFF and ON to connect the logic elements to form the FPGA.

Abstract: A re-programmable antifuse field programmable gate array (FPGA) integrated circuit, the FPGA comprising: a plurality of CeRAM resistive switching elements forming a connection block, the switching elements capable of being switched from a conductive (ON) state to a non-conductive (OFF) state and back to a conductive (ON) state; a plurality of logic elements forming a logic block; and a programming circuit for turning the CeRAM switching elements OFF and ON to connect the logic elements to form the FPGA.

Abstract: A non-volatile resistive switching memory that includes a homogeneous material which changes between the insulative and conductive states due to correlations between electrons, particularly via a Mott transition. The material is crystallized into the conductive state and does not require electroforming.

Abstract: An integrated circuit memory cell including: a semiconductor having a first active area, a second active area, and a channel between the active areas; and a layer of a variable resistance material (VRM) directly above the channel. In one embodiment, there is a first conductive layer between the VRM and the channel and a second conductive layer directly above the VRM layer. The VRM preferably is a correlated electron material (CEM). The memory cell comprises a FET, such as a JFET or a MESFET. In another embodiment, there is a layer of an insulating material between the VRM and the channel. In this case, the memory cell may include a MOSFET structure.

Abstract: An integrated circuit memory cell including: a semiconductor having a first active area, a second active area, and a channel between the active areas; and a layer of a variable resistance material (VRM) directly above the channel. In one embodiment, there is a first conductive layer between the VRM and the channel and a second conductive layer directly above the VRM layer. The VRM preferably is a correlated electron material (CEM). The memory cell comprises a FET, such as a JFET or a MESFET. In another embodiment, there is a layer of an insulating material between the VRM and the channel. In this case, the memory cell may include a MOSFET structure.

Abstract: A non-volatile resistive switching memory that includes a material which changes between the insulative and conductive states. The material is stabilized against charge trapping by oxygen vacancies by an extrinsic ligand, such as carbon.

Abstract: A non-volatile resistive switching memory that includes a material which changes between the insulative and conductive states. The material is stabilized against charge trapping by oxygen vacancies by an extrinsic ligand, such as carbon.

Abstract: A pyroelectric sensor for determines a charge output of a ferroelectric scene element of the sensor by measuring the hysteresis loop output of the scene element several times during a particular time frame for the same temperature. An external AC signal is applied to the ferroelectric scene element to cause the hysteresis loop output from the element to switch polarization. Charge integration circuitry is employed to measure the charge from the scene element. The ferroelectric of the scene element is made of strontium bismuth tantalate, or derivative thereof, disposed directly between top and bottom electrodes. The polarization of the reference element which is compared to and subtracted from the polarization of the scene element for each cycle. The polarization difference measured for each cycle over a set time period are summed by an integrating amplifier to produce a signal output voltage.

Abstract: A non-volatile resistive switching memory that includes a homogeneous material which changes between the insulative and conductive states due to correlations between electrons, particularly via a Mott transition. The material is crystallized into the conductive state and does not require electroforming.

Abstract: An integrated circuit memory cell including: a semiconductor having a first active area, a second active area, and a channel between the active areas; and a layer of a variable resistance material (VRM) directly above the channel. In one embodiment, there is a first conductive layer between the VRM and the channel and a second conductive layer directly above the VRM layer. The VRM preferably is a correlated electron material (CEM). The memory cell comprises a FET, such as a JFET or a MESFET. In another embodiment, there is a layer of an insulating material between the VRM and the channel. In this case, the memory cell may include a MOSFET structure.

Abstract: A method of making a variable resistance material (VRM), the method comprising providing a precursor comprising a metallorganic or organometallic solvent containing a metal moiety suitable for forming the VRM, depositing the precursor on a substrate to form a thin film of the precursor, and heating the thin film to form the VRM. The preferred solvent comprises octane.

Abstract: A non-volatile resistive switching memory that includes a material which changes between the insulative and conductive states. The material is stabilized against charge trapping by oxygen vacancies by an extrinsic ligand, such as carbon.

Abstract: A ferroelectric/pyroelectric sensor employs a technique for determining a charge output of a ferroelectric scene element of the sensor by measuring the hysteresis loop output of the scene element several times during a particular time frame for the same temperature. An external AC signal is applied to the ferroelectric scene element to cause the hysteresis loop output from the element to switch polarization. Charge integration circuitry, such as a combination output capacitor and operational amplifier, is employed to measure the charge from the scene element. Preferably, the ferroelectric of the scene element is made of an economical and responsive strontium bismuth tantalate, SBT, or derivative thereof, disposed directly between top and bottom electrodes.

Abstract: A hydrogen diffusion barrier in an integrated circuit is located to inhibit diffusion of hydrogen to a thin film of a metal oxide, such as a ferroelectric layered superlattice material, in an integrated circuit. The hydrogen diffusion barrier comprises at least one of the following chemical compounds: strontium tantalate, bismuth tantalate, tantalum oxide, titanium oxide, zirconium oxide and aluminum oxide. The hydrogen barrier layer is amorphous and is made by a MOCVD process at a temperature of 450° C. or less. A supplemental hydrogen barrier layer comprising a material selected from the group consisting of silicon nitride and a crystalline form of one of said hydrogen barrier layer materials is formed adjacent to said hydrogen diffusion barrier.

Abstract: A pyrometer cell comprises a first ferroelectric capacitor, a second ferroelectric capacitor, and a difference circuit for determining the difference between the polarization charge, voltage, or current between the first and second ferroelectric capacitors. The cell is pulsed a plurality of times and an integrator circuit connected to the difference circuit provides an enhanced output signal representative of the integrated difference. An infrared imager is formed by an array of the pyrometer cells, with one ferroelectric capacitor in each cell exposed to an infrared source and the other ferroelectric capacitor not exposed to the infrared source.

Abstract: A pyrometer cell comprises a first ferroelectric capacitor, a second ferroelectric capacitor, and a difference circuit for determining the difference between the polarization charge, voltage, or current between the first and second ferroelectric capacitors. The cell is pulsed a plurality of times and an integrator circuit connected to the difference circuit provides an enhanced output signal representative of the integrated difference. An infrared imager is formed by an array of the pyrometer cells, with one ferroelectric capacitor in each cell exposed to an infrared source and the other ferroelectric capacitor not exposed to the infrared source.