Patents by Inventor Jonathan A. Bornstein

Jonathan A. Bornstein has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20100159641
    Abstract: Memory cell formation using ion implant isolated conductive metal oxide is disclosed, including forming a bottom electrode below unetched conductive metal oxide layer(s), forming the unetched conductive metal oxide layer(s) including depositing at least one layer of a conductive metal oxide (CMO) material (e.g., PrCaMnOX, LaSrCoOX, LaNiOX, etc.) over the bottom electrode. At least one portion of the layer of CMO is configured to act as a memory element without etching, and performing ion implantation on portions of the layer(s) of CMO to create insulating metal oxide (IMO) regions in the layer(s) of CMO. The IMO regions are positioned adjacent to electrically conductive CMO regions in the unetched layer(s) of CMO and the electrically conductive CMO regions are disposed above and in contact with the bottom electrode and form memory elements operative to store non-volatile data as a plurality of conductivity profiles (e.g., resistive states indicative of stored data).
    Type: Application
    Filed: December 18, 2009
    Publication date: June 24, 2010
    Applicant: UNITY SEMICONDUCTOR CORPORATION
    Inventors: Darrell Rinerson, Jonathan Bornstein, David Hansen, Robin Cheung, Steven W. Longcor, Rene Meyer, Lawrence Schloss
  • Publication number: 20100155723
    Abstract: Examples of memory stack cladding are described, including a memory stack, comprising a first electrode formed on a substrate, a conductive metal oxide layer deposited on the first electrode, a tunnel barrier layer comprising an insulating metal oxide, the tunnel barrier layer being deposited on the conductive metal oxide layer, a second electrode formed on the tunnel barrier layer, a glue layer deposited on the second electrode, a mask layer deposited on the glue layer, and a cladding layer deposited substantially over one or more surfaces of the memory stack, the cladding layer being configured to provide a barrier to prevent one or more hydrogen ions from diffusing through the one or more surfaces of the memory stack. The memory stack may define a two-terminal non-volatile memory cell operative to store data as a plurality of conductivity profiles that can be non-destructively determined by applying a read voltage.
    Type: Application
    Filed: December 18, 2009
    Publication date: June 24, 2010
    Applicant: Unity Semiconductor Corporation
    Inventors: Jonathan Bornstein, Julie Casperson Brewer
  • Patent number: 7742323
    Abstract: A structure for a memory device including a plurality of substantially planar thin-film layers or a plurality of conformal thin-film layers is disclosed. The thin-film layers form a memory element that is electrically in series with first and second cladded conductors and operative to store data as a plurality of conductivity profiles. A select voltage applied across the first and second cladded conductors is operative to perform data operations on the memory device. The memory device may optionally include a non-ohmic device electrically in series with the memory element and the first and second cladded conductors. Fabrication of the memory device does not require the plurality of thin-film layers be etched in order to form the memory element. The memory element can include a CMO layer having a selectively crystallized polycrystalline portion and an amorphous portion. The cladded conductors can include a core material made from copper.
    Type: Grant
    Filed: July 26, 2007
    Date of Patent: June 22, 2010
    Inventors: Darrell Rinerson, Jonathan Bornstein, Robin Cheung, David Hansen, Travis Byonghyop Oh
  • Patent number: 7618894
    Abstract: Multi-step selective etching. Etching an unmasked region associated with each layer of a plurality of layers, the plurality of layers comprising a stack, wherein the unmasked region of each of the plurality of layers is etched while exposed to a temperature, a pressure, a vacuum, using a plurality of etchants, wherein at least one of the plurality of etchants comprises an inert gas and oxygen, wherein the etchant oxidizes the at least one layer that can be oxidized such that the etching stops, the plurality of etchants leaving substantially unaffected a masked region associated with each layer of the plurality of layers, wherein two or more of the plurality of layers comprises a memory stack, and preventing corrosion of at least one of the plurality of layers comprising a conductive metal oxide by supplying oxygen to the stack after etching the unmasked region without breaking the vacuum.
    Type: Grant
    Filed: July 26, 2007
    Date of Patent: November 17, 2009
    Inventors: Jonathan Bornstein, Travis Byonghyop
  • Publication number: 20090029555
    Abstract: Multi-step selective etching. Etching an unmasked region associated with each layer of a plurality of layers, the plurality of layers comprising a stack, wherein the unmasked region of each of the plurality of layers is etched while exposed to a temperature, a pressure, a vacuum, using a plurality of etchants, wherein at least one of the plurality of etchants comprises an inert gas and oxygen, wherein the etchant oxidizes the at least one layer that can be oxidized such that the etching stops, the plurality of etchants leaving substantially unaffected a masked region associated with each layer of the plurality of layers, wherein two or more of the plurality of layers comprises a memory stack, and preventing corrosion of at least one of the plurality of layers comprising a conductive metal oxide by supplying oxygen to the stack after etching the unmasked region without breaking the vacuum.
    Type: Application
    Filed: July 26, 2007
    Publication date: January 29, 2009
    Applicant: UNITY SEMICONDUCTOR CORPORATION
    Inventors: Travis Byonghyop Oh, Jonathan Bornstein
  • Patent number: 6125308
    Abstract: A method for determining the trajectory of a projectile on a ballistic trajectory includes creating a sequence of images of the projectile using a passive image sensor located at an observer; determining the time the projectile started on its trajectory; determining relative positions of the projectile's launch point, the observer, and an expected impact point; ballistically modelling the projectile; and tracking the projectile through the sequence of images using a track before detect algorithm.
    Type: Grant
    Filed: June 11, 1997
    Date of Patent: September 26, 2000
    Assignee: The United States of America as represented by the Secretary of the Army
    Inventors: David B. Hills, Jonathan A. Bornstein