Patents by Inventor Jonathan Douglas

Jonathan Douglas has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250235786
    Abstract: The systems and processes described herein can provide dynamic and realistic route generation based on actual route data within the game environment. The system provides for generating a route database for use with a sports simulation game application. The present disclosure also provides for generation of routes during runtime of the game application. The route generation system can help address the problem of generating realistic and lifelike routes based on real life movements of athletes.
    Type: Application
    Filed: December 20, 2024
    Publication date: July 24, 2025
    Inventors: Ben Folsom Carter, JR., Benjamin Scott Rich, JR., Jonathan Douglas Hayes
  • Patent number: 12350695
    Abstract: The present invention relates to a self-contained unit having a system for recovering polymer overspray from a pallet coating process. The self-contained unit includes a common enclosure having at least four walls, a ceiling and a floor. There is a collection tank located below the floor of the common enclosure and a roof platform is located above the ceiling of the common enclosure. Within the common enclosure is at least one spray booth having a waterfall wall with liquid flowing down a face of the waterfall wall to the collection tank. Mounted on the roof platform is a consolidation tank, hydrocyclone and pressure filter that are all part of the system for removing the polymer from the overspray mixture collected at the collection tank.
    Type: Grant
    Filed: August 8, 2022
    Date of Patent: July 8, 2025
    Assignee: AIR AND LIQUID SYSTEMS, LLC
    Inventors: James E. Miller, Jonathan Douglas Hommes, Karl Walby, Gordon T. Urquhart
  • Patent number: 12346710
    Abstract: Systems and methods for creating graphical user interfaces (GUIs) for runtime execution in virtual environments of software, such as video games. The system utilizes mock GUIs, which can be images illustrating or displaying mocked graphical user interfaces, to create GUIs that can be exported into runtime environments of software. The system creates GUIs by analyzing the graphical elements and attributes of mock GUIs, and assigning functionality to those graphical elements, enabling the operating of the GUIs within executable runtime environments.
    Type: Grant
    Filed: June 26, 2023
    Date of Patent: July 1, 2025
    Assignee: Electronic Arts Inc.
    Inventors: Adrian-Ciprian Popa, Timothy J. Cowan, Jonathan Douglas Hayes
  • Publication number: 20250113503
    Abstract: Embodiments herein relate to techniques to integrate a capacitive voltage regulator in an integrated circuit (IC) package. The voltage regulator may provide a power supply to one or more load domains in the IC package. The transistors of the voltage regulator may be included on the same die as one or more of the load domains, another die, and/or an interposer of the IC package. The capacitors may be included in the same die as the transistors, in the interposer, in a package layer (e.g., package core), and/or in the same die as one or more of the load domains. Accordingly, the voltage regulator can be integrated close to the relevant load domains, delivering power with short current paths and thereby providing reduced input impedance, output impedance, and associated losses compared with prior techniques. Other embodiments may be described and claimed.
    Type: Application
    Filed: September 29, 2023
    Publication date: April 3, 2025
    Inventors: Nicolas Butzen, Harish K. Krishnamurthy, Khondker Ahmed, Nachiket Desai, Su Hwan Kim, Krishnan Ravichandran, Kaladhar Radhakrishnan, Jonathan Douglas
  • Publication number: 20250103074
    Abstract: Embodiments herein relate to a voltage regular (VR) formed from dies stacked on a package base layer. The VR can include a first part on a first die and a second part on a second die, where the different parts are selected based on characteristics of the respective die such as their voltage domains or technologies. In a capacitor-based VR, an input capacitor and switches subject to a relatively high input voltage can be provided in the first die, while a flying capacitor, output capacitor and switches subject to a relatively low output voltage can be provided in the second die. In an inductor-based VR, an inductor and one or more switches subject to a relatively high input voltage can be provided in the first die, while an output capacitor subject to a relatively low output voltage can be provided in the second die.
    Type: Application
    Filed: September 25, 2023
    Publication date: March 27, 2025
    Inventors: Harish K. Krishnamurthy, Nicolas Butzen, Khondker Ahmed, Nachiket Desai, Su Hwan Kim, Krishnan Ravichandran, Kaladhar Radhakrishnan, Jonathan Douglas
  • Publication number: 20250103075
    Abstract: Embodiments herein relate to a stacked semiconductor structure which includes a first voltage regulator (VR), external to a package, for supplying current to a compute die in the package. When the required current exceeds a threshold, an additional current source is activated. The additional current source can include a second VR, also external to the package, for supplying current to an integrated voltage regulator (IVR) in the package. The IVR performs voltage down conversion and current multiplication to output a portion of the required current above the threshold, while the output of the first VR is capped at the threshold.
    Type: Application
    Filed: September 25, 2023
    Publication date: March 27, 2025
    Inventors: Khondker Ahmed, Nicolas Butzen, Nachiket Desai, Su Hwan Kim, Harish K. Krishnamurthy, Krishnan Ravichandran, Kaladhar Radhakrishnan, Jonathan Douglas
  • Publication number: 20250105736
    Abstract: Embodiments herein relate to a voltage regular (VR) formed from a first die stacked on a package base layer. The VR can have an inductor-first design in which an inductor is in the package base layer and active circuitry such as switches is in the first die. The inductor receives an input voltage, Vin, directly from the package base layer without the input voltage first entering the first die. The VR can comprise a Kappa VR which includes first and second inductors in the package base layer. The inductors can have asymmetric inductances to improve efficiency. The VR can be cascaded with a set of current multipliers or a Continuously Scalable Conversion Ratio (CSCR) capacitive regulator. Another example implementation includes a switched-inductor-capacitor converter cascaded with a set of switched capacitor current multipliers.
    Type: Application
    Filed: September 25, 2023
    Publication date: March 27, 2025
    Inventors: Nachiket Desai, Harish K. Krishnamurthy, Nicolas Butzen, Khondker Ahmed, Su Hwan Kim, Hieu Pham, Krishnan Ravichandran, Kaladhar Radhakrishnan, Jonathan Douglas
  • Publication number: 20250057980
    Abstract: The present disclosure provides compositions, methods, and an overall platform for co-delivery of gene editor polynucleotides and template polynucleotides. The gene editor polynucleotide packaged in a LNP is co-delivered with a template polynucleotide (i.e., “cargo” or “payload”) packaged into a separate vector that is capable of localizing the donor template to a cell nucleus. In certain embodiments, the donor template vector is an AAV, a helper dependent adenovirus, or an integration deficient lentivirus. In typical embodiments, the template polynucleotide is integrated into the genomic integration recognition site by an integrase, optionally by an integrase fused/linked to a gene editor protein.
    Type: Application
    Filed: December 22, 2022
    Publication date: February 20, 2025
    Inventors: Jonathan Douglas Finn, Rahul Kakkar, Xin Jenny Xie, Brett Joseph Gordon Estes
  • Patent number: 12214023
    Abstract: Compositions and methods for expressing Factor IX in a host cell or a population of host cells are provided. Also provided are engineered host cells expressing Factor IX.
    Type: Grant
    Filed: October 18, 2019
    Date of Patent: February 4, 2025
    Assignees: Intellia Therapeutics, Inc., Regeneron Pharmaceuticals, Inc.
    Inventors: Jonathan Douglas Finn, Hon-Ren Huang, Moitri Roy, KehDih Lai, Rachel Sattler, Christos Kyratsous, Cheng Wang
  • Patent number: 12172079
    Abstract: The systems and processes described herein can provide dynamic and realistic route generation based on actual route data within the game environment. The system provides for generating a route database for use with a sports simulation game application. The present disclosure also provides for generation of routes during runtime of the game application. The route generation system can help address the problem of generating realistic and lifelike routes based on real life movements of athletes.
    Type: Grant
    Filed: July 23, 2021
    Date of Patent: December 24, 2024
    Assignee: Electronic Arts Inc.
    Inventors: Ben Folsom Carter, Jr., Benjamin Scott Rich, Jr., Jonathan Douglas Hayes
  • Patent number: 12164322
    Abstract: Techniques and mechanisms for determining an operational mode of a voltage regulator. In an embodiment, an integrated circuit (IC) die is coupled to receive power from a voltage regulator (VR) via a power delivery network (PDN) which comprises circuitry in or on a substrate, such as that of a printed circuit board. The IC die receives from the substrate information indicating a characteristic of a parasitic impedance at the substrate. Based on the information, a controller unit at the IC die selects one of multiple VR modes which each correspond to a respective one of different parasitic impedance characteristics. The controller then signals the VR to provide the selected mode. In an embodiment one of the VR modes corresponds to a relatively high impedance, and also corresponds to a relatively stable sensitivity function in a frequency range above a control bandwidth.
    Type: Grant
    Filed: June 25, 2021
    Date of Patent: December 10, 2024
    Assignee: Intel Corporation
    Inventors: Amit K. Jain, Mauricio Aguilar Salas, Jonathan Douglas, Anant Deval
  • Patent number: 12150248
    Abstract: A system for providing selective adhesion printed circuit board (PCB) production comprises a conveyor mechanism, a curing system, and a computer. The conveyor mechanism is configured to convey a series of selective adhesion blanks, wherein each selective adhesion blank is utilized to produce a PCB and includes a flexible film, a substrate, a conductive layer, and a curable adhesive. The conductive layer is formed from electrically conductive material and adhered to the substrate. The curable adhesive is positioned between the flexible film and the conductive layer and is configured to selectively bond with the conductive layer when the curable adhesive is cured. The curing system is configured to cure the curable adhesive. The computer includes a processing element configured or programmed to: receive a plurality of PCB designs, and direct the curing system to cure the curable adhesive of a plurality of selective adhesion blanks for each PCB design.
    Type: Grant
    Filed: September 1, 2022
    Date of Patent: November 19, 2024
    Assignee: Honeywell Federal Manufacturing & Technologies, LLC
    Inventors: Jonathan Douglas Hatch, Stephen McGarry Hatch
  • Publication number: 20240363285
    Abstract: Systems and methods for forming a magnetically-enabled part via additive manufacturing. The method includes depositing a layer of additive manufacturing material on a build plate, melting or sintering the layer of additive manufacturing material, depositing additional layers of additive manufacturing material on previous layers of additive manufacturing material, the additive manufacturing material of at least some of the additional layers being magnetically permeable, and melting or sintering the additional layers of additive manufacturing material such that the magnetically-enabled part has a transition region including at least some of the magnetically permeable additive manufacturing material.
    Type: Application
    Filed: July 11, 2024
    Publication date: October 31, 2024
    Inventors: Jonathan Douglas Hatch, Bob Dearth, Ida Sanchez, Francisco Garcia-Moreno
  • Patent number: 12068104
    Abstract: Systems and methods for forming a magnetically-enabled part via additive manufacturing. The method includes depositing a layer of additive manufacturing material on a build plate, melting or sintering the layer of additive manufacturing material, depositing additional layers of additive manufacturing material on previous layers of additive manufacturing material, the additive manufacturing material of at least some of the additional layers being magnetically permeable, and melting or sintering the additional layers of additive manufacturing material such that the magnetically-enabled part has a transition region including at least some of the magnetically permeable additive manufacturing material.
    Type: Grant
    Filed: May 11, 2023
    Date of Patent: August 20, 2024
    Assignee: Honeywell Federal Manufacturing & Technologies, LLC
    Inventors: Jonathan Douglas Hatch, Bob Dearth, Ida Sanchez, Francisco Garcia-Moreno
  • Publication number: 20240076636
    Abstract: Compositions and methods for gene editing. In some embodiments, a polynucleotide encoding Cas9 is provided that can provide one or more of improved editing efficiency, reduced immunogenicity, or other benefits.
    Type: Application
    Filed: April 7, 2023
    Publication date: March 7, 2024
    Applicant: Intellia Therapeutics, Inc.
    Inventors: Christian Dombrowski, Jonathan Douglas Finn, Amy Madison Rhoden Smith, Seth C. Alexander
  • Publication number: 20240040243
    Abstract: A photography system includes a camera having a geofenced region associated therewith, and a web server to provide a website to communicate with the camera and to access coordinates defining the geofenced region. A mobile device includes a processor to access the website via the web server, allow the website to access location of the mobile device, and receive video from the camera via the website in response to the location of the mobile device being within the geofenced region. A display is coupled to the processor to display the received video along with a user-selected input for a user to operate the camera to take a photo.
    Type: Application
    Filed: July 28, 2023
    Publication date: February 1, 2024
    Inventors: Henry Tyson, Bryan Wilkins, Jeffrey Jonathan Douglas, Jason Stanford PINDER, Sean Thomas Karp
  • Publication number: 20240015886
    Abstract: A conductive trace interconnect tape for use with a printed circuit board or a flexible circuit substrate comprises a top insulating layer, an electrically conductive layer, and a bottom insulating layer. The top insulating layer is formed from electrically insulating material and is configured to provide electrical isolation from electrically conductive objects that are positioned on top of the conductive trace interconnect tape. The electrically conductive layer is positioned underneath the top insulating layer. The electrically conductive layer is formed from electrically conductive material and includes electrical interconnect traces, electrical component pads, or electrically conductive planar portions. The bottom insulating layer is positioned underneath the electrically conductive layer.
    Type: Application
    Filed: September 22, 2023
    Publication date: January 11, 2024
    Inventors: Stephen McGarry Hatch, Jonathan Douglas Hatch
  • Publication number: 20230418631
    Abstract: Systems and methods for creating graphical user interfaces (GUIs) for runtime execution in virtual environments of software, such as video games. The system utilizes mock GUIs, which can be images illustrating or displaying mocked graphical user interfaces, to create GUIs that can be exported into runtime environments of software. The system creates GUIs by analyzing the graphical elements and attributes of mock GUIs, and assigning functionality to those graphical elements, enabling the operating of the GUIs within executable runtime environments.
    Type: Application
    Filed: June 26, 2023
    Publication date: December 28, 2023
    Inventors: Adrian-Ciprian Popa, Timothy J. Cowan, Jonathan Douglas Hayes
  • Patent number: 11812553
    Abstract: A conductive trace interconnect tape for use with a printed circuit board or a flexible circuit substrate comprises a top insulating layer, an electrically conductive layer, and a bottom insulating layer. The top insulating layer is formed from electrically insulating material and is configured to provide electrical isolation from electrically conductive objects that are positioned on top of the conductive trace interconnect tape. The electrically conductive layer is positioned underneath the top insulating layer. The electrically conductive layer is formed from electrically conductive material and includes electrical interconnect traces, electrical component pads, or electrically conductive planar portions. The bottom insulating layer is positioned underneath the electrically conductive layer.
    Type: Grant
    Filed: April 28, 2022
    Date of Patent: November 7, 2023
    Assignee: Honeywell Federal Manufacturing & Technologies, LLC
    Inventors: Stephen McGarry Hatch, Jonathan Douglas Hatch
  • Publication number: 20230298812
    Abstract: Systems and methods for forming a magnetically-enabled part via additive manufacturing. The method includes depositing a layer of additive manufacturing material on a build plate, melting or sintering the layer of additive manufacturing material, depositing additional layers of additive manufacturing material on previous layers of additive manufacturing material, the additive manufacturing material of at least some of the additional layers being magnetically permeable, and melting or sintering the additional layers of additive manufacturing material such that the magnetically-enabled part has a transition region including at least some of the magnetically permeable additive manufacturing material.
    Type: Application
    Filed: May 11, 2023
    Publication date: September 21, 2023
    Inventors: Jonathan Douglas Hatch, Bob Dearth, Ida Sanchez, Francisco Garcia-Moreno