Abstract: In embodiments of an autonomous vehicle platform and safety architecture, safety managers of a safety-critical system monitor outputs of linked components of the safety-critical system. The linked components comprise at least three components, each of which is configured to produce output indicative of a same event independent from the other linked components by using different input information than the other linked components. The safety managers also compare the outputs of the linked components to determine whether each output indicates the occurrence of a same event. When the output of one linked component does not indicate the occurrence of an event that is indicated by the outputs of the other linked components, the safety managers identify the one linked component as having failed. Based on this, the outputs of the other linked components are used to carry out operations of the safety-critical system without using the output of the failed component.

Abstract: In embodiments of an autonomous vehicle platform and safety architecture, safety managers of a safety-critical system monitor outputs of linked components of the safety-critical system. The linked components comprise at least three components, each of which is configured to produce output indicative of a same event independent from the other linked components by using different input information than the other linked components. The safety managers also compare the outputs of the linked components to determine whether each output indicates the occurrence of a same event. When the output of one linked component does not indicate the occurrence of an event that is indicated by the outputs of the other linked components, the safety managers identify the one linked component as having failed. Based on this, the outputs of the other linked components are used to carry out operations of the safety-critical system without using the output of the failed component.

Abstract: This disclosure provides methods and compositions for increasing genome editing and site-directed integration events utilizing guided endonucleases and meiotic cell-preferred, egg cell-preferred or embryo tissue-preferred promoters.

Abstract: In embodiments of an autonomous vehicle interface system, system nodes are each implemented as a distributed node for independent data processing of low-level sensor data and/or high-level system data. The high-level system data is abstracted from the low-level sensor data, providing invariance to system configuration in higher-level processing algorithms. The autonomous vehicle interface system includes at least one real-time bus for data communications of the low-level sensor data and the high-level system data between the system nodes. The system also includes an application programming interface (API) configured for access by the system nodes to the low-level sensor data and the high-level system data that is published on the real-time bus and accessible via the API.

Abstract: In embodiments of an autonomous vehicle platform and safety architecture, safety managers of a safety-critical system monitor outputs of linked components of the safety-critical system. The linked components comprise at least three components, each of which is configured to produce output indicative of a same event independent from the other linked components by using different input information than the other linked components. The safety managers also compare the outputs of the linked components to determine whether each output indicates the occurrence of a same event. When the output of one linked component does not indicate the occurrence of an event that is indicated by the outputs of the other linked components, the safety managers identify the one linked component as having failed. Based on this, the outputs of the other linked components are used to carry out operations of the safety-critical system without using the output of the failed component.

Abstract: The present invention provides compositions and methods for producing haploid induction. Genetic elements associated with haploid induction, recombinant DNA constructs comprising the genetic elements are also provided. Methods are further provided for generating haploid inducer plants, haploid plants, and doubled haploid plants (including spontaneous diploidization).

Abstract: A fleet of one or more autonomous electric vehicles is provided for storing electricity and supplying electricity to an electrical grid, and performing agricultural operations, each vehicle of the multiple autonomous electric vehicles comprising: an energy system configured to store and supply electricity and configured for electrical connection with the electrical grid; a navigation system for autonomously navigating the vehicle; and an operating system configured to wirelessly receive vehicle instructions from a central system and to provide vehicle sub-system instructions to the energy system and the navigation system based on the vehicle instructions, the vehicle instructions based on at least one of electric utility grid parameters and agricultural parameters. In at least one embodiment, a single autonomous electric vehicle for storing electricity and supplying electricity to an electrical grid, and performing agricultural operations is provided.

Abstract: In embodiments of an autonomous vehicle interface system, system nodes are each implemented as a distributed node for independent data processing of low-level sensor data and/or high-level system data. The high-level system data is abstracted from the low-level sensor data, providing invariance to system configuration in higher-level processing algorithms. The autonomous vehicle interface system includes at least one real-time bus for data communications of the low-level sensor data and the high-level system data between the system nodes. The system also includes an application programming interface (API) configured for access by the system nodes to the low-level sensor data and the high-level system data that is published on the real-time bus and accessible via the API.

Abstract: In embodiments of an autonomous vehicle interface system, system nodes are each implemented as a distributed node for independent data processing of low-level sensor data and/or high-level system data. The high-level system data is abstracted from the low-level sensor data, providing invariance to system configuration in higher-level processing algorithms. The autonomous vehicle interface system includes at least one real-time bus for data communications of the low-level sensor data and the high-level system data between the system nodes. The system also includes an application programming interface (API) configured for access by the system nodes to the low-level sensor data and the high-level system data that is published on the real-time bus and accessible via the API.

Abstract: In embodiments of an autonomous vehicle platform and safety architecture, safety managers of a safety-critical system monitor outputs of linked components of the safety-critical system. The linked components comprise at least three components, each of which is configured to produce output indicative of a same event independent from the other linked components by using different input information than the other linked components. The safety managers also compare the outputs of the linked components to determine whether each output indicates the occurrence of a same event. When the output of one linked component does not indicate the occurrence of an event that is indicated by the outputs of the other linked components, the safety managers identify the one linked component as having failed. Based on this, the outputs of the other linked components are used to carry out operations of the safety-critical system without using the output of the failed component.

Abstract: In embodiments of an autonomous vehicle interface system, system nodes are each implemented as a distributed node for independent data processing of low-level sensor data and/or high-level system data. The high-level system data is abstracted from the low-level sensor data, providing invariance to system configuration in higher-level processing algorithms. The autonomous vehicle interface system includes at least one real-time bus for data communications of the low-level sensor data and the high-level system data between the system nodes. The system also includes an application programming interface (API) configured for access by the system nodes to the low-level sensor data and the high-level system data that is published on the real-time bus and accessible via the API.

Abstract: There is provided a use of a modulator of Notch signalling for the preparation of a medicament for treatment of Graft Versus Host Disease (GVHD) and diseases and conditions caused by or associated with transplants such as organ, tissue and/or cell transplants (e.g. bone marrow transplants), wherein the modulator is used to reduce the reactivity of cells of the immune system.

Abstract: A phase detector and signal locking system controller for use in a digital phase-locked loop (PLL) application includes a first and a second phase detector where the first phase detector result is used to control the initial pull-in and the second phase detector is used to control fine tuning once the phase differences are too small for appropriate detection by the first phase detector. A post processing and control unit operates to effectively merge the two phase detector outputs and to apply the appropriate gain factor that can be used to control a PLL system.

Abstract: The present invention relates to the use of therapeutic compounds in the modification of T-cell, T-cell antigen presenting cell (APC) interactions and the interactions between pathogenic organisms and immunocompetent cells of a host. In particular it relates to the use of these compounds in the modulation of the interaction between Notch proteins and their ligand and to the use of such compounds in the therapy of conditions such as graft rejection, autoimmunity, allergy, and asthma and infectious diseases.

Abstract: A pipelined processor such as an averaging filter including at least one subtractor section and at least one adder section. Both of the subtractor section and the adder section have a plurality of adder logic units. In comparison to the conventional processor, the processor of the present invention is streamlined by the application of one or more of three techniques. First, there is the interleaving approach where the subtractor section and the adder section are interleaved with one another. Second, there is the one delay feedback approach where the adder section includes a one delay feedback for each of the adder logic units. Third, there is the delay enable signal output approach where the averaging filter includes a delay enable signal output for each of the adder logic units of the adder section.

Abstract: A clock synthesizer produces an output clock that has a programmable phase offset from the input clock. The clock synthesizer includes an accumulator and an offset adder. The output clock is derived from the offset adder. The offset adder receives a value derived from the accumulator and a selected phase offset value. The phase difference between the non-aligned output clock and the aligned output clock is determined by the phase offset value. The time resolution of the clock synthesizer may be defined by the clock rate of the system and the number of bits used in the offset adder and the accumulator.

Abstract: A phase detection system allows the capture range, lock range and jitter tolerance to be extended beyond ±360°. The capture range for the phase detection system may be extended in programmable amounts up to several thousand clock cycles or can be set to any desired maximum capture range in steps of approximately 360°. The phase detection system circuit utilizes a coarse phase detector and a fine phase detector. The phase detection system uses the digital cycle slip counter phase detector to provide a wide phase capture and lock range for a large jitter tolerance. The phase detection system combines this detector with a fine phase measurement from a PFD (phase and frequency detector) for very accurate phase control and low output jitter. The PFD operates in the approximately ±540° range and provides overlap in response with a coarse phase detector using a digital cycle counter approach.

Abstract: A phase detection system allows the capture range, lock range and jitter tolerance to be extended beyond ±360°. The capture range for the phase detection system may be extended in programmable amounts up to several thousand clock cycles or can be set to any desired maximum capture range in steps of approximately 360°. The phase detection system circuit utilizes a coarse phase detector and a fine phase detector. The phase detection system uses the digital cycle slip counter phase detector to provide a wide phase capture and lock range for a large jitter tolerance. The phase detection system combines this detector with a fine phase measurement from a PFD (phase and frequency detector) for very accurate phase control and low output jitter. The PFD operates in the approximately ±540° range and provides overlap in response with a coarse phase detector using a digital cycle counter approach.

Abstract: A clock synthesizer produces an output clock that has a programmable phase offset from the input clock. The clock synthesizer includes an accumulator and an offset adder. The output clock is derived from the offset adder. The offset adder receives a value derived from the accumulator and a selected phase offset value. The phase difference between the non-aligned output clock and the aligned output clock is determined by the phase offset value. The time resolution of the clock synthesizer may be defined by the clock rate of the system and the number of bits used in the offset adder and the accumulator.

Abstract: An improvement to a phase and frequency detector (PFD) employs an additional reset control that acts to effectively reset the registers that generate the phase indicator signals if an undesirable preconditioned state has been entered. The additional reset control signal is generated by a register that is enabled upon detection of the preconditioned state. The new reset control signal is activated upon detection of a synchronizing signal, that is based on an input source signal, while the enable control is active. The improved detector can allows a phase locked loop (PLL) system locking to the nearest input reference clock edge and it can provide immunity to missing input clock edges.