Patents by Inventor JONATHAN M. EASTEP

JONATHAN M. EASTEP has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20190121414
    Abstract: Methods and apparatus to provide holistic global performance and power management are described. In an embodiment, logic (e.g., coupled to each compute node of a plurality of compute nodes) causes determination of a policy for power and performance management across the plurality of compute nodes. The policy is coordinated across the plurality of compute nodes to manage a job to one or more objective functions, where the job includes a plurality of tasks that are to run concurrently on the plurality of compute nodes. Other embodiments are also disclosed and claimed.
    Type: Application
    Filed: October 16, 2018
    Publication date: April 25, 2019
    Applicant: Intel Corporation
    Inventors: Jonathan M. Eastep, Richard J. Greco
  • Patent number: 10223171
    Abstract: Systems, apparatuses and methods may provide for obtaining, by a system level reallocator in a plurality of reallocators arranged in a hierarchical tree, resource budget information. Additionally, application performance information may be obtained by at least one of the plurality of reallocators. Moreover, a performance imbalance between a plurality of compute subtrees associate with the application performance information may be reduced by the at least one of the plurality of reallocators and based at least in part on the resource budget information and the application performance information.
    Type: Grant
    Filed: March 25, 2016
    Date of Patent: March 5, 2019
    Assignee: Intel Corporation
    Inventors: Stephanie Labasan, Federico Ardanaz, Jonathan M. Eastep, Richard J. Greco
  • Publication number: 20190041949
    Abstract: Various embodiments comprise prioritizing frequency allocations in thermally- or power-constrained computing devices. Computer elements may be assigned ‘weights’ based on their priorities. The computer elements with higher weights may receive higher frequency allocations to assure they receive priority in processing more quickly. The computer elements with lower weights may receive lower frequency allocations and suffer a slowdown in their processing. Elements with the same weight may be grouped together for the purpose of frequency allocation.
    Type: Application
    Filed: January 9, 2018
    Publication date: February 7, 2019
    Applicant: Intel Corporation
    Inventors: Asma Al-Rawi, Federico Ardanaz, Jonathan M. Eastep, Nikhil Gupta, Ankush Varma, Krishnakanth V. Sistla, Ian M. Steiner
  • Publication number: 20190034203
    Abstract: An apparatus is provided which comprises: a component; a voltage generator to supply load current to the component; first one or more circuitries to predict that the load current is to increase from a first time; and second one or more circuitries to, in anticipation of the increase in the load current from the first time, cause the component to execute first instructions during a time period that occurs prior to the first time.
    Type: Application
    Filed: July 31, 2017
    Publication date: January 31, 2019
    Inventors: Federico Ardanaz, Roger Gramunt, Jesus Corbal, Dennis R. Bradford, Jonathan M. Eastep
  • Publication number: 20180373287
    Abstract: An apparatus system is provided which comprises: a first component and a second component; a first circuitry to assign the first component to a first group of components, and to assign the second component to a second group of components; and a second circuitry to assign a first maximum frequency limit to the first group of components, and to assign a second maximum frequency limit to the second group of components, wherein the first component and the second component are to respectively operate in accordance with the first maximum frequency limit and the second maximum frequency limit.
    Type: Application
    Filed: June 23, 2017
    Publication date: December 27, 2018
    Inventors: Asma H. Al-Rawi, Federico Ardanaz, Jonathan M. Eastep, Dorit Shapira, Krishnakanth Sistla, Nikhil Gupta, Vasudevan Srinivasan, Chris MacNamara
  • Publication number: 20180356868
    Abstract: An apparatus is provided which comprises: a controller to allocate, to a component, a resource budget selected from a plurality of quantization levels; and a circuitry to adaptively update the plurality of quantization levels.
    Type: Application
    Filed: September 28, 2017
    Publication date: December 13, 2018
    Inventors: Fuat Keceli, Federico Ardanaz, Jonathan M. Eastep, Ankush Varma, Krishnakanth V. Sistla
  • Publication number: 20180351812
    Abstract: Technologies for dynamic bandwidth management of interconnect fabric include a compute device configured to calculate a predicted fabric bandwidth demand which is expected to be used by the interconnect fabric in a next epoch and subsequent to a present epoch. The compute device is additionally configured to determine whether any global links and/or local links of the interconnect fabric can be disabled during the next epoch as a function of the calculated predicted fabric bandwidth demand and a number of redundant paths associated with the links of the interconnect fabric. The compute device is further configured to disable one or more of the global links and/or the local links that can be disabled, the one or more local links of the plurality of local links that can be disabled. Other embodiments are described herein.
    Type: Application
    Filed: March 30, 2018
    Publication date: December 6, 2018
    Inventors: Eric R. Borch, Robert C. Zak, Mario Flajslik, Jonathan M. Eastep, Michael A. Parker
  • Patent number: 10146287
    Abstract: Apparatus and methods may provide for subscribing a thread to a resource monitor through a machine specific register and subscribing the thread to a class of service through the machine specific register. The resource monitor or the class of service for the thread may be changed without interrupting the thread. The power allocated to the processor core may be changed based on the selected class of service for the thread.
    Type: Grant
    Filed: April 1, 2016
    Date of Patent: December 4, 2018
    Assignee: Intel Corporation
    Inventors: Federico Ardanaz, Ian M. Steiner, Jonathan M. Eastep, Richard J. Greco, Krishnakanth V. Sistla, Micah Barany, Andrew J. Herdrich
  • Patent number: 10101786
    Abstract: Methods and apparatus to provide holistic global performance and power management are described. In an embodiment, logic (e.g., coupled to each compute node of a plurality of compute nodes) causes determination of a policy for power and performance management across the plurality of compute nodes. The policy is coordinated across the plurality of compute nodes to manage a job to one or more objective functions, where the job includes a plurality of tasks that are to run concurrently on the plurality of compute nodes. Other embodiments are also disclosed and claimed.
    Type: Grant
    Filed: December 22, 2014
    Date of Patent: October 16, 2018
    Assignee: Intel Corporation
    Inventors: Jonathan M. Eastep, Richard J. Greco
  • Patent number: 10048736
    Abstract: Methods and apparatus to provide holistic global performance and power management are described. In an embodiment, logic (e.g., coupled to each compute node of a plurality of compute nodes) causes determination of a policy for power and performance management across the plurality of compute nodes. The policy is coordinated across the plurality of compute nodes to manage a job to one or more objective functions, where the job includes a plurality of tasks that are to run concurrently on the plurality of compute nodes. Other embodiments are also disclosed and claimed.
    Type: Grant
    Filed: December 22, 2014
    Date of Patent: August 14, 2018
    Assignee: Intel Corporation
    Inventors: Jonathan M. Eastep, Richard J. Greco
  • Publication number: 20180067533
    Abstract: Apparatus, systems, and methods provide an interface between a plurality of hardware resources of a node and a power manager. The interface is configured to define one or more resource groups to expose to the power manager for power measurement and control, assign the plurality of hardware resources to the one or more resource groups, and provide a power allowance to each resource group.
    Type: Application
    Filed: August 29, 2017
    Publication date: March 8, 2018
    Applicant: INTEL CORPORATION
    Inventors: Federico Ardanaz, Jonathan M. Eastep, Richard J. Greco, Ramkumar Nagappan, Alan B. Kyker
  • Publication number: 20180059768
    Abstract: Apparatus, systems, and methods provide dynamic spatial power steering among a plurality of power domains in the computer system on a per phase basis of a particular application. Dynamic spatial power steering may include, for example, determining a plurality of phases corresponding to an application comprising tasks for execution on a processing node. determining a spatial power distribution between a plurality of power domains on the processing node based on a performance metric for each phase, monitoring the application to detect a current phase, and applying the spatial power distribution correspond to the current phase to the plurality of power domains.
    Type: Application
    Filed: October 19, 2017
    Publication date: March 1, 2018
    Applicant: INTEL CORPORATION
    Inventors: Jonathan M. Eastep, Rohit Banerjee, Richard J. Greco, Ilya Sharapov, David N. Lombard, Hari K. Nagpal
  • Patent number: 9864423
    Abstract: Apparatus and methods may provide for characterizing a plurality of similar components of a distributed computing system based on a maximum safe operation level associated with each component and storing characterization data in a database and allocating non-uniform power to each similar component based at least in part on the characterization data in the database to substantially equalize performance of the components.
    Type: Grant
    Filed: December 24, 2015
    Date of Patent: January 9, 2018
    Assignee: Intel Corporation
    Inventors: Alan G. Gara, Steve S. Sylvester, Jonathan M. Eastep, Ramkumar Nagappan, Christopher M. Cantalupo
  • Patent number: 9829902
    Abstract: Apparatus, systems, and methods provide dynamic power steering that includes determining a sequence of phases of an application in a node. The sequence corresponds to a time interval associated with an energy budget. For each phase, the dynamic power steering includes determining a power scaling comprising a measured response to an increase or decrease in power distributed to a plurality of power domains in the node, and based on the power scaling for each phase, determining a temporal power distribution between the phases in the sequence to satisfy the energy budget.
    Type: Grant
    Filed: December 23, 2014
    Date of Patent: November 28, 2017
    Assignee: INTEL CORPORATION
    Inventors: Jonathan M. Eastep, Rohit Banerjee, Richard J. Greco
  • Patent number: 9811143
    Abstract: Apparatus, systems, and methods provide dynamic spatial power steering among a plurality of power domains in the computer system on a per phase basis of a particular application. Dynamic spatial power steering may include, for example, determining a plurality of phases corresponding to an application comprising tasks for execution on a processing node. determining a spatial power distribution between a plurality of power domains on the processing node based on a performance metric for each phase, monitoring the application to detect a current phase, and applying the spatial power distribution correspond to the current phase to the plurality of power domains.
    Type: Grant
    Filed: December 23, 2014
    Date of Patent: November 7, 2017
    Assignee: INTEL CORPORATION
    Inventors: Jonathan M. Eastep, Rohit Banerjee, Richard J. Greco, Ilya Sharapov, David N. Lombard, Hari K. Nagpal
  • Publication number: 20170285710
    Abstract: Apparatus and methods may provide for subscribing a thread to a resource monitor through a machine specific register and subscribing the thread to a class of service through the machine specific register. The resource monitor or the class of service for the thread may be changed without interrupting the thread. The power allocated to the processor core may be changed based on the selected class of service for the thread.
    Type: Application
    Filed: April 1, 2016
    Publication date: October 5, 2017
    Applicant: Intel Corporation
    Inventors: Federico Ardanaz, Ian M. Steiner, Jonathan M. Eastep, Richard J. Greco, Krishnakanth V. Sistla, Micah Barany, Andrew J. Herdrich
  • Publication number: 20170277576
    Abstract: Systems, apparatuses and methods may provide for obtaining, by a system level reallocator in a plurality of reallocators arranged in a hierarchical tree, resource budget information. Additionally, application performance information may be obtained by at least one of the plurality of reallocators. Moreover, a performance imbalance between a plurality of compute subtrees associate with the application performance information may be reduced by the at least one of the plurality of reallocators and based at least in part on the resource budget information and the application performance information.
    Type: Application
    Filed: March 25, 2016
    Publication date: September 28, 2017
    Applicant: Intel Corporation
    Inventors: Stephanie Labasan, Federico Ardanaz, Jonathan M. Eastep, Richard J. Greco
  • Publication number: 20170279926
    Abstract: Systems, apparatuses and methods may provide for a plurality of node-level agents, wherein each node-level agent aggregates network statistics information from a plurality of probes associated with a communications interface. Additionally, one or more job-level agents may be communicatively coupled to the plurality of node-level agents, wherein each job-level agent aggregates network statistics information from two or more of the node-level agents. Moreover, a system-level agent may be communicatively coupled to the job-level agent(s). The system-level agent may generate a power model based on aggregated network statistics information from the job-level agent(s) and propagate the power model to the node-level agents via the job-level agent(s).
    Type: Application
    Filed: March 25, 2016
    Publication date: September 28, 2017
    Applicant: Intel Corporation
    Inventors: Jonathan M. Eastep, Eric R. Borch
  • Patent number: 9753526
    Abstract: Apparatus, systems, and methods provide an interface between a plurality of hardware resources of a node and a power manager. The interface is configured to define one or more resource groups to expose to the power manager for power measurement and control, assign the plurality of hardware resources to the one or more resource groups, and provide a power allowance to each resource group.
    Type: Grant
    Filed: December 23, 2014
    Date of Patent: September 5, 2017
    Assignee: INTEL CORPORATION
    Inventors: Federico Ardanaz, Jonathan M. Eastep, Richard J. Greco, Ramkumar Nagappan, Alan B. Kyker
  • Publication number: 20170185129
    Abstract: Apparatus and methods may provide for characterizing a plurality of similar components of a distributed computing system based on a maximum safe operation level associated with each component and storing characterization data in a database and allocating non-uniform power to each similar component based at least in part on the characterization data in the database to substantially equalize performance of the components.
    Type: Application
    Filed: December 24, 2015
    Publication date: June 29, 2017
    Applicant: Intel Corporation
    Inventors: Alan G. Gara, Steve S. Sylvester, Jonathan M. Eastep, Ramkumar Nagappan, Christopher M. Cantalupo