Patents by Inventor Jong Chen

Jong Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240120443
    Abstract: In embodiments a component includes a semiconductor layer sequence having a p-side semiconductor layer, an n-side semiconductor layer and an active zone located therebetween, wherein the active zone has a multiple quantum well structure including a plurality of quantum barrier layers and quantum well layers, the quantum barrier layers and the quantum well layers being arranged alternately along a vertical direction, wherein the active zone has at least one recess having facets extending obliquely to a main surface of the active zone, the recess being opened towards the p-side semiconductor layer, wherein, at least within the recess, the quantum barrier layers are n-doped and have a non-constant doping profile so that the component is configured to increase transport negatively charged charge carriers, from the n-side semiconductor layer towards the p-side semiconductor layer, based on the non-constant doping profile, and wherein, from the n-side semiconductor layer towards the p-side semiconductor layer, dopa
    Type: Application
    Filed: February 17, 2021
    Publication date: April 11, 2024
    Inventors: Xiaojun Chen, Heng Wang, Jong Ho Na, Alvaro Gomez-lglesias
  • Patent number: 11950771
    Abstract: The present invention provides a supporting hook structure, comprising a sleeve, a fixing rod, a first limit unit, a hook and a fixing device. The fixing rod is connected to the side surface of the sleeve. The hook body is connected to one end of the sleeve. The first limit unit is arranged on the side surface of the sleeve and adjacent to the hook body. The first limit unit makes the hook body rotates with the axis direction of the sleeve as a rotation axis. The fixing device is connected to the other end of the sleeve to fix the rotating position of the hook body. Through the above, the hook part enters the proximal thigh from a surgical entrance and the hook part rotates to make the hook part abut against the proximal femur to complete the positioning and fixation of the femur hook structure to the femur.
    Type: Grant
    Filed: August 16, 2021
    Date of Patent: April 9, 2024
    Assignee: UNITED ORTHOPEDIC CORPORATION
    Inventors: Yan-Shen Lin, Jiann-Jong Liau, Yu-Liang Liu, Teh-Yang Lin, Wen-Chuan Chen
  • Patent number: 11955527
    Abstract: A method includes forming a first sacrificial layer over a substrate, and forming a sandwich structure over the first sacrificial layer. The sandwich structure includes a first isolation layer, a two-dimensional material over the first isolation layer, and a second isolation layer over the two-dimensional material. The method further includes forming a second sacrificial layer over the sandwich structure, forming a first source/drain region and a second source/drain region on opposing ends of, and contacting sidewalls of, the two-dimensional material, removing the first sacrificial layer and the second sacrificial layer to generate spaces, and forming a gate stack filling the spaces.
    Type: Grant
    Filed: June 18, 2021
    Date of Patent: April 9, 2024
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chao-Ching Cheng, Yi-Tse Hung, Hung-Li Chiang, Tzu-Chiang Chen, Lain-Jong Li, Jin Cai
  • Publication number: 20240100490
    Abstract: The present disclosure relates to a technology of preparing an anion exchange composite membrane including: a porous polymer support; and a polyfluorene-based anion exchange membrane or a polyfluorene-based anion exchange membrane having a cross-linked structure formed on the support, and applying the same to alkaline fuel cells, water electrolysis, carbon dioxide reduction, metal-air batteries, etc. The polyfluorene-based anion exchange composite membrane including a porous polymer support according to the present disclosure has remarkably improved mechanical properties, dimensional stability, durability, long-term stability, etc.
    Type: Application
    Filed: December 9, 2021
    Publication date: March 28, 2024
    Applicant: IUCF-HYU (INDUSTRY-UNIVERSITY COOPERATION FOUNDATION HANYANG UNIVERSITY)
    Inventors: Young Moo LEE, Nanjun CHEN, Jong Hyeong PARK, Ho Hyun WANG
  • Publication number: 20240105515
    Abstract: A method includes forming a first low-dimensional layer over an isolation layer, forming a first insulator over the first low-dimensional layer, forming a second low-dimensional layer over the first insulator, forming a second insulator over the second low-dimensional layer, and patterning the first low-dimensional layer, the first insulator, the second low-dimensional layer, and the second insulator into a protruding fin. Remaining portions of the first low-dimensional layer, the first insulator, the second low-dimensional layer, and the second insulator form a first low-dimensional strip, a first insulator strip, a second low-dimensional strip, and a second insulator strip, respectively. A transistor is then formed based on the protruding fin.
    Type: Application
    Filed: November 28, 2023
    Publication date: March 28, 2024
    Inventors: Chao-Ching Cheng, Tzu-Ang Chao, Chun-Chieh Lu, Hung-Li Chiang, Tzu-Chiang Chen, Lain-Jong Li
  • Publication number: 20240101784
    Abstract: A novel additive for recycling thermoset materials, its related recyclable thermoset composition and its application are disclosed. Specifically, the composition of the additive comprises at least one copolymer that has at least one carbamate group, at least one carbonate group and/or at least one urea group, and a number-average molecular weight of the copolymer is between 100 and 50,000 Da.
    Type: Application
    Filed: September 5, 2023
    Publication date: March 28, 2024
    Inventors: Chien-Hsin Wu, Ying-Chi Huang, Ying-Feng Lin, Wen-Chang Chen, Ho-Ching Huang, Ru-Jong Jeng
  • Publication number: 20240096834
    Abstract: A method is provided. The method includes determining a first bump map indicative of a first set of positions of bumps. The method includes determining, based upon the first bump map, a first plurality of bump densities associated with a plurality of regions of the first bump map. The method includes smoothing the first plurality of bump densities to determine a second plurality of bump densities associated with the plurality of regions of the first bump map. The method includes determining, based upon the second plurality of bump densities, a second bump map indicative of the first set of positions of the bumps and a set of sizes of the bumps.
    Type: Application
    Filed: March 27, 2023
    Publication date: March 21, 2024
    Inventors: Shih Hsuan HSU, Chan-Chung CHENG, Chun-Chen LIU, Cheng-Hung CHEN, Peng-Ren CHEN, Wen-Hao CHENG, Jong-l MOU
  • Publication number: 20240089075
    Abstract: A physical layer (PHY) processor of a network device receives: a timing packet that includes initial timing information, and one or more indicators of one or more parameters to be used by the PHY processor for embedding timing information into the timing packet, the one or more indicators including at least i) an indicator indicating that the timing packet is a type of packet into which timing information is to be embedded by the PHY device, ii) an indicator of a location of a field in the timing packet at which the timing information is to be embedded into the timing packet by the PHY device, and iii) an indicator of whether timing information in the timing packet needs to be updated by the PHY device. The PHY processor updates, based on the one or more indicators, the initial timing information in the timing packet.
    Type: Application
    Filed: November 13, 2023
    Publication date: March 14, 2024
    Inventors: Nitzan DROR, Lenin PATRA, Jeng-Jong CHEN
  • Patent number: 11818241
    Abstract: A physical layer (PHY) processor of a network device receives: a timing packet that includes initial timing information, and one or more indicators of one or more parameters to be used by the PHY processor for embedding timing information into the timing packet, the one or more indicators including at least i) an indicator indicating that the timing packet is a type of packet into which timing information is to be embedded by the PHY device, ii) an indicator of a location of a field in the timing packet at which the timing information is to be embedded into the timing packet by the PHY device, and iii) an indicator of whether timing information in the timing packet needs to be updated by the PHY device. The PHY processor updates, based on the one or more indicators, the initial timing information in the timing packet.
    Type: Grant
    Filed: February 2, 2023
    Date of Patent: November 14, 2023
    Assignee: Marvell Asia Pte Ltd
    Inventors: Nitzan Dror, Lenin Patra, Jeng-Jong Chen
  • Publication number: 20230188313
    Abstract: A physical layer (PHY) processor of a network device receives: a timing packet that includes initial timing information, and one or more indicators of one or more parameters to be used by the PHY processor for embedding timing information into the timing packet, the one or more indicators including at least i) an indicator indicating that the timing packet is a type of packet into which timing information is to be embedded by the PHY device, ii) an indicator of a location of a field in the timing packet at which the timing information is to be embedded into the timing packet by the PHY device, and iii) an indicator of whether timing information in the timing packet needs to be updated by the PHY device. The PHY processor updates, based on the one or more indicators, the initial timing information in the timing packet.
    Type: Application
    Filed: February 2, 2023
    Publication date: June 15, 2023
    Inventors: Nitzan DROR, Lenin PATRA, Jeng-Jong CHEN
  • Patent number: 11575495
    Abstract: A media access control (MAC) processor of a network device receives a timing packet to be transmitted by the network device. The MAC processor generates one or more indicators to be used by a PHY device of the network device for embedding timing information into the timing packet. The one or more indicators include at least an indicator indicating that the timing packet is a type of packet into which timing information is to be embedded, an indicator of a location of a field in the timing packet at which the timing information is to be embedded, and an indicator of whether timing information in the timing packet needs to be updated. The MAC processor transfers the timing packet and the one or more indicators to the PHY device for further processing of the timing packet and subsequent transmission of the timing packet from the network device.
    Type: Grant
    Filed: March 23, 2021
    Date of Patent: February 7, 2023
    Assignee: Marvell Israel (M.I.S.L) Ltd.
    Inventors: Nitzan Dror, Lenin Patra, Jeng-Jong Chen
  • Publication number: 20220377281
    Abstract: The present disclosure discloses an object detection method used in an object detection apparatus that includes the steps outlined below. An image signal received from an image sensor is detected to generate an image detection signal when an image variation is detected. An infrared signal received from an infrared sensor is detected to generate an infrared detection signal when an infrared energy variation is detected. A time counting process is initialized when the image detection signal is generated. An object detection signal is generated when the infrared detection signal is generated within a predetermined time period after the time counting process is initialized. A detection distance of the image sensor is larger than a detection distance of the infrared sensor.
    Type: Application
    Filed: December 1, 2021
    Publication date: November 24, 2022
    Inventors: FU-CHENG CHEN, Yih-Ru TSAI, Po-Jong CHEN
  • Publication number: 20210297230
    Abstract: A media access control (MAC) processor of a network device receives a timing packet to be transmitted by the network device. The MAC processor generates one or more indicators to be used by a PHY device of the network device for embedding timing information into the timing packet. The one or more indicators include at least an indicator indicating that the timing packet is a type of packet into which timing information is to be embedded, an indicator of a location of a field in the timing packet at which the timing information is to be embedded, and an indicator of whether timing information in the timing packet needs to be updated. The MAC processor transfers the timing packet and the one or more indicators to the PHY device for further processing of the timing packet and subsequent transmission of the timing packet from the network device.
    Type: Application
    Filed: March 23, 2021
    Publication date: September 23, 2021
    Inventors: Nitzan DROR, Lenin PATRA, Jeng-Jong CHEN
  • Patent number: 10610001
    Abstract: A mask device for facial skin care includes: an outer mask, which is formed to be spaced apart from a user's face at a predetermined interval, has a size to cover the whole face, and includes first and second eye protection holes located around the eyes and slots respectively formed at a left end portion and a right end portion; an LED module, and to which a control line receiving electric power connected to the controller of the outside and a control signal is connected; an inner mask, which is located outside the LED module, has a size to cover the hole face; and an eye protection member whose one end is combined to the first and second eye protection holes of the inner mask and the other end protrudes to come into contact with the user's eyes.
    Type: Grant
    Filed: June 13, 2017
    Date of Patent: April 7, 2020
    Inventor: Jong-Chen Kim
  • Publication number: 20180352936
    Abstract: A mask device for facial skin care includes: an outer mask, which is formed to be spaced apart from a user's face at a predetermined interval, has a size to cover the whole face, and includes first and second eye protection holes located around the eyes and slots respectively formed at a left end portion and a right end portion; an LED module, and to which a control line receiving electric power connected to the controller of the outside and a control signal is connected; an inner mask, which is located outside the LED module, has a size to cover the hole face; and an eye protection member whose one end is combined to the first and second eye protection holes of the inner mask and the other end protrudes to come into contact with the user's eyes.
    Type: Application
    Filed: June 13, 2017
    Publication date: December 13, 2018
    Inventor: Jong-Chen KIM
  • Patent number: 9853145
    Abstract: High-voltage semiconductor devices are provided. The high-voltage semiconductor device includes a substrate and an isolation structure in the substrate. The high-voltage semiconductor device includes a gate structure disposed on the substrate, wherein the gate structure is separated from the isolation structure by a distance. The high-voltage semiconductor device also includes a metal electrode disposed on the gate structure, wherein the metal electrode extends to directly above the isolation structure. The high-voltage semiconductor device further includes an interconnection structure including the lowest metal layer, wherein the metal electrode is between the lowest metal layer and the gate structure. Methods of manufacturing the high-voltage semiconductor device are also provided.
    Type: Grant
    Filed: October 4, 2016
    Date of Patent: December 26, 2017
    Assignee: VANGUARD INTERNATIONAL SEMICONDUCTOR CORPORATION
    Inventors: Chien-Wei Chiu, Ching-Jong Chen, Fan Ho, Chien-Hsien Song
  • Patent number: 9759411
    Abstract: An LED lamp includes: a lamp housing configured to have LEDs for emitting light embedded therein, have the front thereof opened so that the light of the LEDs is radiated, have an angle adjustment groove formed laterally and lengthily, and having outside concave-convex parts formed in a convex and arc shape on both sides of the angle adjustment groove; a guide block inserted into the angle adjustment groove of the lamp housing and fixed movably along the angle adjustment groove; a fixing block configured to have an inside concavo-convex part formed in a concave and arc shape under one side of the fixing block so that the inside concavo-convex part corresponds to the outside concave-convex parts of the lamp housing; a first fastening member configured to penetrate the inside concavo-convex part of the fixing block and fastened to the guide block inserted into the angle adjustment groove.
    Type: Grant
    Filed: February 13, 2013
    Date of Patent: September 12, 2017
    Inventor: Jong-Chen Kim
  • Patent number: 9470378
    Abstract: Provided is an LED lamp in which a lens for diffusing light from an LED can be received in and fixed to a reflector without interfering with the outer side of the lens. The LED lamp of the present invention includes a lamp unit configured to emit light; a lamp housing unit configured to have the lamp unit embedded in the lamp housing unit and to have the front opened so that the light of the lamp unit is scanned to the front; a front cover unit fixed in front of the lamp housing unit and configured to have the inside hollowed; and glass fixed in front of the lamp housing unit by means of the front cover unit and configured to transmit the light of the lamp unit.
    Type: Grant
    Filed: December 12, 2013
    Date of Patent: October 18, 2016
    Inventor: Jong-Chen Kim
  • Publication number: 20160266198
    Abstract: A method for IC testing bigdata analysis and option value analysis includes: dividing a wafer into devices under test to undergo an electrical property test, retrieving data detected of the devices under test at different parameters; sorting specific parameters from different parameters according to an intended analysis result; loading a drawing software into a program, defining three-dimensional spatial coordinates, and producing a parameter location map of a three-dimensional cylindrical perspective graphic in three-dimensional spatial coordinates according to coordinate points X, Y, Z.
    Type: Application
    Filed: May 24, 2016
    Publication date: September 15, 2016
    Inventor: KWUN JONG CHEN
  • Patent number: D759278
    Type: Grant
    Filed: January 15, 2015
    Date of Patent: June 14, 2016
    Assignee: H.P.I.
    Inventor: Jong Chen Kim