Abstract: A power management integrated circuit includes first pads, second pads, a third pad, and a fourth pad that are configured to be connected with an external device, a regulation block that receives first voltages from the first pads, converts the first voltages to second voltages, and outputs the second voltages to the second pads, a communication block that receives a command through the third pad and outputs an internal information request received together with the command responsive to the command, and a logic block that controls an operation of the regulation block, receives the internal information request from the communication block, and outputs internal state information to the fourth pad based on the internal information request.

Abstract: A power management integrated circuit includes first pads, second pads, a third pad, and a fourth pad that are configured to be connected with an external device, a regulation block that receives first voltages from the first pads, converts the first voltages to second voltages, and outputs the second voltages to the second pads, a communication block that receives a command through the third pad and outputs an internal information request received together with the command responsive to the command, and a logic block that controls an operation of the regulation block, receives the internal information request from the communication block, and outputs internal state information to the fourth pad based on the internal information request.

Abstract: The handpiece includes; an outer housing of a bar shape; a cylindrical core inserted into the outer housing and having an air hole and a water hole; pipes respective inserted into the air hole and the water hole of the core; a rotor made with a cylindrical magnetic material and inserted into the core; cylindrical support rings forcedly fit to both sides of transfer shafts of the rotor; a pair of bearings respectively disposed at the front side and the rear side of the support rings; a coupling disposed in front of the rotor; a front housing joined to the front of the outer housing; a front cap disposed at the rear of the core; a rear cap disposed at the rear of the front cap and having a power supply terminal disposed at one side thereof; and a rear housing joined to the rear of the outer housing.

Abstract: The handpiece includes; an outer housing of a bar shape; a cylindrical core inserted into the outer housing and having an air hole and a water hole; pipes respective inserted into the air hole and the water hole of the core; a rotor made with a cylindrical magnetic material and inserted into the core; cylindrical support rings forcedly fit to both sides of transfer shafts of the rotor; a pair of bearings respectively disposed at the front side and the rear side of the support rings; a coupling disposed in front of the rotor; a front housing joined to the front of the outer housing; a front cap disposed at the rear of the core; a rear cap disposed at the rear of the front cap and having a power supply terminal disposed at one side thereof; and a rear housing joined to the rear of the outer housing.

Abstract: Methods and apparatuses for entering at least one memory into a test mode are provided. At least one test MRS bit may be stored in a first register for controlling the memory. At least one test MRS code may be programmed into a second register. Each of the at least one bits stored in the first register may correspond one of the at least one test MRS codes stored in the second register.

Abstract: A memory module and method thereof are provided. In the example method, a test signal may be applied to a plurality of memory chips included in the memory module. Output data from the plurality of memory chips may be received in response to the applied test signal. The received, output data may be divided into a plurality of groups. At least one of the plurality of groups may be selected in response to an output group selection signal. The at least one selected group may be output (e.g., to an external device). The example memory module may include a plurality of chips and a hub. The example memory module may be configured to perform the above-described example method.

Abstract: Methods and apparatuses for entering at least one memory into a test mode are provided. At least one test MRS bit may be stored in a first register for controlling the memory. At least one test MRS code may be programmed into a second register. Each of the at least one bits stored in the first register may correspond one of the at least one test MRS codes stored in the second register.

Abstract: A method of entering memory module mounted on a memory system or a plurality of memories mounted on the memory module into a test mode, and a first register and a second register for performing the method are introduced. Each of the memory manufacturers provides a different MRS code for entering the memory into the test mode and a different method of entering the memory into the test mode from one another. As a result, the number of the test MRS is stored in the first register for controlling the memory, and the test MRS codes are programmed into the second register. Additionally, each of the bits stored in the first register used for determining the number of the test MRS corresponds to each of the second registers that store a corresponding test MRS code, respectively.