Patents by Inventor Jong-Kai Lin
Jong-Kai Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8385084Abstract: A shielding structure is provided for shielding a signal path extending between a first layer and a second layer in an electronic device at a transition region with a transition that extends in a first direction and a second direction orthogonal to the first direction. The shielding structure includes a shielding structure portion, which includes a first shielding via in proximity to a first area of the signal path at the transition; a second shielding via in proximity to a second area of the signal path at the transition; and an area metallization electrically coupled to the first shielding via.Type: GrantFiled: December 8, 2010Date of Patent: February 26, 2013Inventors: Jinbang Tang, Jong-Kai Lin, Ronald V. McBean
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Patent number: 8097494Abstract: Electromagnetic shielding for an integrated circuit packaged device. The method includes forming shielding structures by forming openings in an encapsulated structure. The openings are filled with conductive material that surrounds at least one die. The encapsulated structure may include a plurality of integrated circuit die. A layered redistribution structure is formed on one side of the encapsulated structure.Type: GrantFiled: January 15, 2010Date of Patent: January 17, 2012Assignee: Freescale Semiconductor, Inc.Inventors: Jinbang Tang, Darrel Frear, Jong-Kai Lin, Marc A. Mangrum, Robert E. Booth, Lawrence N. Herr, Kenneth R. Burch
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Patent number: 8004068Abstract: Embodiments include shielded multi-layer packages for use with multi-chip modules and the like. A substrate (102) (e.g., chip carrier) has an adhesive layer (104), where electronic components (106, 108) are attached. An insulating layer (110) is formed over the plurality of electronic components, and a conductive encapsulant structure (115) is formed over the insulating layer. The adhesive layer is detached from the electronic components, and multi-layer circuitry (140) is formed over, and in electrical communication with, the plurality of electronic components. A shielding via (150) is formed through the multilayer circuitry such that it contacts the conductive encapsulant.Type: GrantFiled: October 27, 2009Date of Patent: August 23, 2011Assignee: Freescale Semiconductor, Inc.Inventors: Jinbang Tang, Jong-Kai Lin
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Publication number: 20110075394Abstract: A shielding structure is provided for shielding a signal path extending between a first layer and a second layer in an electronic device at a transition region with a transition that extends in a first direction and a second direction orthogonal to the first direction. The shielding structure includes a shielding structure portion, which includes a first shielding via in proximity to a first area of the signal path at the transition; a second shielding via in proximity to a second area of the signal path at the transition; and an area metallization electrically coupled to the first shielding via.Type: ApplicationFiled: December 8, 2010Publication date: March 31, 2011Applicant: FREESCALE SEMICONDUCTOR, INC.Inventors: Jinbang Tang, Jong-Kai Lin, Ronald V. McBean
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Patent number: 7869225Abstract: A shielding structure is provided for shielding a signal path extending between a first layer and a second layer in an electronic device at a transition region with a transition that extends in a first direction and a second direction orthogonal to the first direction. The shielding structure includes a shielding structure portion, which includes a first shielding via in proximity to a first area of the signal path at the transition; a second shielding via in proximity to a second area of the signal path at the transition; and an area metallization electrically coupled to the first shielding via.Type: GrantFiled: April 30, 2007Date of Patent: January 11, 2011Assignee: Freescale Semiconductor, Inc.Inventors: Jinbang Tang, Jong-Kai Lin, Ronald V. McBean
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Publication number: 20110003435Abstract: Electromagnetic shielding for an integrated circuit packaged device. The method includes forming shielding structures by forming openings in an encapsulated structure. The openings are filled with conductive material that surrounds at least one die. The encapsulated structure may include a plurality of integrated circuit die. A layered redistribution structure is formed on one side of the encapsulated structure.Type: ApplicationFiled: January 15, 2010Publication date: January 6, 2011Applicant: FREESCALE SEMICONDUCTOR, INC.Inventors: JINBANG TANG, DARREL FREAR, JONG-KAI LIN, MARC A. MANGRUM, ROBERT E. BOOTH, LAWRENCE N. HERR, KENNETH R. BURCH
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Publication number: 20100044840Abstract: Embodiments include shielded multi-layer packages for use with multi-chip modules and the like. A substrate (102) (e.g., chip carrier) has an adhesive layer (104), where electronic components (106, 108) are attached. An insulating layer (110) is formed over the plurality of electronic components, and a conductive encapsulant structure (115) is formed over the insulating layer. The adhesive layer is detached from the electronic components, and multi-layer circuitry (140) is formed over, and in electrical communication with, the plurality of electronic components. A shielding via (150) is formed through the multilayer circuitry such that it contacts the conductive encapsulant.Type: ApplicationFiled: October 27, 2009Publication date: February 25, 2010Applicant: FREESCALE SEMICONDUCTOR, INC.Inventors: Jinbang Tang, Jong-Kai Lin
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Patent number: 7651889Abstract: Electromagnetic shielding for an integrated circuit packaged device. The method includes forming shielding structures by forming openings in an encapsulated structure. The openings are filled with conductive material that surrounds at least one die. The encapsulated structure may include a plurality of integrated circuit die. A layered redistribution structure is formed on one side of the encapsulated structure.Type: GrantFiled: December 20, 2007Date of Patent: January 26, 2010Assignee: Freescale Semiconductor, Inc.Inventors: Jinbang Tang, Darrel Frear, Jong-Kai Lin, Marc A. Mangrum, Robert E. Booth, Lawrence N. Herr, Kenneth R. Burch
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Patent number: 7648858Abstract: Methods and structures provide a shielded multi-layer package for use with multi-chip modules and the like. A substrate (102) (e.g., chip carrier) has an adhesive layer (104), where electronic components (106, 108) are attached. An insulating layer (110) is formed over the plurality of electronic components, and a conductive encapsulant structure (115) is formed over the insulating layer. The adhesive layer is detached from the electronic components, and multi-layer circuitry (140) is formed over, and in electrical communication with, the plurality of electronic components. A shielding via (150) is formed through the multilayer circuitry such that it contacts the conductive encapsulant.Type: GrantFiled: June 19, 2007Date of Patent: January 19, 2010Assignee: Freescale Semiconductor, Inc.Inventors: Jinbang Tang, Jong-Kai Lin
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Publication number: 20090072357Abstract: An electromagnetic interference (EMI) and/or electromagnetic radiation shield is formed on a plurality of encapsulated modules by attaching a plurality of modules (30-33) to a process carrier (10) using a double side adhesive tape (12) before encapsulating the modules with a molding compound (16), and then forming shielding via ring structures (51-54) in the molding compound (16) to surround and shield each module. After removing the adhesive tape (12) to expose a surface of the encapsulated modules, a multi-layer circuit substrate (101) is formed over the exposed surface, where the circuit substrate includes shielding via structures (121-124) that are aligned with and electrically connected to the shielding via ring structures (51-54), thereby encircling and shielding the circuit module(s).Type: ApplicationFiled: September 13, 2007Publication date: March 19, 2009Inventors: Jinbang Tang, Darrel R. Frear, Jong-Kai Lin
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Publication number: 20090075428Abstract: Electromagnetic shielding for an integrated circuit packaged device. The method includes forming shielding structures by forming openings in an encapsulated structure. The openings are filled with conductive material that surrounds at least one die. The encapsulated structure may include a plurality of integrated circuit die. A layered redistribution structure is formed on one side of the encapsulated structure.Type: ApplicationFiled: December 20, 2007Publication date: March 19, 2009Applicant: Freescale Semiconductor, Inc.Inventors: Jinbang Tang, Darrel Frear, Jong-Kai Lin, Marc A. Mangrum, Robert E. Booth, Lawrence N. Herr, Kenneth R. Burch
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Publication number: 20080315376Abstract: An electromagnetic interference (EMI) and/or electromagnetic radiation shield is formed on a plurality of encapsulated modules by attaching a molded package panel to a process carrier (10) using a double side adhesive tape (12) before singulating the individual modules without separating them from the double side adhesive tape. By forming a conductive layer (50) over a mold encapsulant (16) and on the sidewalls of grooves (40-47) that are cut through the mold encapsulant (16) and underlying circuit substrate (14), the conductive layer (50) may be electrically coupled to one or more conductive connection pads (61-66) by virtue of the placement of the conductive connection pads at the periphery or side of the circuit substrate (14).Type: ApplicationFiled: June 19, 2007Publication date: December 25, 2008Inventors: Jinbang Tang, Jong-Kai Lin
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Publication number: 20080315371Abstract: Methods and structures provide a shielded multi-layer package for use with multi-chip modules and the like. A substrate (102) (e.g., chip carrier) has an adhesive layer (104), where electronic components (106, 108) are attached. An insulating layer (110) is formed over the plurality of electronic components, and a conductive encapsulant structure (115) is formed over the insulating layer. The adhesive layer is detached from the electronic components, and multi-layer circuitry (140) is formed over, and in electrical communication with, the plurality of electronic components. A shielding via (150) is formed through the multilayer circuitry such that it contacts the conductive encapsulant.Type: ApplicationFiled: June 19, 2007Publication date: December 25, 2008Applicant: FREESCALE SEMICONDUCTOR, INC.Inventors: Jinbang Tang, Jong-Kai Lin
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Publication number: 20080266829Abstract: A shielding structure is provided for shielding a signal path extending between a first layer and a second layer in an electronic device at a transition region with a transition that extends in a first direction and a second direction orthogonal to the first direction. The shielding structure includes a shielding structure portion, which includes a first shielding via in proximity to a first area of the signal path at the transition; a second shielding via in proximity to a second area of the signal path at the transition; and an area metallization electrically coupled to the first shielding via.Type: ApplicationFiled: April 30, 2007Publication date: October 30, 2008Applicant: FREESCALE SEMICONDUCTOR, INC.Inventors: Jinbang Tang, Jong-Kai Lin, Ronald V. McBean
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Patent number: 6953985Abstract: An exemplary method and apparatus for MEMS device wafer level and/or array packaging comprises inter alia an EM shielding array of dielectric lid elements (340) sealed to a MEMS device die array (300) to produce a sealed MEMS device package array (330). Disclosed features and specifications may be variously controlled, adapted or otherwise optionally modified to improve hermetic sealing and/or EM shielding for any MEMS device. An exemplary embodiment of the present invention representatively provides for wafer level packaging of RF MEMS switches prior to device singulation.Type: GrantFiled: June 12, 2002Date of Patent: October 11, 2005Assignee: Freescale Semiconductor, Inc.Inventors: Jong-Kai Lin, William H. Lytle, Owen Fay, Steven Markgraf, Henry G. Hughes, Craig Amrine, Ananda P. De Silva
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Publication number: 20030230798Abstract: An exemplary method and apparatus for MEMS device wafer level and/or array packaging comprises inter alia an EM shielding array of dielectric lid elements (340) sealed to a MEMS device die array (300) to produce a sealed MEMS device package array (330). Disclosed features and specifications may be variously controlled, adapted or otherwise optionally modified to improve hermetic sealing and/or EM shielding for any MEMS device. An exemplary embodiment of the present invention representatively provides for wafer level packaging of RF MEMS switches prior to device singulation.Type: ApplicationFiled: June 12, 2002Publication date: December 18, 2003Inventors: Jong-Kai Lin, William H. Lytle, Owen Fay, Steven Markgraf, Henry G. Hughes, Craig Amrine, Ananda P. De Silva
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Patent number: 6310403Abstract: A method of manufacturing components includes providing a substrate (110, 531, 631, 700) having a first coefficient of thermal expansion (CTE), having a first surface (111), and supporting a first plurality of interconnects located over the first surface in a first predetermined pattern. The method also includes providing another substrate (190) having a second CTE, having a second surface (195), and supporting a second plurality of interconnects located over the second surface in a second predetermined pattern. The method further includes assembling together the two substrates at a first temperature outside of a temperature range of approximately 25 to 30° C.Type: GrantFiled: August 31, 2000Date of Patent: October 30, 2001Assignee: Motorola, Inc.Inventors: Chunsheng Zhang, Jong-Kai Lin, Scott E. Lindsey, Yifan Guo, Li Li
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Patent number: 6022761Abstract: A method for connecting substrates includes using an adhesive interposer structure (11) to bond a semiconductor device (26) to a substrate (18). The adhesive interposer structure (11) includes a non-conductive adhesive laminant (12) and conductive adhesive bumps (13). The conductive adhesive bumps (13) provide a conductive path between conductive bumps (27) on the semiconductor device (26) and conductive metal pads (21) located on the substrate (18). In an alternative embodiment, a conductive adhesive material (34) is screen or stencil printed into vias (39) located on a printed circuit board (38) to form conductive adhesive bumps (33). A non-conductive adhesive (52) is then screen or stencil printed onto the printed circuit board (38) adjacent the conductive adhesive bumps (33). A semiconductor die is then connected to the structure.Type: GrantFiled: May 28, 1996Date of Patent: February 8, 2000Assignee: Motorola, Inc.Inventors: Melissa E. Grupen-Shemansky, Jong-Kai Lin, Theodore G. Tessier
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Patent number: 5674780Abstract: A method of forming an electrically conductive polymer bump (22) over an aluminum electrode (21) produces low contact resistance for an interconnect structure (24). Aluminum oxide is first removed from the aluminum electrode (21). Tiron and palladium are subsequently bonded to the fresh surface of the aluminum electrode (21). Finally, the electrically conductive polymer bump (22) is formed over the aluminum electrode (21). The Tiron and palladium improve the electrical contact between the conductive polymer bump (22) and the aluminum electrode (21) thereby reducing the contact resistance. The Tiron also inhibits corrosion of the aluminum electrode (21) and enhances the conductivity by catalytically shrinking the cyanate ester conductive bump.Type: GrantFiled: July 24, 1995Date of Patent: October 7, 1997Assignee: Motorola, Inc.Inventors: William H. Lytle, Treliant Fang, Jong-Kai Lin, Ravinder K. Sharma, Naresh C. Saha
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Patent number: 5587342Abstract: Interconnect bumps are formed on a circuit substrate using printing or dispensing techniques with a wet photoresist layer as a mask. A conductive paste is disposed in openings of a wet photoresist layer. The conductive paste is at least partially cured before the wet photoresist layer is removed. Alternatively, the wet photoresist layer may remain if it is a photo-imagable polyimide.Type: GrantFiled: April 3, 1995Date of Patent: December 24, 1996Assignee: Motorola, Inc.Inventors: Jong-Kai Lin, William H. Lytle, Ravichandran Subrahmanyan