Patents by Inventor Jong Kee Kwon

Jong Kee Kwon has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20140176108
    Abstract: Provided is a maximum power extraction devices including: a battery; a voltage control unit adjusting a size of a first power outputted from the battery according to a resistor selected from a plurality of resistors, and generating a compare signal according to a size difference between an operating voltage adjusting the size of the first power depending on the selected resistor and a reference voltage; a switching unit connected between the battery and a load and adjusting a size of the operating voltage according to a size difference of the compare signal in response to first and second switching control signals; a switching control unit generating the first and second switching control signals to allow a size between the operating voltage according to the compare signal and the reference voltage to be within an error range; and a maximum power control unit measuring the number of first operations obtained by counting the occurrence number of the first or second switching control signals for a predetermined
    Type: Application
    Filed: May 28, 2013
    Publication date: June 26, 2014
    Applicant: Electronics and Telecommunications Research Institute
    Inventors: Sewan HEO, Yil Suk Yang, Jong-Kee Kwon
  • Publication number: 20140159542
    Abstract: A flexible piezoelectric energy harvesting device includes a first flexible electrode substrate, a piezoelectric layer disposed on the first flexible electrode substrate, and a second flexible electrode substrate disposed on the piezoelectric layer. The piezoelectric layer may include a plurality of first piezoelectric lines spaced apart from each other in one direction and a plurality of second piezoelectric lines respectively filling spaces between the first piezoelectric lines.
    Type: Application
    Filed: June 3, 2013
    Publication date: June 12, 2014
    Inventors: Sang Kyun LEE, Yil Suk YANG, Jong-Kee KWON
  • Publication number: 20140132326
    Abstract: Provided is a pulse noise suppression circuit. The pulse noise suppression circuit includes a filter circuit converting an input signal of a pulse type into an increasing or decreasing filter signal, a level reset circuit resetting the filter signal in response to the input signal and an output signal and an output circuit converting the filter signal into the output signal of a pulse type, wherein the level reset circuit resets the filter signal to have a high level when the input signal and the output signal all have a high level, and resets the filter signal to have a low level when the input signal and the output signal all have a low level.
    Type: Application
    Filed: June 20, 2013
    Publication date: May 15, 2014
    Inventors: Yi-Gyeong KIM, Tae Moon ROH, Jong-Kee KWON
  • Patent number: 8717221
    Abstract: A successive approximation register analog-to-digital converter is provided which includes first and second capacitor arrays configured to generate first and second level voltages, respectively; a comparator configured to compare the first and second level voltages to output a comparison signal; SAR logic configured to generate a digital signal in response to the comparison signal; and a variable common mode selector configured to compare a first analog input voltage and a common mode voltage and to supply one of the first analog input voltage and the common mode voltage to top plates of the first and second capacitor arrays according to a comparison result.
    Type: Grant
    Filed: February 8, 2013
    Date of Patent: May 6, 2014
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Young-deuk Jeon, Tae Moon Roh, Jong-Kee Kwon
  • Patent number: 8659464
    Abstract: The present inventive concept relates to an analog-digital converter. The analog-digital converter includes a clock generating unit generating a clock signal; a clock delay adjusting unit outputting one of a first clock signal to a Kth clock signal according to a control signal; a capacitive digital-analog converting unit outputting a difference between the analog signal and a reference signal; a comparison unit judging whether an output of the capacitive digital-analog converting unit is 0, a positive number, or a negative number, in response to an output of the clock delay adjusting unit; and an SAR logic unit transferring an output of the comparison unit to the capacitive digital-analog converting unit in response to an output of the clock delay adjusting unit and performing a successive approximation operation to output the N-bit digital signal.
    Type: Grant
    Filed: August 23, 2012
    Date of Patent: February 25, 2014
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Young-deuk Jeon, Woo Seok Yang, Tae Moon Roh, Jong-Kee Kwon, Jongdae Kim
  • Patent number: 8610493
    Abstract: Disclosed is a bias circuit which includes a bias voltage generating part configured to generate a bias voltage using a reference current and a variable current; a reference current source part configured to provide the reference current to the bias voltage generating part; and a current adjusting part configured to provide the variable current to the bias voltage generating part and to adjust the amount of the variable current according to voltage levels of at least two input signals. The bias circuit prevents an increase in power consumption and improves a slew rate at the same time.
    Type: Grant
    Filed: September 23, 2011
    Date of Patent: December 17, 2013
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Yi-Gyeong Kim, Bong Chan Kim, Min-Hyung Cho, Jong-Kee Kwon
  • Patent number: 8604845
    Abstract: Disclosed is a triangular wave generator which includes a square wave signal generating unit configured to output a first signal transitioning to a high level from a low level via an output terminal in response to a first transition of a clock signal and to transition the first signal to a low level from a high level in response to a reset signal; a resistance unit configured to adjust a voltage level of a the square wave signal; and a capacitance unit configured to receive an output signal of the resistance unit to generate a second signal rising to a high level from a low level with a slope, to provide the reset signal to the square wave signal generating unit, and to output a triangular signal by falling the second signal to a low level from a high level with a slope.
    Type: Grant
    Filed: June 4, 2012
    Date of Patent: December 10, 2013
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Hui Dong Lee, Jaewon Nam, Young Kyun Cho, Jong-Kee Kwon, Yil Suk Yang, Jongdae Kim
  • Patent number: 8564469
    Abstract: A pipelined analog-to-digital converter includes a digital correction circuit configured to improve the complexity of a logic circuit for dividing a correction period and a no-correction period of a digital output. The pipelined analog-to-digital converter performs a logic correction operation via binary shifting at data error correction. Accordingly, although the resolution increases, it is possible to reduce the complexity and area of a logic circuit.
    Type: Grant
    Filed: December 2, 2011
    Date of Patent: October 22, 2013
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Jaewon Nam, Young-deuk Jeon, Young Kyun Cho, Jong-Kee Kwon
  • Patent number: 8547081
    Abstract: A reference voltage supply circuit is provided. The reference voltage supply circuit includes a first amplifier for amplifying a first input voltage and a fed back first reference voltage, a second amplifier for amplifying a second input voltage and a fed back second reference voltage, a reference voltage generator for generating the first reference voltage and the second reference voltage according to output signals of the first and second amplifiers and feeding the first and second reference voltages back to the first and second amplifiers, and a glitch remover turned on/off according to an input pulse signal to conduct or cut off current flowing between a power supply terminal and the ground.
    Type: Grant
    Filed: July 9, 2010
    Date of Patent: October 1, 2013
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Young Deuk Jeon, Young Kyun Cho, Jae Won Nam, Jong Kee Kwon
  • Patent number: 8542139
    Abstract: Provided are a current switch driving circuit generating a signal for driving a current switch, and a digital-to-analog converter using the same. The current switch driving circuit includes a first PMOS transistor in which a source terminal is connected to a power supply terminal, a gate terminal receives an input signal, and a drain terminal outputs a driving signal, an NMOS transistor in which a drain terminal is connected to the drain terminal of the first PMOS transistor, and a gate terminal receives the input signal, a second PMOS transistor in which a source terminal is connected to a source terminal of the NMOS transistor, a gate terminal is connected to a bias voltage terminal, and a drain terminal is connected to a ground terminal, and a control current source allowing the second PMOS transistor to be maintained constantly in an ON state.
    Type: Grant
    Filed: December 2, 2011
    Date of Patent: September 24, 2013
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Min-Hyung Cho, Yi-Gyeong Kim, Jong-Kee Kwon
  • Patent number: 8531328
    Abstract: Provided is an analog digital converter (ADC). The ADC includes: a capacitor array generating a level voltage; a comparator outputting a compare signal by comparing the level voltage; and a logic circuit determining digital bits of an analog signal based on the compare signal, wherein the logic circuit determines at least one digital bit among digital bits of the analog signal while a sampling operation of the analog signal is performed in the capacitor array.
    Type: Grant
    Filed: September 23, 2011
    Date of Patent: September 10, 2013
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Young-deuk Jeon, Young Kyun Cho, Jaewon Nam, Jong-Kee Kwon
  • Patent number: 8508392
    Abstract: Disclosed is a pipelined analog-to-digital converter which includes a digital correction circuit configured to measure and correct a pipelined conversion stage gain error and an offset error due to a finite voltage gain operational amplifier and capacitor mismatch. The pipelined analog-to-digital converter includes a pipelined conversion stage error measuring and correcting circuit measuring and correcting an error generated from an conversion stage, so that an error of a conversion stage is minimized and a chip realization area and power consumption are reduced.
    Type: Grant
    Filed: September 23, 2011
    Date of Patent: August 13, 2013
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Jaewon Nam, Young-deuk Jeon, Young Kyun Cho, Jong-Kee Kwon
  • Publication number: 20130193774
    Abstract: Disclosed is an energy storage system provided with a wired and wireless energy transfer function. The energy storage system includes: an energy input unit to which energy generated from a plurality of energy sources is input; an energy input control unit for selecting one energy source from among the plurality of energy sources, and transferring energy of the selected energy source through operation in a wired operation mode or a wireless operation mode; a wireless energy transmitting/receiving unit for wirelessly transmitting/receiving the energy of the selected energy source during the operation in the wireless operation mode of the energy input control unit; an energy storage/control unit for storing the energy of the selected energy source; an energy output unit for consuming the energy stored in the energy storage/control unit; and an energy output control unit for distributing the energy stored in the energy storage/control unit to the energy output unit.
    Type: Application
    Filed: August 28, 2012
    Publication date: August 1, 2013
    Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Yil Suk Yang, Jong Dae Kim, Se Wan Heo, Ji Min Oh, Min Ki Kim, Jong Kee Kwon
  • Patent number: 8482443
    Abstract: Provided is a clock timing adjustment device for adjusting a time difference of clocks and a delta-sigma modulator. The clock timing adjustment device includes a power detection unit and a timing adjustment unit. The power detection unit receives input signals which are generated using pairs of first and second clocks having a plurality of clock time differences and respectively correspond to the clock time differences, detects powers of the input signals, and outputs a control signal corresponding to a clock time difference where the power is minimized. The timing adjustment unit receives a reference clock and the control signal and outputs the first and second clocks having the clock time difference where the power is minimized from the reference clock according to the control signal.
    Type: Grant
    Filed: July 15, 2011
    Date of Patent: July 9, 2013
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Yi-Gyeong Kim, Bong Chan Kim, Min-Hyung Cho, Jong-Kee Kwon
  • Publication number: 20130156069
    Abstract: The inventive concept discloses a new temperature sensor structure based on oscillator which is insensitive to a process change and improves an error rate of temperature output. The temperature sensor based on oscillator compares an oscillator circuit structure insensitive to a temperature change with an oscillator circuit structure having a frequency change in proportion to a temperature change to output a relative difference between the two oscillator circuit structures and thereby it is compensated itself. In the temperature sensor based on oscillator, a problem of performance reduction due to an external environment and a process deviation of temperature sensor is improved and an output distortion and temperature nonlinearity are effectively improved. Thus, since the temperature sensor based on oscillator has a structure of high performance, low power and low cost, it can be variously used in a detection equipment of temperature environment.
    Type: Application
    Filed: September 14, 2012
    Publication date: June 20, 2013
    Applicant: Electronics and Telecommunications Research Institute
    Inventors: Seok Ju Yun, Young-deuk Jeon, Tae Moon Roh, Jong-Kee Kwon, Woo Seok Yang, Jongdae Kim
  • Publication number: 20130157106
    Abstract: Provided are an anode in which lithium metal powder and carbon powder are physically mixed with each other to form a composite and the composite is applied as an anode layer, and a lithium metal secondary battery including the anode. The anode of the present invention may suppress the formation of lithium dendrites and the change in volume of cells generated in a rechargeable battery which uses a lithium metal anode and significantly improve the cycle life-span of a lithium metal secondary battery by physically mixing lithium metal particles and carbon particles having an equivalent average particle diameter with each other to be applied as an anode layer.
    Type: Application
    Filed: May 23, 2012
    Publication date: June 20, 2013
    Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Young Gi Lee, Kwang Man Kim, Yil Suk Yang, Jong Kee Kwon, Jong Dae Kim
  • Publication number: 20130148456
    Abstract: Provided is a voltage supply circuit using a charge pump. The voltage supply circuit enhances charge pump output voltage fluctuation characteristics depending on load variation of a charge pump voltage generator (load regulation characteristics) when receiving an operation power supply voltage of the charge pump through a regulator. The voltage supply circuit is configured to feed back fluctuation of a charge pump output voltage to a charge pump voltage regulator. The fluctuation of the charge pump output voltage is compensated through fluctuation of an output voltage of the charge pump to active enhance the load regulation characteristics.
    Type: Application
    Filed: July 10, 2012
    Publication date: June 13, 2013
    Applicant: Electronics and Telecommunications Research Institute
    Inventors: Min-Hyung CHO, Yi-Gyeong KIM, Tae Moon ROH, Woo Seok YANG, Jong-Kee KWON, Jongdae KIM
  • Publication number: 20130139864
    Abstract: Provided is a thermoelectric device including two legs having a rough side surface and a smooth side surface facing each other. Phonons may be scattered by the rough side surface, thereby decreasing thermal conductivity of the device. Flowing paths for electrons and phonons may become different form each other, because of a magnetic field induced by an electric current passing through the legs. The smooth side surface may be used for the flowing path of electrons. As a result, in the thermoelectric device, thermal conductivity can be reduced and electric conductivity can be maintained.
    Type: Application
    Filed: September 12, 2012
    Publication date: June 6, 2013
    Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Younghoon Hyun, Moon Gyu Jang, Young Sam Park, Taehyoung Zyung, Yil Suk Yang, Jong-Kee Kwon
  • Patent number: 8446194
    Abstract: Provided is a spread spectrum clock generating circuit. The spread spectrum clock generating circuit includes: a phase detector receiving a reference frequency signal from the external and detecting a phase difference between the reference frequency signal and a frequency-divided signal; a voltage controlled oscillator outputting an oscillation signal corresponding to a detection result of the phase detector; a main divider generating the frequency-divided signal by dividing a frequency of the oscillation signal by a main dividing ratio; and a dividing ratio controller generating a variable count value, generating a sub dividing ratio by performing delta-sigma modulation according to the count value, and adjusting the main dividing ratio according to the sub dividing ratio.
    Type: Grant
    Filed: October 18, 2011
    Date of Patent: May 21, 2013
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Seok Ju Yun, Hui Dong Lee, Kwi Dong Kim, Jong-Kee Kwon
  • Publication number: 20130099868
    Abstract: Disclosed is a sound detecting circuit which includes a sensing unit configured to generate an AC signal in response to a sound pressure level of a sound signal; an amplification unit configured to amplify the AC signal; and a bias voltage generating unit configured to generate a bias voltage to be provided to the amplification unit. The bias voltage generating unit comprises a current source configured to provide a power current; and a current-voltage converting circuit configured to convert the power current into the bias voltage and to reduce a noise due to the power current.
    Type: Application
    Filed: June 22, 2012
    Publication date: April 25, 2013
    Applicant: Electronics & Telecommunications Research Institute
    Inventors: Yi-Gyeong KIM, Min-Hyung CHO, Tae Moon ROH, Jong-Kee KWON, Woo Seok YANG, Jongdae KIM