Patents by Inventor Jong-Kuk Kim
Jong-Kuk Kim has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20090206448Abstract: A semiconductor device that prevents the leaning of storage node when forming a capacitor having high capacitance includes a plurality of cylinder-shaped storage nodes formed over a semiconductor substrate; and support patterns formed to fix the storage nodes in the form of an ‘L’ or a ‘+’ when viewed from the top. This semiconductor device having support patterns in the form of an ‘L’ or a ‘+’ reduces stress on the storage nodes when subsequently forming a dielectric layer and plate nodes that prevents the capacitors from leaking.Type: ApplicationFiled: October 2, 2008Publication date: August 20, 2009Inventors: Ho Jin CHO, Cheol Hwan PARK, Jae Wook SEO, Jong Kuk KIM
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Publication number: 20090085159Abstract: A semiconductor device and a method for manufacturing the same are provided. The semiconductor device includes cylinder type bottom electrodes connected to a contact plug formed over a semiconductor substrate, and a supporting pattern formed between the cylinder type bottom electrodes, wherein a portion of sidewalls of the bottom electrodes is higher than the supporting pattern and the other portion of the sidewalls of the bottom electrode is lower than the supporting pattern.Type: ApplicationFiled: May 27, 2008Publication date: April 2, 2009Inventors: Jong Kuk KIM, Seung Bum Kim
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Patent number: 7482257Abstract: A method for forming a metal contact in a semiconductor device includes forming bit lines over a substrate defined into a cell region and a peripheral region, forming a first inter-layer dielectric (ILD) layer over the bit lines, forming a first etch stop layer over the first ILD layer, forming a capacitor in the cell region, forming a second etch stop layer over the substrate after the capacitor is formed, forming a second ILD layer over the second etch stop layer, performing a first etching process to etch portions of the second ILD layer and the second etch stop layer to thereby form first metal contact holes exposing the first etch stop layer, and performing a second etching process to etch portions of the first etch stop layer and the first ILD layer to thereby form second metal contact holes exposing the bit lines.Type: GrantFiled: June 29, 2006Date of Patent: January 27, 2009Assignee: Hynix Semiconductor, Inc.Inventors: Jae-Seon Yu, Jong-Kuk Kim
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Publication number: 20090017087Abstract: This invention provides an Osseo-inductive metal implant for a living body and the producing method thereof and, more particularly, the Osseo-inductive metal implant for a living body according to the present invention is produced by forming, on the surface of the metal implant, the layer of metal oxide and the layer of bio-active material injected.Type: ApplicationFiled: March 31, 2005Publication date: January 15, 2009Applicant: KOREA INSTITUTE OF MACHINERY AND MATERIALSInventors: Eung-Sun Byon, Yong-Soo Jeong, Jong-Kuk Kim, Young-Taeg Sul, Beom-Seok Chang, Lee-Ra Cho
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Publication number: 20080242042Abstract: A method for fabricating a capacitor in a semiconductor device includes forming a sacrificial layer and a support layer on a substrate. A plurality of openings are formed by etching the support layer and the sacrificial layer. An electrode is formed in inner walls of the openings including sidewalls of the support layer patterned through etching. A portion of the patterned support layer is removed, and the sacrificial layer is also removed.Type: ApplicationFiled: June 29, 2007Publication date: October 2, 2008Applicant: Hynix Semiconductor Inc.Inventors: Jong-Kuk KIM, Jung-Seock Lee, Phil-Goo Kong, Hyun Ahn
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Publication number: 20080200006Abstract: A method for forming a shallow trench isolation (STI) of a semiconductor device comprises forming a nitride film pattern over a semiconductor substrate having a defined lower structure, etching a predetermined thickness of the semiconductor substrate using the nitride film pattern as a mask to form a trench having a vertical sidewall in a portion of the substrate predetermined to be a device isolation region, performing a plasma treatment process on the sidewall of the trench to form a plasma oxide film, forming an oxide film over the resulting structure to fill the trench, and performing a planarization process over the resulting structure.Type: ApplicationFiled: November 26, 2007Publication date: August 21, 2008Applicant: HYNIX SEMICONDUCTOR INC.Inventors: Seung Bum Kim, Jong Kuk Kim
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Publication number: 20080153247Abstract: A method for manufacturing a semiconductor device comprises forming an interlayer insulating film including a storage node contact plug over a semiconductor substrate; forming an etching barrier film, a sacrificial insulating film, and a hard mask film over the storage node contact plug and the interlayer insulating film; forming a first storage node region by removing a portion of the sacrificial insulating film and the hard mask film by an etching process such that a polymer film is formed at a sidewall of the hard mask film and the sacrificial insulating film; and forming a second storage node region by removing the remaining portions of the sacrificial insulating film and the etching barrier film, thereby exposing the storage node contact plug. The method prevents a bowing phenomenon in the etching process for forming a storage node region and thus allows storage nodes having substantially vertical profiles to be formed.Type: ApplicationFiled: June 29, 2007Publication date: June 26, 2008Applicant: HYNIX SEMICONDUCTOR INC.Inventor: Jong Kuk Kim
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Publication number: 20080117872Abstract: Embodiments of the present invention may provide an apparatus and a method for transmitting an orthogonal frequency division multiplexing access (OFDMA) symbol in an OFDMA system. A bandwidth limit parameter for generating an OFDMA symbol may be adaptively determined based on the received signal quality of a receiver. An OFDMA symbol may be generated based on the bandwidth limit parameter and transmitted to the receiver. According to embodiments, when the received signal quality of the receiver is bad, the bandwidth limit parameter may be first adjusted before the modulation scheme is changed to have a lower data rate. In such a case, the downlink date rate may be maintained with enhancing the received signal quality of the receiver.Type: ApplicationFiled: November 15, 2007Publication date: May 22, 2008Inventors: Jong Kuk KIM, Hyoung Chang Kang, Kyoung Bong You
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Publication number: 20070148858Abstract: A method for forming a metal contact in a semiconductor device includes forming bit lines over a substrate defined into a cell region and a peripheral region, forming a first inter-layer dielectric (ILD) layer over the bit lines, forming a first etch stop layer over the first ILD layer, forming a capacitor in the cell region, forming a second etch stop layer over the substrate after the capacitor is formed, forming a second ILD layer over the second etch stop layer, performing a first etching process to etch portions of the second ILD layer and the second etch stop layer to thereby form first metal contact holes exposing the first etch stop layer, and performing a second etching process to etch portions of the first etch stop layer and the first ILD layer to thereby form second metal contact holes exposing the bit lines.Type: ApplicationFiled: June 29, 2006Publication date: June 28, 2007Inventors: Jae Yu, Jong-Kuk Kim
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Patent number: 6441554Abstract: Disclosed is an apparatus for generating low-temp plasma at atmospheric pressure, comprising: a couple of electrodes facing each other at a distance, one of them being connected to a power supply, the other being grounded; a couple of dielectrics with a thickness of 25 &mgr;m-10 mm, positioned on the facing surfaces of the electrodes in such a way as to face each other, one of them having at least one discharge gap therein; and a conductor electrode having at least one tip positioned within the discharge gap, in which an electric field is applied at an intensity of 1-100 KV/cm through the power supply across the electrodes by use of a pulse direct current or an alternating current in a frequency bandwidth of 50 Hz-10 GHz while a reaction gas is fed between the electrodes, so as to induce a hollow cathode discharge, a capillary discharge or the high accumulation of charges from the discharge gap.Type: GrantFiled: May 14, 2001Date of Patent: August 27, 2002Assignee: SE Plasma Inc.Inventors: Kee-Seok Nam, Sang-Ro Lee, Jong-Ju Rha, Koo-Hyun Lee, Jong-Kuk Kim
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Publication number: 20020063537Abstract: Disclosed is an apparatus for generating low-temp plasma at atmospheric pressure, comprising: a couple of electrodes facing each other at a distance, one of them being connected to a power supply, the other being grounded; a couple of dielectrics with a thickness of 25 &mgr;m-10 mm, positioned on the facing surfaces of the electrodes in such a way as to face each other, one of them having at least one discharge gap therein; and a conductor electrode having at least one tip positioned within the discharge gap, in which an electric field is applied at an intensity of 1-100 KV/cm through the power supply across the electrodes by use of a pulse direct current or an alternating current in a frequency bandwidth of 50 Hz-10 GHz while a reaction gas is fed between the electrodes, so as to induce a hollow cathode discharge, a capillary discharge or the high accumulation of charges from the discharge gap.Type: ApplicationFiled: May 14, 2001Publication date: May 30, 2002Applicant: Korea Institute Of Machinery & MaterialsInventors: Kee-Seok Nam, Sang-Ro Lee, Jong-Ju Rha, Koo-Hyun Lee, Jong-Kuk Kim
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Patent number: 6026763Abstract: A thin-film deposition apparatus includes an arc vaporization portion from which charged particles of a deposition material are generated by a cathodic arc discharge, a plasma duct having a bend and guiding the charged particles from the arc vaporization portion to a substrate, a magnetic field generator for generating magnetic fields to direct the charged particles from the arc vaporization portion to the substrate, and a reflective magnetic field source installed in a convex portion of the bend of the plasma duct, for generating magnetic fields that interfere with the magnetic fields formed by the magnetic field generator so that magnetic flux lines are distributed along the plasma duct.Type: GrantFiled: November 26, 1997Date of Patent: February 22, 2000Assignee: Samsung Electronics Co., Ltd.Inventors: Jong-kuk Kim, Seung-ho Nam, Byong-lyong Choi
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Patent number: 5486931Abstract: A recording/reproducing method includes helically scanning a first region of a magnetic tape running at a normal speed using several rotary heads, recording a digital data train on several sloped tracks and simultaneously recording single-frame data at N-picture intervals on a second region of the magnetic tape through at least one fixed head, and reproducing the data recorded on the first region during a normal reproduction, while the magnetic tape runs at an N-times speed for variable speed reproduction to reproduce the data recorded on the second region. In a digital VTR, the recording data for the normal recording/reproduction and special recording/reproduction is separately recorded and reproduced on mutually different regions of the magnetic tape. Accordingly, since the processing of the normal recording/reproduction signal is independent from that of the special recording/reproduction signal, the normal-processing design is facilitated due to a greater degree of freedom.Type: GrantFiled: July 14, 1993Date of Patent: January 23, 1996Assignee: Samsung Electronics Co., Ltd.Inventors: Jong-kuk Kim, Kwang-ho Moon
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Patent number: 5263100Abstract: In an image coding system for coding a digital image signal sequence into a coded signal sequence and transmitting an amount of information of the coded signal at a fixed bit rate, an image coding method for coding the image signal sequence includes the steps of setting an initial quantization step size by calculation of frame information measures (PIM) with respect to an image signal sequence for each frame, segmenting the image signal sequence of each frame into a block signal sequence including a plurality of N.times.Type: GrantFiled: July 20, 1992Date of Patent: November 16, 1993Assignee: Samsung Electronics Co., Ltd.Inventors: Jong-kuk Kim, Min-seok Hong, Tae-eung Kim