Abstract: A display device according to one or more embodiments includes a first substrate including emission areas, and a non-emission area between the emission areas, light-emitting elements above the first substrate and respectively in the emission areas, a second substrate above the first substrate, and defining grooves corresponding to the emission areas on a surface facing the first substrate, light conversion layers in the grooves above the light-emitting elements, and reflective layers on sidewalls of the grooves, and surrounding the light conversion layers in plan view.

Abstract: A display device includes a substrate, a plurality of pixel electrodes disposed on the substrate and spaced apart from each other at a first interval and a plurality of light emitting elements respectively disposed on the plurality of pixel electrodes. Each of the pixel electrodes has a rectangular shape having a long side and a short side, and a width of each of the light emitting elements is larger than a width of the short side and smaller than the first interval between the pixel electrodes.

Abstract: A tiled display device includes display devices comprising a first display device and a second display device adjacent to each other, each including a display area including a first display area and a second display area. The first display area includes at least a portion of an inner area of the display area, and the second display area includes at least a portion of an edge area of the display area. Each of the display devices includes inner sub-pixels disposed on a base layer in the first display area, and edge sub-pixels disposed on the base layer in the second display area. The edge sub-pixels include an inorganic light emitting element comprising an inorganic material, and the inner sub-pixels include a light source different from the inorganic light emitting element.

Abstract: A display device includes a substrate. A pixel electrode is disposed on the substrate. The pixel electrode has one or more grooves defined therein. Light emitting elements are respectively disposed in the one or more grooves.

Abstract: A light emitting element includes an n-type semiconductor, a p-type semiconductor, and an active layer between the n-type semiconductor and the p-type semiconductor, threading dislocations are formed in the n-type semiconductor, and openings are formed on a surface of the n-type semiconductor based on the threading dislocations.

Abstract: A tiled display device may include a first panel including a first display element layer; a second panel including a second display element layer; and a shared layer including a color conversion part. The shared layer may include a first portion and a second portion. The first portion may overlap the first panel in a plan view. The second portion may overlap the second panel in a plan view. The color conversion part may change a wavelength of light provided from the first panel and the second panel.

Abstract: A display device includes a substrate; a semiconductor layer disposed on the substrate; a gate insulating film disposed on the semiconductor layer; a gate layer disposed on the gate insulating film and insulated from the semiconductor layer; an insulating film disposed on the semiconductor layer and the gate layer; and a metal layer disposed on the insulating film, wherein the semiconductor layer and the gate layer are electrically connected through the metal layer, and the semiconductor layer overlaps the gate layer in a plan view.

Abstract: A thin film transistor array panel includes a substrate and a thin film transistor disposed on a surface of the substrate. The thin film transistor includes a semiconductor, a source electrode, and a drain electrode that are disposed on a same layer as one another. The semiconductor is between the source electrode and the drain electrode. The thin film transistor array panel further includes a buffer layer disposed between the semiconductor and the substrate and including an inorganic insulating material. The first edge of the buffer layer is substantially parallel to an adjacent edge of the semiconductor, a second edge of the buffer layer is substantially parallel to an adjacent edge of the source electrode, and a third edge of the buffer layer is substantially parallel to an adjacent edge of the drain electrode.

Abstract: A display device includes a substrate; a semiconductor layer disposed on the substrate; a gate insulating film disposed on the semiconductor layer; a gate layer disposed on the gate insulating film and insulated from the semiconductor layer; an insulating film disposed on the semiconductor layer and the gate layer; and a metal layer disposed on the insulating film, wherein the semiconductor layer and the gate layer are electrically connected through the metal layer, and the semiconductor layer overlaps the gate layer in a plan view.

Abstract: A display device includes a substrate which includes a display area and a non-display area, a transistor disposed in the display area, a pad disposed in the non-display area, and an insulating layer which is disposed on the transistor and defines an opening which overlaps the pad in a plan view. The pad includes a main layer, a first auxiliary layer on the main layer, and a second auxiliary layer on the first auxiliary layer, and the second auxiliary layer defines the opening.

Abstract: An organic light emitting display device includes a substrate, a semiconductor pattern disposed on the substrate, a conductive line disposed in a different layer from the semiconductor pattern, a pixel electrode disposed on the conductive line and on the semiconductor pattern, and a connection electrode disposed in a same layer as the pixel electrode. The connection electrode may be connected to the semiconductor pattern and the conductive line.

Abstract: A display device includes: a first pixel including a first organic light emitting diode and a first driving transistor for controlling a driving current flowing to the first organic light emitting diode; a second pixel including a second organic light emitting diode and a second driving transistor for controlling a driving current flowing to the second organic light emitting diode; and a third pixel including a third organic light emitting diode and a third driving transistor for controlling a driving current flowing to the third organic light emitting diode, wherein the first driving transistor, the second driving transistor, and the third driving transistor include a different number of unit transistors from one another, and the first pixel, the second pixel, and the third pixel have different colors from one another.

Abstract: A thin film transistor array panel includes a substrate and a thin film transistor disposed on a surface of the substrate. The thin film transistor includes a semiconductor, a source electrode, and a drain electrode that are disposed on a same layer as one another. The semiconductor is between the source electrode and the drain electrode. The thin film transistor array panel further includes a buffer layer disposed between the semiconductor and the substrate and including an inorganic insulating material. The first edge of the buffer layer is substantially parallel to an adjacent edge of the semiconductor, a second edge of the buffer layer is substantially parallel to an adjacent edge of the source electrode, and a third edge of the buffer layer is substantially parallel to an adjacent edge of the drain electrode.

Abstract: A thin film transistor array panel includes a substrate and a thin film transistor disposed on a surface of the substrate. The thin film transistor includes a semiconductor, a source electrode, and a drain electrode that are disposed on a same layer as one another. The semiconductor is between the source electrode and the drain electrode. The thin film transistor array panel further includes a buffer layer disposed between the semiconductor and the substrate and including an inorganic insulating material. The first edge of the buffer layer is substantially parallel to an adjacent edge of the semiconductor, a second edge of the buffer layer is substantially parallel to an adjacent edge of the source electrode, and a third edge of the buffer layer is substantially parallel to an adjacent edge of the drain electrode.

Abstract: A display device integrated with a sensor includes a first substrate and a second substrate disposed while facing each other, and having exposed ends at different sides thereof, a sealing material configured to seal an overlapping region between the first and second substrates, a display unit including a plurality of pixels provided in a sealed region inside the sealing material, a sensor electrode unit formed on the second substrate, a first pad unit formed in an exposed part of the first substrate, and a second pad unit formed in an exposed part of the second substrate.

Abstract: A transistor substrate may include a base substrate, a data line, a conductive layer, a semiconductor layer, a gate electrode, and a pixel electrode. The data line may directly contact the base substrate. The conductive layer may directly contact the base substrate and may be spaced from the data line. The semiconductor layer may overlap the conductive layer, may be spaced from the conductive layer, and may include a source electrode and a drain electrode. The source electrode may be electrically connected to the data line. The gate electrode may overlap the semiconductor layer. The pixel electrode may be electrically connected to the drain electrode.

Abstract: An organic light emitting diode display, includes a substrate; a thin film transistor and a storage capacitor that are disposed and spaced apart from each other on the substrate; and an organic light emitting diode that is connected to the thin film transistor. The storage capacitor includes a capacitor lower electrode, a capacitor insulating layer disposed on the capacitor lower electrode, and a capacitor upper electrode disposed on the capacitor insulating layer. The capacitor lower electrode is a conducting oxide semiconductor into which hydrogen has diffused.

Abstract: A thin film transistor array panel includes a substrate and a thin film transistor disposed on a surface of the substrate. The thin film transistor includes a semiconductor, a source electrode, and a drain electrode that are disposed on a same layer as one another. The semiconductor is between the source electrode and the drain electrode. The thin film transistor array panel further includes a buffer layer disposed between the semiconductor and the substrate and including an inorganic insulating material. The first edge of the buffer layer is substantially parallel to an adjacent edge of the semiconductor, a second edge of the buffer layer is substantially parallel to an adjacent edge of the source electrode, and a third edge of the buffer layer is substantially parallel to an adjacent edge of the drain electrode.

Abstract: A thin film transistor array panel includes a substrate and a thin film transistor disposed on a surface of the substrate. The thin film transistor includes a semiconductor, a source electrode, and a drain electrode that are disposed on a same layer as one another. The semiconductor is between the source electrode and the drain electrode. The thin film transistor array panel further includes a buffer layer disposed between the semiconductor and the substrate and including an inorganic insulating material. The first edge of the buffer layer is substantially parallel to an adjacent edge of the semiconductor, a second edge of the buffer layer is substantially parallel to an adjacent edge of the source electrode, and a third edge of the buffer layer is substantially parallel to an adjacent edge of the drain electrode.

Abstract: A transistor substrate may include a base substrate, a data line, a conductive layer, a semiconductor layer, a gate electrode, and a pixel electrode. The data line may directly contact the base substrate. The conductive layer may directly contact the base substrate and may be spaced from the data line. The semiconductor layer may overlap the conductive layer, may be spaced from the conductive layer, and may include a source electrode and a drain electrode. The source electrode may be electrically connected to the data line. The gate electrode may overlap the semiconductor layer. The pixel electrode may be electrically connected to the drain electrode.