Abstract: A device for adjusting a seat of a vehicle is capable of implementing functions including adjusting a position of the seat back and forth, a height of the seat up and down, and tilting or the like by using a plurality of actuators having pistons. The functions of adjusting the position of the seat back and forth, the height of the seat up and down, and tilting or the like are carried out by providing connections between a floor panel and a seat cushion frame through a plurality of actuators and a single link, and selectively moving a piston of each actuator back and forth.

Abstract: The present disclosure provides a seat back including a bolster for a vehicle. The seat back may include a seat back frame including a side member formed on each of opposite sides thereof so that a left-and-right support of the seat back may be automatically adjusted. The seat back further includes a rotating plate having a structure integrally including an external plate extending into the bolster, and an internal plate extending inwardly into the seat back. A boundary portion between the external plate and the internal plate of the rotating plate may be rotatably mounted to the side member of the seat back frame.

Abstract: A seatback frame for vehicles is disclosed. The seatback frame for vehicles has a simple structure without bracket structures used to install a conventional seatback frame and thus achieves cost reduction and weight reduction. In particular, the seatback frame is segmented into several parts having different rigidities so that only a part, on which load is concentrated, is set to have high strength and thus avoids overdesign for excessively high strength of an unnecessary part.

Abstract: The present disclosure provides a seat back including a bolster for a vehicle. The seat back may include a seat back frame including a side member formed on each of opposite sides thereof so that a left-and-right support of the seat back may be automatically adjusted. The seat back further includes a rotating plate having a structure integrally including an external plate extending into the bolster, and an internal plate extending inwardly into the seat back. A boundary portion between the external plate and the internal plate of the rotating plate may be rotatably mounted to the side member of the seat back frame.

Abstract: A seatback frame for vehicles is disclosed. The seatback frame for vehicles has a simple structure without bracket structures used to install a conventional seatback frame and thus achieves cost reduction and weight reduction. In particular, the seatback frame is segmented into several parts having different rigidities so that only a part, on which load is concentrated, is set to have high strength and thus avoids overdesign for excessively high strength of an unnecessary part.

Abstract: A device for adjusting a seat of a vehicle is capable of implementing functions including adjusting a position of the seat back and forth, a height of the seat up and down, and tilting or the like by using a plurality of actuators having pistons. The functions of adjusting the position of the seat back and forth, the height of the seat up and down, and tilting or the like are carried out by providing connections between a floor panel and a seat cushion frame through a plurality of actuators and a single link, and selectively moving a piston of each actuator back and forth.

Abstract: A semiconductor device may be provided. The semiconductor device may include sense-amplifier test device. The sense-amplifier test device may include a drive signal generator configured to generate a test voltage applying signal for supplying a ground voltage to a pull-up power-supply line of a sense-amplifier. The sense-amplifier test device may include a sense-amplifier driver configured to supply a ground voltage to the pull-up power-supply line of the sense-amplifier, based on the test voltage applying signal.

Abstract: A semiconductor device may be provided. The semiconductor device may include sense-amplifier test device. The sense-amplifier test device may include a drive signal generator configured to generate a test voltage applying signal for supplying a ground voltage to a pull-up power-supply line of a sense-amplifier. The sense-amplifier test device may include a sense-amplifier driver configured to supply a ground voltage to the pull-up power-supply line of the sense-amplifier, based on the test voltage applying signal.

Abstract: The present invention is a data transfer protocol control system with a host bus interface that includes a transmitting/receiving command DMA, a transmitting data DMA and a receiving data DMA for controlling data transfer protocol with a host bus interface considering characteristic, usage frequency, simultaneous processing functions of the command DMA and the data DMAs. A host interface bus is efficiently used and bus usage ratio is distributed properly to support transfer flow properly and improve the entire system performance.

Abstract: The present invention is a data transfer protocol control system with a host bus interface that includes a transmitting/receiving command DMA, a transmitting data DMA and a receiving data DMA for controlling data transfer protocol with a host bus interface considering characteristic, usage frequency, simultaneous processing functions of the command DMA and the data DMAs. A host interface bus is efficiently used and bus usage ratio is distributed properly to support transfer flow properly and improve the entire system performance.

Abstract: The present invention relates to a node connection apparatus. The 3-link node interconnection apparatus and parallel processing apparatus using the same confirm expanding nodes freely, only using fixed three connecting links, and are suitable to normal packaging method because of easy dividing into 2n (n>1) nodes. The apparatuses comprise the following nodes. The first node has three links connected to other nodes respectively. The second node has three links, one links of them is connected to the first node, and the other two links are in charge of connection of X+ direction, X− direction. The third node has three links, one link of them is connected to the first node, and the other two links are in charge of connection of Y+ direction, Y− direction. The fourth node has three links, one link of them is connected to the first node, and the other two links are in charge of connection of Z+ direction, Z− direction.

Abstract: An apparatus for controlling a cache in a computing node, which is located between a node bus and an interconnection network to perform a cache coherence protocol, includes: a node bus interface for interfacing with the node bus; an interconnection network interface for interfacing with the interconnection network; a cache control logic means for controlling the cache to perform the cache coherence protocol; bus-side dual-port transaction buffers coupled between said node bus interface and said cache control logic means for buffering transaction requested and replied from or to local processors contained in the computing node; and network-side dual-port transaction buffers coupled between said interconnection network interface and said cache control logic for buffering transaction requested and replied from or to remote processors contained in another computing node coupled to the interconnection network.

Abstract: The present invention relates to a hierarchical crossbar inter-connection network for a cluster-based parallel processing computer. A crossbar network is composed of the "n" number of crossbar switches which is byte sliced, eight links for connecting eight nodes, and two links for connecting other clusters. In addition, one low-level cluster is formed by connecting a maximum of eight processing nodes between the two crossbar networks, and one high-level cluster is formed with a maximum of eight low-level clusters and the four crossbar networks. Moreover, one next high-level clusters formed with a maximum of eight high-level clusters and the eight crossbar networks for scalability.

Abstract: A non-blocking fault tolerant gamma network for a multi-processor system is disclosed, including: N dual links respectively connected to n source nodes, and for transmitting data input; a first stage made up with n 2.times.3 switching devices for outputting data transmitted from the N dual links; a second stage made up with n 3.times.4 switching devices for outputting data output from the first stage; a third stage to n-1 stage made up with (n-2).times.N 4.times.4 switching devices for receiving data output from the second stage at the third stage and outputting the data to n-1 stage; an n stage made up with n 4.times.