Abstract: An integrated circuit device is provided as follows. A fin-type active region extends on a substrate in a first horizontal direction. A gate line extends on the fin-type active region in a second horizontal direction intersecting the first horizontal direction. A source/drain region is disposed in the fin-type active region at one side of the gale line. An insulating cover extends parallel to the substrate with the gate line and the source/drain region arranged between the insulating cover and the substrate. A source/drain contact that vertically extends through the insulating cover has a first sidewall covered with the insulating cover and an end connected to the source/drain region. A fin isolation insulating unit vertically extends through the insulating cover into the fin-type active region. The source/drain region is arranged between the fin isolation insulating unit and the gate line.

Abstract: Disclosed are an electronic device and a method for determining a degree of conjunctival hyperemia using the same. The electronic device includes a camera and a processor configured to acquire an image including an eye captured by the camera, identify one or more blood vessels included in the image, and determine a degree of conjunctival hyperemia based on sizes of the identified one or more blood vessels.

Abstract: A semiconductor device includes active regions, a gate electrode, respective drain regions, respective source regions, a drain contact structure, a source contact structure, and a gate contact structure. The active regions extend linearly in parallel on a substrate. The gate electrode crosses the active regions. The drain regions are on and/or in the active regions on a first side of the gate electrode. The respective source regions are on and/or in the active regions on a second side of the gate electrode. The drain contact structure is on multiple drain regions. The source contact structure is on multiple source regions. The gate contact structure is on the gate electrode between the drain and source contact structures. The gate contact structure includes a gate plug and an upper gate plug directly on the gate plug. A center of the gate contact structure overlies only one of the active regions.

Abstract: An integrated circuit device is provided as follows. A fin-type active region extends on a substrate in a first horizontal direction. A gate line extends on the fin-type active region in a second horizontal direction intersecting the first horizontal direction. A source/drain region is disposed in the fin-type active region at one side of the gate line. An insulating cover extends parallel to the substrate, with the gate line and the source/drain region arranged between the insulating cover and the substrate. A source/drain contact that vertically extends through the insulating cover has a first sidewall covered with the insulating cover and an end connected to the source/drain region. A fin isolation insulating unit vertically extends through the insulating cover into the fin-type active region. The source/drain region is arranged between the fin isolation insulating unit and the gate line.

Abstract: An apparatus for performing a test on an integrated circuit device is provided. The apparatus includes a processor, at least one mounting portion configured to accommodate at least one integrated circuit device to be tested, and an interface configured to connect the processor to the at least one integrated circuit device to allow data transmission and reception therebetween. The processor is configured to transfer a heating traffic data pattern, which is configured to raise a temperature of the at least one integrated circuit device to a target temperature according to heating test conditions, to the at least one integrated circuit device via the interface.

Abstract: An integrated circuit device is provided as follows. A fin-type active region extends on a substrate in a first horizontal direction. A gate line extends on the fin-type active region in a second horizontal direction intersecting the first horizontal direction. A source/drain region is disposed in the fin-type active region at one side of the gate line. An insulating cover extends parallel to the substrate, with the gate line and the source/drain region arranged between the insulating cover and the substrate. A source/drain contact that vertically extends through the insulating cover has a first sidewall covered with the insulating cover and an end connected to the source/drain region. A fin isolation insulating unit vertically extends through the insulating cover into the fin-type active region. The source/drain region is arranged between the fin isolation insulating unit and the gate line.

Abstract: Semiconductor devices and methods of forming the semiconductor devices are provided. The methods may include forming a fin, forming a first device isolating layer on a side of the fin, forming a second device isolating layer extending through the first device isolating layer, forming first and second gates traversing the fin and forming a third device isolating layer between the first and second gates. The first device isolating layer may include a first material and a lowermost surface at a first depth. The second device isolating layer may include a second material and a lowermost surface at a second depth greater than the first depth. The third device isolating layer may extend into the fin, may include a lowermost surface at a third depth less than the first depth and a third material different from the first and the second materials.

Abstract: The present invention relates to a diagnosis method of liver cancer using mass spectrometry of ?-fetoprotein derived glycopeptide. Particularly, according to the AFP glycopeptide analysis method of the invention, fucosylation rate of the glycopeptide having the sequence composed of Val-Asn-Phe-Thr-Glu-Ile-Gln-Lys is analyzed to diagnose liver cancer in the early developmental grade. In particular, fucosylation rate is higher in the liver cancer patients than in other liver disease patients, so that the comparison of the fucosylation rate can be useful to diagnose or distinguish liver cancer from other liver diseases in the early HCC patients.

Abstract: A communication system in vehicle according to an aspect includes a transmission unit and a receiving unit. The transmission unit includes a modulation unit that generates a PWM signal having a predetermined duty ratio, an output unit that outputs the PWM signal, a feedback unit that feedbacks the PWM signal, and a transmission controller that controls the modulation unit using the feedbacked signal. The receiving unit includes a reception controller that determined whether to drive a load based on the PWM signal and a switching unit that is turned on or turned off based on the determination of the reception controller.

Abstract: An integrated circuit device is provided as follows. A fin-type active region extends on a substrate in a first horizontal direction. A gate line extends on the fin-type active region in a second horizontal direction intersecting the first horizontal direction. A source/drain region is disposed in the fin-type active region at one side of the gate line. An insulating cover extends parallel to the substrate, with the gate line and the source/drain region arranged between the insulating cover and the substrate. A source/drain contact that vertically extends through the insulating cover has a first sidewall covered with the insulating cover and an end connected to the source/drain region. A fin isolation insulating unit vertically extends through the insulating cover into the fin-type active region. The source/drain region is arranged between the fin isolation insulating unit and the gate line.

Abstract: A multi-panel display device includes: a first display device and a second display device each including a display panel, a back cover configured to cover a rear surface of the display panel, and a back cover housing configured to cover a rear surface of the back cover, a first cabinet on which the first and second display devices are supported and attached, and a fine adjustment device positioned on a rear surface of each of the first and second display devices exposed to a rear surface of the first cabinet, wherein the fine adjustment device is connected to the back cover of each of the first and second display devices and exposed to the outside through an adjustment device hole provided in the back cover housing, and positions of the back cover and the display panel are finely adjusted by the fine adjustment device.

Abstract: A semiconductor device includes a substrate having a device isolation region defining an active region. An active fin is positioned in the active region. A gate structure overlaps the active fin along a direction orthogonal to an upper surface of the substrate and extends in a second direction intersecting the first direction. A source/drain region is disposed on the active fin. A contact plug is connected to the source/drain region and overlaps the active fin. A metal via is positioned at a first level above the substrate higher than an upper surface of the contact plug and spaced apart from the active fin. A metal line is positioned at a second level above the substrate, higher than the first level and connected to the metal via. A via connection layer extends from an upper portion of the contact plug and is connected to the metal via.

Abstract: A bonding apparatus includes: an anisotropic conductive film (“ACF”) attachment unit which attaches a first ACF and a second ACF onto a display panel assembly; a compression unit which compresses a first chip-on-film (“COF”) on the first ACF and compresses a second COF on the second ACF; and a buffer unit which rotates the display panel assembly, on which the first ACF and the second COF are compressed, on a plane.

Abstract: Semiconductor devices and methods of forming the semiconductor devices are provided. The methods may include forming a fin, forming a first device isolating layer on a side of the fin, forming a second device isolating layer extending through the first device isolating layer, forming first and second gates traversing the fin and forming a third device isolating layer between the first and second gates. The first device isolating layer may include a first material and a lowermost surface at a first depth. The second device isolating layer may include a second material and a lowermost surface at a second depth greater than the first depth. The third device isolating layer may extend into the fin, may include a lowermost surface at a third depth less than the first depth and a third material different from the first and the second materials.

Abstract: A semiconductor device includes active regions, a gate electrode, respective drain regions, respective source regions, a drain contact structure, a source contact structure, and a gate contact structure. The active regions extend linearly in parallel on a substrate. The gate electrode crosses the active regions. The drain regions are on and/or in the active regions on a first side of the gate electrode. The respective source regions are on and/or in the active regions on a second side of the gate electrode. The drain contact structure is on multiple drain regions. The source contact structure is on multiple source regions. The gate contact structure is on the gate electrode between the drain and source contact structures. The gate contact structure includes a gate plug and an upper gate plug directly on the gate plug. A center of the gate contact structure overlies only one of the active regions.

Abstract: An integrated circuit includes: a phase-shifted data signal generation circuit configured to generate a plurality of phase-shifted data signals from an input data signal based on at least one phase-shifted clock signal; a synchronization circuit configured to generate a plurality of synchronization data signals by applying the at least one phase-shifted clock signal to the plurality of phase-shifted data signals provided by the phase-shifted data signal generation circuit; and a control signal generation circuit configured to perform logic operations on the plurality of synchronization data signals to generate a phase control signal for controlling a phase of the at least one phase-shifted clock signal, and generate a frequency control signal for controlling a frequency of the at least one phase-shifted clock signal.

Abstract: The present invention relates to a method for preparing a catalyst and a method for preparing unsaturated carboxylic acid using the catalyst prepared according to the preparation method. According to the method for preparing a catalyst, unsaturated carboxylic acid can be provided from an unsaturated aldehyde with a high conversion rate and selectivity.

Abstract: The present invention relates to an inclusion compound of fumagillol derivative or its salt with hydroxypropyl-?-cyclodextrin or sulfobutylether-7-?-cyclodextrin, and pharmaceutical compositions comprising the same. The inclusion compound according to the present invention has superior water solubility and stability while exhibiting low toxicity, rendering it valuable as an anticancer agent or inhibitor of tumor metastasis.

Abstract: A semiconductor device includes a plurality of active regions spaced apart from each other and extending linearly in parallel on a substrate. A gate electrode crosses the plurality of active regions, and respective drain regions are on and/or in respective ones of the active regions on a first side of the gate electrode and respective source regions are on and/or in respective ones of the active regions on a second side of the gate electrode. A drain plug is disposed on the drain regions and a source plug is disposed on the source regions. A gate plug is disposed on the gate electrode between the drain plug and the source plug such that a straight line passing through a center of the drain plug and a center of the source plug intersects the gate plug.

Abstract: A broadcast signal receiving apparatus and a method of controlling thereof are disclosed, and more particularly, to a technology for detecting whether or not an antenna cable is connected to the broadcast signal receiving apparatus. The broadcast signal receiving apparatus includes an antenna connection terminal provide with a detection pin configured to generate a voltage drop by making contact with an antenna cable, and a controller configured to determine whether the antenna cable is connected to the antenna connection terminal by detecting the voltage drop of the detection pin.