Patents by Inventor Jong Tae Moon
Jong Tae Moon has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20230311250Abstract: Proposed are a copper sintering paste composition and a method of preparing the same. The copper sintering paste composition can replace conventional bonding material such as solder and lead-free solder and has excellent heat resistance, heat-generating properties, thermal conductivity, and bonding strength.Type: ApplicationFiled: March 31, 2023Publication date: October 5, 2023Applicant: Hojeonable Inc.Inventors: Jong Tae Moon, Kwang Mo Jung
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Publication number: 20230131422Abstract: Proposed is an epoxy flux film that is to be positioned between a semiconductor substrate and a device and is heated and pressed without addition of an additional flux. Thus, device-substrate soldering and sealing are simultaneously performed, and interference of light reflected from the solder can be reduced.Type: ApplicationFiled: October 21, 2022Publication date: April 27, 2023Applicant: Hojeonable Inc.Inventors: Jong Tae MOON, Kwang Mo JUNG
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Patent number: 9980393Abstract: A pattern-forming method for forming a conductive circuit pattern, the pattern-forming method including the steps of: preparing a pattern-forming composition composed of: Cu powder; solder particles for electrically coupling the Cu powder; a polymer resin; a deforming agent that is selected from among acrylate oligomer, polyglycols, glycerides, polypropylene glycol, dimethyl silicon, simethinecone, tributyl phosphare, and polymethylsiloxane, and that increases bonding force between the Cu powder and the solder particles; a curing agent; and a reductant; forming a circuit pattern by printing the pattern-forming composition on a substrate; heating the circuit pattern at a temperature effective to cure the pattern-forming composition and provide the conductive circuit pattern; and electrolytically plating a metal layer onto the conductive circuit pattern. A circuit pattern having superior conductivity is formed at low cost.Type: GrantFiled: May 5, 2015Date of Patent: May 22, 2018Assignee: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTEInventors: Yong Sung Eom, Kwang-Seong Choi, Hyun-cheol Bae, Jung Hyun Noh, Jong Tae Moon
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Patent number: 9462736Abstract: Provided are a composition for an anisotropic conductive adhesive, a method of forming a solder bump and a method of forming a flip chip using the same. The composition for an anisotropic conductive adhesive includes a low melting point solder particle and a thermo-curable polymer resin. The anisotropic conductive adhesive includes forming a mixture by mixing a polymer resin and a curing agent, and mixing a deforming agent, a catalyst or a reductant with the mixture.Type: GrantFiled: July 8, 2014Date of Patent: October 4, 2016Assignee: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTEInventors: Yong Sung Eom, Jong Tae Moon, Sangwon Oh, Keonsoo Jang
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Patent number: 9293689Abstract: A piezoelectric micro energy harvester and manufacturing method thereof, the method including: forming an insulation film on a substrate; patterning the insulation film and forming an electrode pad pattern, a center electrode pattern, and a side electrode pattern; forming an open cavity at an inside of the substrate for suspension of the center electrode pattern and the side electrode pattern; disposing a conductive film on the electrode pad pattern, the center electrode pattern, and the side electrode pattern and forming electrode pads, a center electrode, and a side electrode; and forming a piezoelectric film so as to cover a space between the center electrode and the side electrode and upper surfaces of the center electrode and the side electrode.Type: GrantFiled: October 29, 2013Date of Patent: March 22, 2016Assignee: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTEInventors: Chi Hoon Jun, Sang Choon Ko, Jong Tae Moon
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Patent number: 9155236Abstract: Provided are a composition for an anisotropic conductive adhesive, a method of forming a solder bump and a method of forming a flip chip using the same. The composition for an anisotropic conductive adhesive includes a low melting point solder particle and a thermo-curable polymer resin. The anisotropic conductive adhesive includes forming a mixture by mixing a polymer resin and a curing agent, and mixing a deforming agent, a catalyst or a reductant with the mixture.Type: GrantFiled: July 8, 2014Date of Patent: October 6, 2015Assignee: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTEInventors: Yong Sung Eom, Jong Tae Moon, Sangwon Oh, Keonsoo Jang
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Publication number: 20150237739Abstract: The present invention relates to a pattern-forming composition used to form a conductive circuit pattern. The pattern-forming composition comprises Cu powders, a solder for electrically coupling the Cu powders, a polymer resin, a curing agent and a reductant. According to the present invention, a circuit pattern having superior conductivity can be formed at low cost.Type: ApplicationFiled: May 5, 2015Publication date: August 20, 2015Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTEInventors: Yong Sung EOM, Kwang-Seong CHOI, Hyun-cheol BAE, Jung Hyun NOH, Jong Tae MOON
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Publication number: 20140317918Abstract: Provided are a composition for an anisotropic conductive adhesive, a method of forming a solder bump and a method of forming a flip chip using the same. The composition for an anisotropic conductive adhesive includes a low melting point solder particle and a thermo-curable polymer resin. The anisotropic conductive adhesive includes forming a mixture by mixing a polymer resin and a curing agent, and mixing a deforming agent, a catalyst or a reductant with the mixture.Type: ApplicationFiled: July 8, 2014Publication date: October 30, 2014Applicant: Electronics and Telecommunications Research InstituteInventors: Yong Sung EOM, Jong Tae MOON, Sangwon OH, Keonsoo JANG
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Publication number: 20140317915Abstract: Provided are a composition for an anisotropic conductive adhesive, a method of forming a solder bump and a method of forming a flip chip using the same. The composition for an anisotropic conductive adhesive includes a low melting point solder particle and a thermo-curable polymer resin. The anisotropic conductive adhesive includes forming a mixture by mixing a polymer resin and a curing agent, and mixing a deforming agent, a catalyst or a reductant with the mixture.Type: ApplicationFiled: July 8, 2014Publication date: October 30, 2014Applicant: Electronics and Telecommunications Research InstituteInventors: Yong Sung EOM, Jong Tae MOON, Sangwon OH, Keonsoo JANG
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Publication number: 20140318615Abstract: A conductive composition for a front electrode busbar of a silicon solar cell includes a metallic powder, a solder powder, a curable resin, a reducing agent, and a curing agent. A method of manufacturing a front electrode busbar of a silicon solar cell includes applying the composition to the front surface of the silicon solar cell wherein its front electrode finger line is formed. A substrate includes a front electrode busbar of a silicon solar cell, formed with a conductive composition. A silicon solar cell includes one or more electrodes containing a conductive composition including a conductive powder, a curable resin, a reducing agent, and a curing agent. A method of manufacturing the silicon solar cell includes forming a first electrode array with a first conductive composition, forming a second electrode, and forming a third electrode with a third conductive composition.Type: ApplicationFiled: July 7, 2014Publication date: October 30, 2014Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTEInventors: Soo Young OH, Yong Sung EOM, Jong Tae MOON, Kwang Seong CHOI
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Patent number: 8802760Abstract: Provided are a composition for an anisotropic conductive adhesive, a method of forming a solder bump and a method of forming a flip chip using the same. The composition for an anisotropic conductive adhesive includes a low melting point solder particle and a thermo-curable polymer resin. The anisotropic conductive adhesive includes forming a mixture by mixing a polymer resin and a curing agent, and mixing a deforming agent, a catalyst or a reductant with the mixture.Type: GrantFiled: March 15, 2013Date of Patent: August 12, 2014Assignee: Electronics and Telecommunications Research InstituteInventors: Yong Sung Eom, Jong Tae Moon, Sangwon Oh, Keonsoo Jang
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Patent number: 8723292Abstract: Disclosed is a silicon interposer that can reduce the entire area of a semiconductor package and increase the degree of integration by forming inductors at a lower part in addition to an upper part of a silicon substrate. The silicon interposer includes a silicon substrate, an upper inductor layer formed at the upper part of the silicon substrate and a lower inductor layer formed at the lower part of the silicon substrate.Type: GrantFiled: June 11, 2012Date of Patent: May 13, 2014Assignee: Electronics and Telecommunications Research InstituteInventors: Hyun-Cheol Bae, Kwang-Seong Choi, Jong Tae Moon, Jong-Moon Park
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Publication number: 20140054262Abstract: Disclosed is a piezoelectric micro energy harvester and manufacturing method thereof, the method including: forming an insulation film on a substrate; patterning the insulation film and forming an electrode pad pattern, a center electrode pattern, and a side electrode pattern; forming an open cavity at an inside of the substrate for suspension of the center electrode pattern and the side electrode pattern; disposing a conductive film on the electrode pad pattern, the center electrode pattern, and the side electrode pattern and forming electrode pads, a center electrode, and a side electrode; and forming a piezoelectric film so as to cover a space between the center electrode and the side electrode and upper surfaces of the center electrode and the side electrode.Type: ApplicationFiled: October 29, 2013Publication date: February 27, 2014Applicant: Electronics and Telecommunications Research InstituteInventors: Chi Hoon JUN, Sang Choon KO, Jong Tae MOON
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Patent number: 8598768Abstract: Disclosed is a piezoelectric micro energy harvester and manufacturing method thereof, the method including: forming an insulation film on a substrate; patterning the insulation film and forming an electrode pad pattern, a center electrode pattern, and a side electrode pattern; forming an open cavity at an inside of the substrate for suspension of the center electrode pattern and the side electrode pattern; disposing a conductive film on the electrode pad pattern, the center electrode pattern, and the side electrode pattern and forming electrode pads, a center electrode, and a side electrode; and forming a piezoelectric film so as to cover a space between the center electrode and the side electrode and upper surfaces of the center electrode and the side electrode.Type: GrantFiled: December 12, 2011Date of Patent: December 3, 2013Assignee: Electronics and Telecommunications Research InstituteInventors: Chi Hoon Jun, Sang Choon Ko, Jong Tae Moon
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Patent number: 8524571Abstract: Disclosed is a vacuum wafer level packaging method for a micro electro mechanical system device, including: forming a plurality of via holes on an upper wafer for protecting a micro electro mechanical system (MEMS) wafer; forming at least one metal layer on inner walls of the plurality of via holes and regions extended from the plurality of via holes; arranging and bonding the upper wafer and the MEMS wafer at atmospheric pressure; applying solder paste to the regions extended from the plurality of via holes; filling a solder in the plurality of via holes by increasing the temperature of a high-vacuum chamber to melt the solder paste; and changing the solder in the plurality of via holes to a solid state by lowering the temperature of the high-vacuum chamber.Type: GrantFiled: December 2, 2011Date of Patent: September 3, 2013Assignee: Electronics and Telecommunications Research InstituteInventors: Jong Tae Moon, Yong Sung Eom, Hyun-Cheol Bae
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Publication number: 20130146342Abstract: The present invention relates to a pattern-forming composition used to form a conductive circuit pattern. The pattern-forming composition comprises Cu powders, a solder for electrically coupling the Cu powders, a polymer resin, a curing agent and a reductant. According to the present invention, a circuit pattern having superior conductivity can be formed at low cost.Type: ApplicationFiled: September 12, 2012Publication date: June 13, 2013Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTEInventors: Yong Sung EOM, Kwang-Seong Choi, Hyun-cheol Bae, Jung Hyun Noh, Jong Tae Moon
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Patent number: 8420722Abstract: Provided are a composition for an anisotropic conductive adhesive, a method of forming a solder bump and a method of forming a flip chip using the same. The composition for an anisotropic conductive adhesive includes a low melting point solder particle and a thermo-curable polymer resin. The anisotropic conductive adhesive includes forming a mixture by mixing a polymer resin and a curing agent, and mixing a deforming agent, a catalyst or a reductant with the mixture.Type: GrantFiled: June 2, 2009Date of Patent: April 16, 2013Assignee: Electronics and Telecommunications Research InstituteInventors: Yong Sung Eom, Jong Tae Moon, Sangwon Oh, Keonsoo Jang
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Publication number: 20130087884Abstract: Disclosed is a silicon interposer that can reduce the entire area of a semiconductor package and increase the degree of integration by forming inductors at a lower part in addition to an upper part of a silicon substrate. The silicon interposer includes a silicon substrate, an upper inductor layer formed at the upper part of the silicon substrate and a lower inductor layer formed at the lower part of the silicon substrate.Type: ApplicationFiled: June 11, 2012Publication date: April 11, 2013Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTEInventors: Hyun-Cheol BAE, Kwang-Seong CHOI, Jong Tae Moon, Jong-Moon PARK
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Publication number: 20130074918Abstract: Disclosed are vacuum window glazing including a solar cell function and a manufacturing method thereof. The vacuum window glazing includes a first sheet glass, a second sheet glass that is vacuum-bonded to the first sheet glass; a vacuum layer that is formed between the first sheet glass and the second sheet glass; and a solar cell panel that is formed on a surface of the second sheet glass in a direction of the vacuum layer. By this configuration, power can be produced through the solar cell formed within the vacuum window glazing while more increasing the heat insulation effect of the vacuum window glazing, and the cooling and heating efficiency of the building can be greatly improved using the outer wall covered with glass.Type: ApplicationFiled: July 30, 2012Publication date: March 28, 2013Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTEInventors: Jin Woo Jeong, Yoon Ho Song, Sung Youl Choi, Je Ha Kim, Jong Tae Moon, Jung Wook Lim, Hun Kyun Pak
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Publication number: 20120288983Abstract: Disclosed is a method for manufacturing a dye sensitized solar cell module. The method includes putting at least one or more heating-wires on an upper portion of an electrode of each solar cell sub-module; applying a metal paste on the upper portion of the electrode including at least one or more heating-wires; and heating and curing the metal paste by after overlapping the electrodes of a plurality of solar cell sub-modules each other, allowing a current to flow to at least one or more heating-wires.Type: ApplicationFiled: April 30, 2012Publication date: November 15, 2012Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTEInventors: Moo Jung Chu, Ju Mi Kim, Yong Sung Eom, Ah Ram Jeon, Jong Tae Moon