Abstract: Disclosed herein is a secondary battery for medium-sized or large-sized battery modules. The secondary battery is assembled while an electrically connecting member used at the time of manufacturing a battery module is previously welded to at least one of electrode terminals of the secondary battery.

Abstract: Disclosed herein is a terminal-connecting device including an electrically insulating hollow connecting device body having an open upper end, and an electrically insulating cover coupled to the open upper end of the connecting device body. The terminal-connecting device is constructed such that a plate-shaped conductive bus bar is mounted to the lower end of the connecting device body, two or more terminal insertion holes are formed in the lower end of the connecting device body and the bus bar, the terminal insertion holes formed in the lower end of the connecting device body communicating with the terminal insertion holes formed in the bus bar, and a connecting member insertion slit is formed in one side of connecting device body for allowing further connection of the corresponding electrode terminal to an external connecting member, as occasion demands.

Abstract: Disclosed is a remote monitor and control system for draining floodgate of a seawall in that movie and audio signals of a draining floodgate are transmitted to a remote place through a communication network and each device can be remotely controlled in the remote place through two-way communications. The remote monitor and control system for draining floodgate of a seawall according to the present invention includes a spot control means, a control means, and a remote control means.

Abstract: Disclosed is a floodgate opening and closing system using a measurement of a motor revolution count, in that an opening and closing state of a floodgate formed at irrigation facilities for sewage, rainwater, agricultural water, freshwater and so on can be numerically transformed and the transformed data can be transmitted to a data collection apparatus such as a remote control system or transmission system and so forth through a communication network and so on, so that the opening and closing rate of the floodgate can be exactly perceived and controlled in a real-time on the remote place, whereby increasing the efficiency of water management.

Abstract: Disclosed herein is a secondary battery module constructed approximately in a rectangular parallelepiped structure. The battery module includes a pair of side members (right and left side members) having pluralities of grooves formed at the inside surfaces thereof such that the sides of unit cells are securely fitted in the grooves and at least one connection member integrally formed with the side members such that the side members are spaced apart from each other by the width of the unit cells while the grooves of the side members face each other. A medium- or large-sized battery system is manufactured using one or more secondary battery module. The secondary battery module allows a plurality of unit cells to be mounted in the battery module with high density. Consequently, the total size of the battery system can be considerably reduced, and the electrical connection between the electrodes is highly stable.

Abstract: Disclosed herein is a secondary battery for medium- or large-sized battery modules. The secondary battery is assembled while an electrically connecting member used at the time of manufacturing a battery module is previously welded to at least one of electrode terminals of the secondary battery.

Abstract: A battery cartridge includes a pair of outer frame members for receiving unit cells and an inner frame member disposed between the outer frame members. The unit cells are mounted between the outer and inner frame members. The inner frame member has a plurality of through-holes, which communicate with the outside while the unit cells are mounted between the outer and inner frame members. An opened type battery module includes such a battery cartridge. The battery cartridge and the battery module have a high structural integration and mechanical strength. Consequently, the present invention has the effect of minimizing the size of a battery system, stably mounting unit cells having low mechanical strength, and effectively removing heat from the unit cells.

Abstract: Disclosed herein is a housing member for a battery module, which is mounted to at least one side of the battery module such that a flow channel of refrigerant is defined in the battery module having unit cells stacked therein, wherein the housing member is provided with electrically connecting members for electrically connecting electrode terminals of the unit cells with each other and/or electrically connecting an external device to the electrode terminals, the electrically connecting members being integrally formed at the housing member. The housing member according to the present invention is manufactured in a structure in which the electrically connecting members are integrally formed at the housing member. Consequently, the manufacturing costs of the housing member are reduced. Furthermore, the assembly process of the battery module is greatly simplified, and the occurrence of short circuits caused by an engineer's mistake is effectively prevented.

Abstract: Disclosed herein is a terminal-connecting device including an electrically insulating hollow connecting device body having an open upper end, and an electrically insulating cover coupled to the open upper end of the connecting device body. The terminal-connecting device is constructed such that a plate-shaped conductive bus bar is mounted to the lower end of the connecting device body, two or more terminal insertion holes are formed in the lower end of the connecting device body and the bus bar, the terminal insertion holes formed in the lower end of the connecting device body communicating with the terminal insertion holes formed in the bus bar, and a connecting member insertion slit is formed in one side of connecting device body for allowing further connection of the corresponding electrode terminal to an external connecting member, as occasion demands.

Abstract: Disclosed herein is a member for mechanically and electrically connecting two or more objects, including an insulation body having a plurality of coupling holes for coupling the objects formed therein, a plate-shaped conductive strip mounted at the rear surface of the insulation body in the diagonal direction of the insulation body while the conductive strip is isolated from the front surface of the insulation body, the conductive strip having connection holes formed at opposite ends thereof such that the connection holes communicate with the insulation body, and a connecting bar constructed such that the connecting bar can be inserted into the corresponding connection hole of the conductive strip while the strip is connected to the objects. The connecting member accomplishes excellent mechanical connection and stable electrical connection of objects, easy assembly and disassembly, and low possibility of short circuits.

Abstract: Disclosed herein is a battery cartridge-connecting system for battery modules, comprising: bus bars, each of which includes a plate-shaped bar body, coupling parts, and electrical connection parts; a base plate, to which the bus bars are easily mounted; and a printed circuit board (PCB), which is easily coupled to the bus bars and is mounted to the base plate in a compact structure. The present invention also provides a battery module and a medium- or large-sized battery system including the battery cartridge-connecting system. According to the present invention, the battery cartridge-connecting system easily accomplishes the electrical connection and the mechanical coupling in the compact-structured battery module or battery system.

Abstract: Disclosed is a semiconductor memory device, comprising a plurality of sub-word line drivers arranged at all memory cell array blocks in the direction of bit lines and respectively shared by two memory cell array blocks, a plurality of block sense amplifiers arranged at all memory cell array blocks in the direction of word lines and respectively shared by two memory cell array blocks, a plurality of circuit blocks respectively arranged at conjunction areas where areas accommodating sub-word line drivers and block sense amplifiers are crossed; said conjunction areas comprising one or more LA drivers adapted to drive block sense amplifiers, one or more PXiD circuits adapted to generate driving control signals to control sub-word line drivers, and-one or more BSYD circuits adapted to selectively enables LA drivers in response to transmitted block control signals; and a plurality of block control units adapted to generate upper and lower block control signals by combining column and row block address decoding sign

Abstract: A refresh method for a semiconductor memory device capable of reducing memory cell access time and performing refresh operation is provided. In the refresh method for a semiconductor memory device, when refresh operation is requested, the low address for the refresh operation is latched, and it is determined whether a normal operation command is inputted into the semiconductor memory device. If the normal operation command is inputted into the device, block selection bits of a low address for normal operation is compared with block selection bits of the latched low address for the refresh operation. When block selection bits of both low addresses are the same, a word line for the refresh operation is activated by decoding the latched low address for the refresh operation. A word line for the normal operation is activated by simultaneously decoding the low address for the normal operation while the latched low address for refresh operation is decoded.

Abstract: A semiconductor memory device and method for its operation are disclosed. The memory device uses refresh-type memory cells, but operates within the same timing parameters as an SRAM. A refreshing operation and a successful read/write operation can both be performed in a read/write cycle, with zero write recovery time. But if the read/write cycle goes long, multiple refreshing operations can also be performed during the read/write cycle. Thus the device operates with no maximum write cycle time limitation. In the disclosed method, an external write command causes the device to store the write address and data to registers instead of to the memory cell array. When the external write command signals that data is present, zero write recovery time is needed, since the registers require no address setup time. Because the memory cell array is not involved in this transaction, refresh operations can proceed as needed during the external write command, no matter how long the external write takes to complete.

Abstract: A refresh method for a semiconductor memory device capable of reducing memory cell access time and performing refresh operation is provided. In the refresh method for a semiconductor memory device, when refresh operation is requested, the low address for the refresh operation is latched, and it is determined whether a normal operation command is inputted into the semiconductor memory device. If the normal operation command is inputted into the device, block selection bits of a low address for normal operation is compared with block selection bits of the latched low address for the refresh operation. When block selection bits of both low addresses are the same, a word line for the refresh operation is activated by decoding the latched low address for the refresh operation. A word line for the normal operation is activated by simultaneously decoding the low address for the normal operation while the latched low address for refresh operation is decoded.

Abstract: Disclosed is a semiconductor memory device, comprising a plurality of sub-word line drivers arranged at all memory cell array blocks in the direction of bit lines and respectively shared by two memory cell array blocks, a plurality of block sense amplifiers arranged at all memory cell array blocks in the direction of word lines and respectively shared by two memory cell array blocks, a plurality of circuit blocks respectively arranged at conjunction areas where areas accommodating sub-word line drivers and block sense amplifiers are crossed; said conjunction areas comprising one or more LA drivers adapted to drive block sense amplifiers, one or more PXiD circuits adapted to generate driving control signals to control sub-word line drivers, and one or more BSYD circuits adapted to selectively enables LA drivers in response to transmitted block control signals; and a plurality of block control units adapted to generate upper and lower block control signals by combining column and row block address decoding sign

Abstract: A recombinant baculovirus, which produces a recombinant polyhedra made up of a baculovirus polyhedrin (PH), a Bacillus thuringiensis crystal protein (CP) and jellyfish Aequorea victoria green fluorescent protein (GFP), is constructed by introducing a transfer vector carrying a fusion gene encoding a fusion protein in which the PH, the CP and the GFP are directly linked from N-terminal to C-terminal, in sequence, and a wild-type baculovirus into an insect cell, simultaneously, and culturing the cell. This baculovirus transfer vector pColorBtrus is constructed by synthesizing the GFP-coding DNA fragment from plasmid pGFP, the PH gene from wild-type Autographa californica Nucleopolyhedrovirus, and a Cry1Ac gene from plasmid pPN6.

Abstract: A semiconductor memory device and method for its operation are disclosed. The memory device uses refresh-type memory cells, but operates within the same timing parameters as an SRAM. A refreshing operation and a successful read/write operation can both be performed in a read/write cycle, with zero write recovery time. But if the read/write cycle goes long, multiple refreshing operations can also be performed during the read/write cycle. Thus the device operates with no maximum write cycle time limitation.

Abstract: A semiconductor memory device and method for its operation are disclosed. The memory device uses refresh-type memory cells, but operates within the same timing parameters as a SRAM. A refreshing operation and a successful read/write operation can both be performed in a read/write cycle, with zero write recovery time. But if the read/write cycle goes long, multiple refreshing operations can also be performed during the read/write cycle. Thus the device operates with no maximum write cycle time limitation. In the disclosed method, an external write command causes the device to store the write address and data to registers instead of to the memory cell array. When the external write command signals that data is present, zero write recovery time is needed, since the registers require no address setup time. Because the memory cell array is not involved in this transaction, refresh operations can proceed as needed during the external write command, no matter how long the external write takes to complete.