Abstract: An in-line package apparatus includes a first treating unit, an input storage unit, a heating unit and an output storage unit. The first treating unit performs a ball attach process or a chip mount process. A processing object that a process is completed in the first treating unit is received in a magazine so as to be vertically stacked and a plurality of magazines each having one or more processing objects is stored in an input stacker. The heating unit performs a reflow process on the processing objects in the magazine stored in the input stacker by an induction heating method. A processing object that a reflow process is completed is received in a magazine and then stored in an output stacker.

Abstract: A first semiconductor chip having a first projection electrode formed on an upper surface thereof is prepared. A second semiconductor chip having a second projection electrode is mounted on the first semiconductor chip to expose the first projection electrode. An insulating film is formed between the first projection electrode and the second projection electrode. A groove is formed in the insulating film. An interconnection configured to fill an inside of the groove and connected to the first projection electrode and the second projection electrode is formed.

Abstract: In one embodiment, a semiconductor package may include a semiconductor chip having a chip pad formed on a first surface thereof, a sealing member for sealing the semiconductor chip and exposing the first surface of the semiconductor chip, a conductive wiring overlying a part of the first surface of the semiconductor chip and directly contacting a part of an upper surface of the sealing member. The conductive wiring further contacts the pad. The semiconductor package may also include an encapsulant covering the conductive wiring and having openings for exposing parts of the conductive wiring.

Abstract: A first semiconductor chip having a first projection electrode formed on an upper surface thereof is prepared. A second semiconductor chip having a second projection electrode is mounted on the first semiconductor chip to expose the first projection electrode. An insulating film is formed between the first projection electrode and the second projection electrode. A groove is formed in the insulating film. An interconnection configured to fill an inside of the groove and connected to the first projection electrode and the second projection electrode is formed.

Abstract: In one embodiment, a semiconductor package may include a semiconductor chip having a chip pad formed on a first surface thereof, a sealing member for sealing the semiconductor chip and exposing the first surface of the semiconductor chip, a conductive wiring overlying a part of the first surface of the semiconductor chip and directly contacting a part of an upper surface of the sealing member. The conductive wiring further contacts the pad. The semiconductor package may also include an encapsulant covering the conductive wiring and having openings for exposing parts of the conductive wiring.

Abstract: In one embodiment, a semiconductor package may include a semiconductor chip having a chip pad formed on a first surface thereof, a sealing member for sealing the semiconductor chip and exposing the first surface of the semiconductor chip, a conductive wiring overlying a part of the first surface of the semiconductor chip and directly contacting a part of an upper surface of the sealing member. The conductive wiring further contacts the pad. The semiconductor package may also include an encapsulant covering the conductive wiring and having openings for exposing parts of the conductive wiring.

Abstract: The present invention relates to a composition for manufacturing a carboxylic group-containing polymer and a carboxylic group-containing polymer manufactured by using the same. More particularly, the present invention relates to a composition for manufacturing a carboxylic group-containing polymer comprising an allyl monomer having a long chain of a hydrophilic part containing alkylene oxide and a side chain of a hydrophobic part containing fatty acid ester as a dispersion promoter; a vinyl group-containing unsaturated carboxylic acid; a vinyl group-containing crosslinking agent; and a radical polymerization initiator, and a carboxylic group-containing polymer manufactured by using the same wherein the polymer can be dispersed in water without stirring, its dispersion solution has low viscosity, and its neutralized viscous solution obtained by alkali neutralization has high viscosity and transparency.

Abstract: A mounting substrate includes a substrate, a bonding pad and an induction heating pad. The bonding pad is formed on the substrate, and adhered to a solder ball to mount a semiconductor chip on the substrate. The induction heating pad is disposed adjacent to the bonding pad, the induction heating pad being induction heated by an applied alternating magnetic field to reflow the solder ball. The induction heating pad having a diameter greater than a skin depth in response to the frequency of the applied alternating magnetic field is selectively induction heated in response to a low frequency band of the alternating magnetic field. Accordingly, during a reflow process for a solder ball, the semiconductor chip may be mounted on the mounting substrate to complete a semiconductor package without damaging the mounting substrate, to thereby improve the reliability of the completed semiconductor package.

Abstract: In one embodiment, a semiconductor package may include a semiconductor chip having a chip pad formed on a first surface thereof, a sealing member for sealing the semiconductor chip and exposing the first surface of the semiconductor chip, a conductive wiring overlying a part of the first surface of the semiconductor chip and directly contacting a part of an upper surface of the sealing member. The conductive wiring further contacts the pad. The semiconductor package may also include an encapsulant covering the conductive wiring and having openings for exposing parts of the conductive wiring.

Abstract: Provided is a printed circuit board having a bump interconnection structure that improves reliability between interconnection layers. Also provided is a method of fabricating the printed circuit board and semiconductor package using the printed circuit board. According to one embodiment, the printed circuit board includes a plurality of bumps formed on a resin layer between a first interconnection layer and a second interconnection layer. The second interconnection layer includes insertion holes corresponding to upper portions of the bumps so that the upper portions of the bumps protrude from the second interconnection layer. The upper portion of at least one of the bumps includes a rivet portion having a diameter greater that the diameter of the corresponding insertion hole to reliably interconnect the first and second interconnection layers.

Abstract: A method of interconnecting semiconductor devices by using capillary motion, thereby simplifying fabricating operations, reducing fabricating costs, and simultaneously filling of through-silicon-vias (TSVs) and interconnecting semiconductor devices. The method includes preparing a first semiconductor device in which first TSVs are formed, positioning solder balls respectively on the first TSVs, performing a back-lap operation on the first semiconductor device, positioning a second semiconductor device, in which second TSVs are formed, above the first semiconductor device on which the solder balls are positioned, and performing a reflow operation such that the solder balls fill the first and second TSVs due to capillary motion.

Abstract: The present invention relates to a composition for manufacturing a carboxylic group-containing polymer and a carboxylic group-containing polymer manufactured by using the same. More particularly, the present invention relates to a composition for manufacturing a carboxylic group-containing polymer comprising an allyl monomer having a long chain of a hydrophilic part containing alkylene oxide and a side chain of a hydrophobic part containing fatty acid ester as a dispersion promoter; a vinyl group-containing unsaturated carboxylic acid; a vinyl group-containing crosslinking agent; and a radical polymerization initiator, and a carboxylic group-containing polymer manufactured by using the same wherein the polymer can be dispersed in water without stirring, its dispersion solution has low viscosity, and its neutralized viscous solution obtained by alkali neutralization has high viscosity and transparency.

Abstract: Provided are a semiconductor package and a method of fabricating the same. The semiconductor package includes a semiconductor chip, and a plurality of conductive balls, e.g., solder balls formed on a joint surface of the semiconductor chip. A dummy board includes openings aligned with the solder balls and is bonded to the joint surface of the semiconductor chip. An adhesive material is interposed between the semiconductor chip and the dummy board to adhere the dummy board to the semiconductor chip. The adhesive material is applied on an adhesion surface of the dummy board adhered to a joint surface of the semiconductor chip. The dummy board is adhered to the joint surface of the semiconductor chip such that the solder balls are aligned with the openings. Cheap underfill materials can be selectively used, and a process time for reflow and curing of the adhesive material can be greatly reduced.

Abstract: A mounting substrate includes a substrate, a bonding pad and an induction heating pad. The bonding pad is formed on the substrate, and adhered to a solder ball to mount a semiconductor chip on the substrate. The induction heating pad is disposed adjacent to the bonding pad, the induction heating pad being induction heated by an applied alternating magnetic field to reflow the solder ball. The induction heating pad having a diameter greater than a skin depth in response to the frequency of the applied alternating magnetic field is selectively induction heated in response to a low frequency band of the alternating magnetic field. Accordingly, during a reflow process for a solder ball, the semiconductor chip may be mounted on the mounting substrate to complete a semiconductor package without damaging the mounting substrate, to thereby improve the reliability of the completed semiconductor package.

Abstract: An in-line package apparatus includes a first treating unit, an input storage unit, a heating unit and an output storage unit. The first treating unit performs a ball attach process or a chip mount process. A processing object that a process is completed in the first treating unit is received in a magazine so as to be vertically stacked and a plurality of magazines each having one or more processing objects is stored in an input stacker. The heating unit performs a reflow process on the processing objects in the magazine stored in the input stacker by an induction heating method. A processing object that a reflow process is completed is received in a magazine and then stored in an output stacker.

Abstract: In certain embodiments, a lead frame includes a paddle, a plurality of inner leads, first outer leads, and a second outer lead. The plurality of inner leads can be arranged at a side face of the paddle. The first outer leads can extend from the inner leads along a first direction and can be arranged at a substantially central portion of the side face of the paddle. Furthermore, each of the first outer leads can have a first area. The second outer lead can be arranged at an edge portion of the side face of the paddle and can be supported by the paddle. The second outer lead can have a second area that is larger than the first area.

Abstract: Provided is a semiconductor package and method of manufacturing the same. The semiconductor package may include a semiconductor chip, an encapsulant encapsulating the semiconductor chip, a lead unit, and a partially encapsulated by the encapsulating thermal stress buffer which absorbs thermal stress of the semiconductor chip or the encapsulant.

Abstract: A stacked semiconductor package includes a first semiconductor package, a second semiconductor package and a conductive connection member. The first semiconductor package includes a first semiconductor chip, a first lead frame having first outer leads that are electrically connected to the first semiconductor chip, and a first molding member formed on the first semiconductor chip and the first lead frame to expose the first outer leads. The second semiconductor package includes a second semiconductor chip, a second lead frame formed on the first molding member and having second outer leads that may be electrically connected to the second semiconductor chip, and a second molding member formed on the second semiconductor chip and the second lead frame to expose the second outer leads. The conductive connection member may electrically connect the first outer leads and the second outer leads to each other. Further, the conductive connection member may have a crack-blocking groove.

Abstract: Provided are a semiconductor package having molded balls on a bottom surface of a PCB and a method of manufacturing the semiconductor package. The semiconductor package includes: a semiconductor chip mounting member comprising circuit patterns on a first surface, an insulating layer defining openings exposing at least portions of the circuit patterns, and external contact terminals arranged on the portions of circuit patterns exposed by the openings; a semiconductor chip formed on a second surface of the semiconductor chip mounting member and electrically connected to the semiconductor chip mounting member; a first sealing portion coating the second surface of the semiconductor chip mounting member and the semiconductor chip; and a second sealing portion arranged on the insulating layer and the external contact terminals such that at least portions of the external contact terminals are exposed.

Abstract: According to an example embodiment, a method of fabricating an electronic device may include preparing a substrate with a first area and a second area. A metal interconnection may be formed on the substrate extending from the first area to the second area. An insulating layer may be formed on the substrate. A sacrificial pattern electrically connected to the metal interconnection and serving as a sacrificial anode for cathodic protection against corrosion of the metal interconnection may be formed on the second area. An opening to expose the metal interconnection on the first area may be formed by patterning the insulating layer. An electronic device fabricated by a method according to an example embodiment may include a substrate, a metal interconnection, an insulating layer, and/or a sacrificial pattern.