Patents by Inventor Jong Seob Kim

Jong Seob Kim has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11956712
    Abstract: Electronic device includes first wireless communication interface; second wireless communication interface; and controller.
    Type: Grant
    Filed: January 10, 2022
    Date of Patent: April 9, 2024
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Yong-woo Lee, Chang-heon Yoon, Jong-min Kim, Sang-hun Park, Sung-min So, Wha-seob Sim, Se-young Oh
  • Publication number: 20240104115
    Abstract: Disclosed herein are a method and apparatus for converting a credential data schema.
    Type: Application
    Filed: July 11, 2023
    Publication date: March 28, 2024
    Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Seok-Hyun KIM, Soo-Hyung KIM, Young-Seob CHO, Geon-Woo KIM, Young-Sam KIM, Jong-Hyouk NOH, Kwan-Tae CHO, Sang-Rae CHO, Jin-Man CHO, Seung-Hun JIN
  • Publication number: 20240104990
    Abstract: Disclosed herein is a method for user-centered visitor access management, which may include issuing, by a management office server, a digital certificate to a householder terminal; registering, by a wall-pad, a householder in response to a request to register the householder based on the digital certificate; requesting, by the householder terminal, the management office server to register a visitor based on a visit request from a visitor terminal and delegating the digital certificate to the visitor terminal; making an entry request to a management terminal based on the digital certificate; verifying, by the wall-pad, the digital certificate based on a request for verification for entry from a wall-pad management terminal and providing a verification result to the wall-pad management terminal when the management terminal is the wall-pad management terminal; and managing and controlling, by the wall-pad, permission to use home devices based on delegated permission information of the digital certificate.
    Type: Application
    Filed: March 22, 2023
    Publication date: March 28, 2024
    Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Seok-Hyun KIM, Young-Seob CHO, Soo-Hyung KIM, Geon-Woo KIM, Young-Sam KIM, Jong-Hyouk NOH, Kwan-Tae CHO, Sang-Rae CHO, Jin-Man CHO, Seung-Hun JIN
  • Patent number: 11358882
    Abstract: A water ionizer includes a stacked electrolyzer and a flow switching device, with an inlet being separate from an outlet. Water entering an input regulator is distributed at a predetermined ratio before being supplied to an electrolyzer module to minimize acidic water to be discarded. Water supplied from the input regulator is directed to pass through the electrolyzer module in a crossing manner to delay flows of water to improve the efficiency of electrolysis. Electrolyzer cells are stacked on and fitted to each other to simplify an assembly process and improve convenience. Electrode plates of the electrolyzer module are fixedly fitted into a frame to facilitate an assembly process and improve a fabrication process. The input regulator and a flow switching output unit are connected via a connecting shaft to synchronize the operations thereof to obtain reliability.
    Type: Grant
    Filed: November 12, 2019
    Date of Patent: June 14, 2022
    Assignee: ALKAMEDI CO., LTD.
    Inventors: Ki Hwan Kim, Jong Seob Kim
  • Publication number: 20210061681
    Abstract: A water ionizer includes a stacked electrolyzer and a flow switching device, with an inlet being separate from an outlet. Water entering an input regulator is distributed at a predetermined ratio before being supplied to an electrolyzer module to minimize acidic water to be discarded. Water supplied from the input regulator is directed to pass through the electrolyzer module in a crossing manner to delay flows of water to improve the efficiency of electrolysis. Electrolyzer cells are stacked on and fitted to each other to simplify an assembly process and improve convenience. Electrode plates of the electrolyzer module are fixedly fitted into a frame to facilitate an assembly process and improve a fabrication process. The input regulator and a flow switching output unit are connected via a connecting shaft to synchronize the operations thereof to obtain reliability.
    Type: Application
    Filed: November 12, 2019
    Publication date: March 4, 2021
    Inventors: Ki Hwan KIM, Jong Seob KIM
  • Patent number: 9859410
    Abstract: A High electron mobility transistor (HEMT) includes a source electrode, a gate electrode, a drain electrode, a channel forming layer in which a two-dimensional electron gas (2DEG) channel is induced, and a channel supplying layer for inducing the 2DEG channel in the channel forming layer. The source electrode and the drain electrode are located on the channel supplying layer. A channel increase layer is between the channel supplying layer and the source and drain electrodes. A thickness of the channel supplying layer is less than about 15 nm.
    Type: Grant
    Filed: September 26, 2014
    Date of Patent: January 2, 2018
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: In-jun Hwang, Jai-kwang Shin, Jae-joon Oh, Jong-seob Kim, Hyuk-soon Choi, Ki-ha Hong
  • Patent number: 9660048
    Abstract: High electron mobility transistors (HEMT) exhibiting dual depletion and methods of manufacturing the same. The HEMT includes a source electrode, a gate electrode and a drain electrode disposed on a plurality of semiconductor layers having different polarities. A dual depletion region exists between the source electrode and the drain electrode. The plurality of semiconductor layers includes an upper material layer, an intermediate material layer and a lower material layer, and a polarity of the intermediate material layer is different from polarities of the upper material layer and the lower material layer.
    Type: Grant
    Filed: January 28, 2011
    Date of Patent: May 23, 2017
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: In-jun Hwang, Jong-seob Kim, Hyuk-soon Choi, Ki-ha Hong, Jai-kwang Shin, Jae-joon Oh
  • Patent number: 9608100
    Abstract: According to example embodiments, a high electron mobility transistor (HEMT) includes: stack including a buffer layer, a channel layer containing a two dimensional electron gas (2DEG) channel, and a channel supply layer sequentially stacked on each other, the stack defining a first hole and a second hole that are spaced apart from each other. A first electrode, a second electrode, and third electrode are spaced apart from each other along a first surface of the channel supply layer. A first pad is on the buffer layer and extends through the first hole of the stack to the first electrode. A second pad is on the buffer layer and extends through the second hole of the stack to the second electrode. A third pad is under the stack and electrically connected to the third electrode.
    Type: Grant
    Filed: December 14, 2012
    Date of Patent: March 28, 2017
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Hyuk-soon Choi, Jong-seob Kim, Jai-kwang Shin, Jae-joon Oh, Jong-bong Ha, In-jun Hwang
  • Patent number: 9570597
    Abstract: According to example embodiments, a high electron mobility transistor (HEMT) includes a channel supply layer that induces a two-dimensional electron gas (2DEG) in a channel layer, a source electrode and a drain electrode that are at sides of the channel supply layer, a depletion-forming layer that is on the channel supply layer and contacts the source electrode, a gate insulating layer on the depletion-forming layer, and a gate electrode on the gate insulating layer. The depletion-forming layer forms a depletion region in the 2DEG.
    Type: Grant
    Filed: January 2, 2013
    Date of Patent: February 14, 2017
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Woo-chul Jeon, Jong-seob Kim, Ki-yeol Park, Young-hwan Park, Jai-kwang Shin, Jae-joon Oh, Jong-bong Ha, Sun-kyu Hwang
  • Patent number: 9450071
    Abstract: Field effect semiconductor devices and methods of manufacturing the same are provided, the field effect semiconductor devices include a second semiconductor layer on a first surface of a first semiconductor layer, a first and a second third semiconductor layer respectively on two sides of the second semiconductor layer, a source and a drain respectively on the first and second third semiconductor layer, and a gate electrode on a second surface of the first semiconductor layer.
    Type: Grant
    Filed: September 13, 2010
    Date of Patent: September 20, 2016
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Ki-ha Hong, Jong-seob Kim, Jae-joon Oh, Jai-kwang Shin, Hyuk-soon Choi, In-jun Hwang, Ho-jung Kim
  • Patent number: 9443968
    Abstract: High electron mobility transistors (HEMTs) including lightly doped drain (LDD) regions and methods of manufacturing the same. A HEMT includes a source, a drain, a gate, a channel supplying layer for forming at least a 2-dimensional electron gas (2DEG) channel, and a channel formation layer in which at least the 2DEG channel is formed. The channel supplying layer includes a plurality of semiconductor layers having different polarizabilities. A portion of the channel supplying layer is recessed. One of the plurality of semiconductor layers, which is positioned below an uppermost layer is an etching buffer layer, as well as a channel supplying layer.
    Type: Grant
    Filed: April 28, 2011
    Date of Patent: September 13, 2016
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: In-jun Hwang, Jai-kwang Shin, Jae-joon Oh, Jong-seob Kim, Hyuk-soon Choi, Ki-ha Hong
  • Patent number: 9356592
    Abstract: According to example embodiments, a method of operating a power device includes applying a control voltage to a control electrode of the power device, where the control electrode is electrically separated from a source electrode, a drain electrode, and a gate electrode of the power device. The control voltage is separately applied to the control electrode. The method may include applying a negative control voltage to the control electrode prior to applying a gate voltage to the gate electrode.
    Type: Grant
    Filed: August 22, 2013
    Date of Patent: May 31, 2016
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: In-jun Hwang, Jong-seob Kim, Soo-Gine Chong
  • Patent number: 9299800
    Abstract: The methods may include forming a first material layer on a substrate, increasing electric resistance of the first material layer, and forming a source pattern and a drain pattern, which are spaced apart from each other, on the first material layer, a band gap of the source and drain patterns greater than a band gap of a first material layer.
    Type: Grant
    Filed: April 15, 2015
    Date of Patent: March 29, 2016
    Assignees: Samsun Electronics Co., Ltd., Kyungpook National University Industry-Academic Cooperation
    Inventors: Hyuk-soon Choi, Jung-hee Lee, Jai-kwang Shin, Jae-joon Oh, Jong-bong Ha, Jong-seob Kim, In-jun Hwang, Ki-ha Hong, Ki-sik Im, Ki-won Kim, Dong-seok Kim
  • Patent number: 9291899
    Abstract: A resist underlayer composition and a method of manufacturing a semiconductor integrated circuit device, the composition including a solvent and an organosilane polymer, the organosilane polymer being a condensation polymerization product of at least one first compound represented by Chemical Formulae 1 and 2 and at least one second compound represented by Chemical Formulae 3 to 5.
    Type: Grant
    Filed: December 30, 2009
    Date of Patent: March 22, 2016
    Assignee: CHEIL INDUSTRIES, INC.
    Inventors: Hyeon-Mo Cho, Sang-Kyun Kim, Chang-Soo Woo, Mi-Young Kim, Sang-Ran Koh, Hui-Chan Yun, Woo-Jin Lee, Jong-Seob Kim
  • Patent number: 9252255
    Abstract: Provided are a high electron mobility transistor (HEMT) and a method of manufacturing the HEMT. The HEMT includes: a channel layer comprising a first semiconductor material; a channel supply layer comprising a second semiconductor material and generating two-dimensional electron gas (2DEG) in the channel layer; a source electrode and a drain electrode separated from each other in the channel supply layer; at least one depletion forming unit that is formed on the channel supply layer and forms a depletion region in the 2DEG; at least one gate electrode that is formed on the at least one depletion forming unit; at least one bridge that connects the at least one depletion forming unit and the source electrode; and a contact portion that extends from the at least one bridge under the source electrode.
    Type: Grant
    Filed: November 20, 2013
    Date of Patent: February 2, 2016
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jong-seob Kim, In-jun Hwang, Jai-kwang Shin, Jae-joon Oh, Woo-chul Jeon, Hyuk-soon Choi, Sun-kyu Hwang
  • Patent number: 9245738
    Abstract: According to example embodiments, a high electron mobility transistor (HEMT) includes a channel layer; a channel supply layer on the channel layer; a source electrode and a drain electrode spaced apart from each other on one of the channel layer and the channel supply layer; a gate electrode on a part of the channel supply layer between the source electrode and the drain electrode; a first depletion-forming layer between the gate electrode and the channel supply layer; and a at least one second depletion-forming layer on the channel supply layer between the gate electrode and the drain electrode. The at least one second depletion-forming layer is electrically connected to the source electrode.
    Type: Grant
    Filed: November 27, 2013
    Date of Patent: January 26, 2016
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Woo-chul Jeon, Jong-seob Kim, Ki-yeol Park, Young-hwan Park, Jai-kwang Shin, Jae-joon Oh, Hyuk-soon Choi, In-jun Hwang
  • Patent number: 9245947
    Abstract: High electron mobility transistors (HEMTs) including a cavity below a drain and methods of manufacturing HEMTS including removing a portion of a substrate below a drain.
    Type: Grant
    Filed: June 27, 2012
    Date of Patent: January 26, 2016
    Assignee: Samsung Electronics Co., LTD.
    Inventors: In-jun Hwang, Ki-ha Hong, Jae-joon Oh, Jong-bong Ha, Jong-seob Kim, Hyuk-soon Choi, Jai-kwang Shin
  • Patent number: 9231093
    Abstract: A high electron mobility transistor (HEMT) according to example embodiments includes a channel layer, a channel supply layer on the channel layer, a source electrode and a drain electrode on at least one of the channel layer and the channel supply layer, a gate electrode between the source electrode and the drain electrode, and a Schottky electrode forming a Schottky contact with the channel supply layer. An upper surface of the channel supply layer may define a Schottky electrode accommodation unit. At least part of the Schottky electrode may be in the Schottky electrode accommodation unit. The Schottky electrode is electrically connected to the source electrode.
    Type: Grant
    Filed: March 14, 2013
    Date of Patent: January 5, 2016
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Woo-chul Jeon, Kyoung-yeon Kim, Jong-seob Kim, Joon-yong Kim, Ki-yeol Park, Young-hwan Park, Jai-kwang Shin, Jae-joon Oh, Hyuk-soon Choi, Jong-bong Ha, Sun-kyu Hwang, In-jun Hwang
  • Patent number: 9202904
    Abstract: According to example embodiments, a power device chip includes a plurality of unit power devices classified into a plurality of sectors, a first pad and a second pad. At least one of the first and second pads is divided into a number of pad parts equal to a number of the plurality of sectors. The first pad is connected to first electrodes of the plurality of unit power devices, and the second pad is connected to second electrodes of the plurality of unit power devices. The unit power devices may be diodes. The power device chip may further include third electrodes in the plurality of unit power devices, and a third pad may be connected to the third electrodes. In this case, the unit power devices may be high electron mobility transistors (HEMTs). Pad parts connected to defective sectors may be excluded from bonding.
    Type: Grant
    Filed: March 25, 2014
    Date of Patent: December 1, 2015
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: In-jun Hwang, Jong-seob Kim, Jae-joon Oh
  • Patent number: 9140986
    Abstract: A resist underlayer composition includes a solvent and an organosilane condensation polymerization product, the organosilane condensation polymerization product including about 40 to about 80 mol % of a structural unit represented by the following Chemical Formula 1,
    Type: Grant
    Filed: July 2, 2012
    Date of Patent: September 22, 2015
    Assignee: CHEIL INDUSTRIES, INC.
    Inventors: Mi-Young Kim, Sang-Kyun Kim, Hyeon-Mo Cho, Sang-Ran Koh, Hui-Chan Yun, Yong-Jin Chung, Jong-Seob Kim