Abstract: A fluid level measurement system using a buoyant body includes a guide part installed in a direction perpendicular to the bottom surface of a fluid storage tank, and provided with a space in which a fluid can move therein; a buoyant body inserted into the guide part, and configured to float along the surface of the fluid inside the guide part; and a measurement part coupled to the top end of the guide part, and configured to measure the level of the surface of the fluid inside the fluid storage tank by transmitting a signal toward the buoyant body in the inner space of the guide part and then receiving a signal reflected from the buoyant body.

Abstract: In the method of manufacturing a dual gate oxide layer of a semiconductor device, which has first and second active regions operating at mutually different voltages on a semiconductor substrate, the first and second active regions having a device isolation layer of STI (Shallow Trench Isolation) structure; the method of manufacturing the dual gate insulation layer includes, forming the device isolation layer so that an uppermost part thereof is positioned lower than an upper surface of the first and second active regions, before forming a gate insulation layer corresponding to each of the first and second active regions. Whereby, it is be effective till a portion of trench sidewall utilized as the active region, to increase a cell current of the active region and to prevent a stringer caused by a stepped coverage between the active region and a field region and a dent caused on a boundary face between the active region and the field region.

Abstract: In the method of manufacturing a dual gate oxide layer of a semiconductor device, which has first and second active regions operating at mutually different voltages on a semiconductor substrate, the first and second active regions having a device isolation layer of STI (Shallow Trench Isolation) structure; the method of manufacturing the dual gate insulation layer includes, forming the device isolation layer so that an uppermost part thereof is positioned lower than an upper surface of the first and second active regions, before forming a gate insulation layer corresponding to each of the first and second active regions. Whereby, it is be effective till a portion of trench sidewall utilized as the active region, to increase a cell current of the active region and to prevent a stringer caused by a stepped coverage between the active region and a field region and a dent caused on a boundary face between the active region and the field region.

Abstract: In a method of forming a contact in a semiconductor device, an insulating layer is formed on the semiconductor substrate. Then, a contact hole is formed by selectively etching the insulating layer. A barrier metal layer is deposited on side and bottom surfaces of the contact hole and on a top surface of the insulating layer to a uniform thickness. A wetting layer of an oxidation-resistive metal material is deposited on the barrier metal layer. A metal layer is formed on the wetting layer and fills the contact hole to thereby form a contact in the semiconductor device.

Abstract: In the method of manufacturing a dual gate oxide layer of a semiconductor device, which has first and second active regions operating at mutually different voltages on a semiconductor substrate, the first and second active regions having a device isolation layer of STI (Shallow Trench Isolation) structure; the method of manufacturing the dual gate insulation layer includes, forming the device isolation layer so that an uppermost part thereof is positioned lower than an upper surface of the first and second active regions, before forming a gate insulation layer corresponding to each of the first and second active regions. Whereby, it is be effective till a portion of trench sidewall utilized as the active region, to increase a cell current of the active region and to prevent a stringer caused by a stepped coverage between the active region and a field region and a dent caused on a boundary face between the active region and the field region.

Abstract: A method for forming a metal film including forming a metal barrier layer on a surface of a substrate, on a bottom surface of a recess and on sidewalls of the recess, forming a first metal film on the substrate but not in the recess, treating the first metal film with nitrogen plasma to form an insulation film including nitrogen, forming a second metal film on a portion of the metal barrier layer in the recess, and forming a third metal film on the substrate, the recess and the insulation film.

Abstract: A method for forming a metal film including forming a metal barrier layer on a surface of a substrate, on a bottom surface of a recess and on sidewalls of the recess, forming a first metal film on the substrate but not in the recess, treating the first metal film with nitrogen plasma to form an insulation film including nitrogen, forming a second metal film on a portion of the metal barrier layer in the recess, and forming a third metal film on the substrate, the recess and the insulation film.

Abstract: The present invention discloses a method of manufacturing a semiconductor device having an upper capacitor electrode and a node resistor, including depositing a thin film at a first deposition rate on an edge portion of a wafer and at a second deposition rate on a central portion of the wafer to form the upper capacitor electrode and the node resistor, thereby improving step coverage of the upper capacitor electrode while simultaneously improving resistance distribution of the node resistor.

Abstract: In a method of forming a contact in a semiconductor device, an insulating layer is formed on the semiconductor substrate. Then, a contact hole is formed by selectively etching the insulating layer. A barrier metal layer is deposited on side and bottom surfaces of the contact hole and on a top surface of the insulating layer to a uniform thickness. A wetting layer of an oxidation-resistive metal material is deposited on the barrier metal layer. A metal layer is formed on the wetting layer and fills the contact hole to thereby form a contact in the semiconductor device.

Abstract: A method for forming a metal film including forming a metal barrier layer on a surface of a substrate, on a bottom surface of a recess and on sidewalls of the recess, forming a first metal film on the substrate but not in the recess, treating the first metal film with nitrogen plasma to form an insulation film including nitrogen, forming a second metal film on a portion of the metal barrier layer in the recess, and forming a third metal film on the substrate, the recess and the insulation film.

Abstract: A method for treating a surface of a reaction chamber is provided. The reaction chamber is adapted for use in forming a first metal film on a substrate and has a second metal film on the surface of the reaction chamber. The second metal film is formed by a chemical vapor deposition process for forming the first metal film using a metal organic precursor having a selective deposition characteristic relative to a conductive material. The method includes converting the second metal film on the surface of the reaction chamber into an insulation film. The step of converting the second metal film into an insulation film may include oxidizing or nitrifying the second metal film.

Abstract: An aluminum wiring is selectively formed within a contact hole or groove of a substrate. An intermediate layer which includes nitrogen is formed over the main surface of a substrate and over the interior surface of the contact hole or groove. A first surface portion of the intermediate layer which is located over the main surface of the substrate is treated with a plasma to form a passivity layer at the first surface portion of the intermediate layer. Then, without an intervening vacuum break, an aluminum film is CAD deposited only over a second surface portion of the intermediate layer which is located over the interior surface of the contact hole or recess. The plasma treatment of the first surface portion of the intermediate layer prevents the CAD deposition of the aluminum film over the first surface portion of the intermediate layer.

Abstract: The present invention discloses a method of manufacturing a semiconductor device having an upper capacitor electrode and a node resistor, including depositing a thin film at a first deposition rate on an edge portion of a wafer and at a second deposition rate on a central portion of the wafer to form the upper capacitor electrode and the node resistor, thereby improving step coverage of the upper capacitor electrode while simultaneously improving resistance distribution of the node resistor.