Patents by Inventor Joo Lim

Joo Lim has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20090251111
    Abstract: A static compensator apparatus for a HVDC system may control harmonic wave compensation at high passive speed to meet operating characteristics of the HVDC system. A static compensator is turned-on in a normal mode and compensates for invalid power and removes a harmonic wave generated by the high voltage direct current system. A static compensator controller controls an operation of the static compensator. A diesel power generator operates complementarily to the static compensator and being turned-on when the high voltage direct current system starts.
    Type: Application
    Filed: April 7, 2008
    Publication date: October 8, 2009
    Inventors: Young Do CHOY, Chan Ki Kim, Young Hoon Kwan, Seong Joo Lim, Hyoung Bae Moon
  • Patent number: 7355910
    Abstract: A semiconductor memory device including a shift redundancy circuit with two buffer chains, two fuses connected to the shift redundancy circuit, a plurality of fuse cut-out detecting circuits for detecting cut-out status of the fuses, and two spare cell control circuits for controlling two spare memory cell rows, wherein word line control signals for controlling corresponding word lines connected to memory cells in a memory cell array are shifted upward and downward to control respective next word lines, thereby replacing two defective memory cell rows with the two spare memory cell rows.
    Type: Grant
    Filed: January 24, 2006
    Date of Patent: April 8, 2008
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Chan-Ho Lee, Jeung-Joo Lim, Eun-Kyoung Lim
  • Patent number: 7313212
    Abstract: The shift register, which is an n-th shift register of a shift register chain, includes a first multiplexer, a second multiplexer, and a latch block, wherein n is a positive integer. The first multiplexer selects one of output data of the (n?1)-th shift register or output data of the (n+1)-th shift register and outputs the selected data to be used as a reset signal in the latch block. The second multiplexer selects one of the output data of the (n?1)-th shift register or the output data of the (n+1)-th shift register and outputs the selected data to be used as input data of the latch block. The latch block stores the output data of the second multiplexer in response to the clock control signal, the inverted clock control signal and the reset voltage, and outputs the stored data.
    Type: Grant
    Filed: January 25, 2006
    Date of Patent: December 25, 2007
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Jeong-Joo Lim
  • Publication number: 20070205422
    Abstract: A thin film transistor substrate and a fabricating method thereof for simplifying a process are disclosed. In a liquid crystal display device according to the present invention, a gate line is provided on a substrate. A data line crosses the gate line with having a gate insulating film therebetween to define a pixel area. A thin film transistor includes a gate electrode connected to the gate line, a source electrode connected to the data line, a drain electrode opposed to the source electrode and a semiconductor layer for defining a channel between the source electrode and the drain electrode. A pixel electrode is connected to the drain electrode and is provided at said pixel area. Herein, said data line, said source electrode and said drain electrode have a double-layer structure in which a source/drain metal pattern and a transparent conductive pattern are built. Said pixel electrode is formed by an extension of the transparent conductive pattern of the drain electrode.
    Type: Application
    Filed: April 23, 2007
    Publication date: September 6, 2007
    Inventors: Byung Ahn, Joo Lim, Byung Park
  • Publication number: 20070198883
    Abstract: A scan read block has a relatively short latch circuit and an acceptable noise margin. The scan read block includes a bit cell array and a scan latch block. The bit cell array includes bit cells transmitting data through a corresponding bit line and inverted bit line. The data is transmitted in response to word line scan signals. The scan latch block includes scan latch circuits latching data stored in a corresponding bit cell through the bit lines and the inverted bit lines. In the scan latch block, the scan latch signal is enabled after the word line scan signals are enabled, and thereafter, data of the bit cell array is latched into a corresponding scan latch circuit during a time when the word line scan signals and the scan latch signal are both enabled.
    Type: Application
    Filed: February 13, 2007
    Publication date: August 23, 2007
    Inventor: Jeong-joo Lim
  • Patent number: 7163719
    Abstract: A method of depositing a thin film using a hafnium compound includes depositing a primary thin film and depositing a secondary thin film. The depositing of the primary thin film and the depositing of the secondary thin film are repeated once or more. The depositing of the primary thin film includes feeding a first reactive gas, purging the first reactive gas, feeding a third reactive gas, and purging the third reactive gas, and repeating the aforementioned steps a first plurality of (N) times. The feeding of the first reactive gas includes feeding a second reactive gas, purging the second reactive gas, feeding the third reactive gas, and purging the third reactive gas, and repeating the aforementioned steps a second plurality of (M) times.
    Type: Grant
    Filed: November 12, 2003
    Date of Patent: January 16, 2007
    Assignee: IPS, Ltd.
    Inventors: Young Hoon Park, Cheol Hyun Ahn, Sang Jin Lee, Byoung Cheol Cho, Sang Kwon Park, Hong Joo Lim, Sang Kyu Lee, Jang Ho Bae
  • Publication number: 20060171501
    Abstract: The shift register, which is an n-th shift register of a shift register chain, includes a first multiplexer, a second multiplexer, and a latch block, wherein n is a positive integer. The first multiplexer selects one of output data of the (n?1)-th shift register or output data of the (n+1)-th shift register and outputs the selected data to be used as a reset signal in the latch block. The second multiplexer selects one of the output data of the (n?1)-th shift register or the output data of the (n+1)-th shift register and outputs the selected data to be used as input data of the latch block. The latch block stores the output data of the second multiplexer in response to the clock control signal, the inverted clock control signal and the reset voltage, and outputs the stored data.
    Type: Application
    Filed: January 25, 2006
    Publication date: August 3, 2006
    Inventor: Jeong-Joo Lim
  • Publication number: 20060139504
    Abstract: A thin film transistor substrate for applying a horizontal electric field and a fabricating method thereof for simplifying a process are disclosed.
    Type: Application
    Filed: June 29, 2005
    Publication date: June 29, 2006
    Inventors: Byung Ahn, Joo Lim, Byung Park
  • Publication number: 20060138417
    Abstract: A thin film transistor substrate and a fabricating method thereof for simplifying a process are disclosed. In a liquid crystal display device according to the present invention, a gate line is provided on a substrate. A data line crosses the gate line with having a gate insulating film therebetween to define a pixel area. A thin film transistor includes a gate electrode connected to the gate line, a source electrode connected to the data line, a drain electrode opposed to the source electrode and a semiconductor layer for defining a channel between the source electrode and the drain electrode. A pixel electrode is connected to the drain electrode and is provided at said pixel area. Herein, said data line, said source electrode and said drain electrode have a double-layer structure in which a source/drain metal pattern and a transparent conductive pattern are built. Said pixel electrode is formed by an extension of the transparent conductive pattern of the drain electrode.
    Type: Application
    Filed: June 29, 2005
    Publication date: June 29, 2006
    Inventors: Byung Ahn, Joo Lim, Byung Park
  • Publication number: 20060139549
    Abstract: A method of fabricating a liquid crystal display device includes in a first mask process, forming a first mask pattern group including a gate line, a gate electrode connected to the gate line and a common line parallel to the gate line that have a first conductive layer group structure having at least double conductive layers. A second mask process forms a gate insulating film on the first mask pattern group and a semiconductor pattern thereon. A third mask process forms a third mask pattern group including a data line, a source electrode connected to the data line and a drain electrode opposite the source electrode that have a second conductive layer group structure having at least double conductive layers, and a protective film interfacing with the third mask pattern group on the gate insulating film.
    Type: Application
    Filed: December 20, 2005
    Publication date: June 29, 2006
    Inventors: Byung Ahn, Joo Lim, Byung Park
  • Publication number: 20060139556
    Abstract: This invention relates to a liquid crystal display panel, including: a first substrate having a common electrode; a second substrate including a pixel electrode that forms an electric field with the common electrode, a thin film transistor connected to the pixel electrode, a signal line that applies a signal to the thin film transistor, and a contact area in an area outside an area where the signal line is, and the contact area applies a common voltage to the common electrode; and a sealant formed between the first and second substrates with a conductive spacer that connects the contact area with the common electrode.
    Type: Application
    Filed: June 29, 2005
    Publication date: June 29, 2006
    Inventors: Byung Ahn, Joo Lim
  • Publication number: 20060139526
    Abstract: This invention relates to a liquid crystal display device that reduces a parasitic capacitance, and a fabricating method thereof.
    Type: Application
    Filed: December 23, 2005
    Publication date: June 29, 2006
    Inventors: Byung Ahn, Joo Lim
  • Publication number: 20060139517
    Abstract: A liquid crystal display device according to an embodiment of the present invention includes a black matrix on a first substrate to divide a pixel area having a reflection area and a transmission area; a color layer in the transmission area of the pixel area provided by the black matrix; and a non-color layer in the reflection area of the pixel area.
    Type: Application
    Filed: November 21, 2005
    Publication date: June 29, 2006
    Inventors: Byung Ahn, Joo Lim
  • Publication number: 20060139525
    Abstract: This invention relates to a transflective thin film transistor substrate and a fabricating method thereof that is adaptive for simplifying process, and a liquid crystal display device using the same and a fabricating method thereof. A liquid crystal display device according to an embodiment of the present invention includes a gate line and a data line crossing each other with a gate insulating film to define a pixel area on a first substrate; a thin film transistor connected to the gate line and the data line; a pixel electrode in the pixel area connected to the thin film transistor and to be exposed through a transmission area; a reflection electrode formed in a reflection area having separated areas with the transmission area in between; and an organic insulating film formed under the reflection electrode and formed in a first horizontal area including the reflection area.
    Type: Application
    Filed: December 23, 2005
    Publication date: June 29, 2006
    Inventors: Byung Ahn, Joo Lim
  • Publication number: 20060138428
    Abstract: A liquid crystal display device, including: a gate line on a substrate; a data line crossing the gate line with a gate insulating film therebetween to define a pixel area; a thin film transistor connected to the gate line and the data line; a semiconductor pattern which forms a channel of the thin film transistor and overlaps along the data line; a passivation film covering the data line and the thin film transistor; and a pixel electrode on the gate insulating film in a pixel hole of the pixel area that penetrates the passivation film and connected to the thin film transistor, the pixel electrode on an inclined side surface of the passivation film to encompass the pixel hole, to form a border with the passivation film and having a thickness that decreases as it goes up the side surface of the passivation film.
    Type: Application
    Filed: December 2, 2005
    Publication date: June 29, 2006
    Inventors: Byung Ahn, Joo Lim, Ji Lee, Hee Kwack
  • Publication number: 20060139547
    Abstract: A liquid crystal display device having a simplified manufacturing process is disclosed. The liquid crystal display device includes a gate line and a common line having a first conductive layer group having at least double conductive layers. A common electrode is formed by an extension of at least one transparent conductive layer of a common line. A portion of the common electrode is formed of one conductive layer of the first conductive layer group, while a remaining portion of the common electrode is formed of the first conductive layer group. The gate line, a source electrode and a drain electrode have a second conductive layer group having at least double conductive layers, and the pixel electrode is formed by an extension of at least one transparent conductive layer of the drain electrode.
    Type: Application
    Filed: December 20, 2005
    Publication date: June 29, 2006
    Inventors: Byung Ahn, Joo Lim, Byung Park
  • Publication number: 20060120186
    Abstract: A semiconductor memory device including a shift redundancy circuit with two buffer chains, two fuses connected to the shift redundancy circuit, a plurality of fuse cut-out detecting circuits for detecting cut-out status of the fuses, and two spare cell control circuits for controlling two spare memory cell rows, wherein word line control signals for controlling corresponding word lines connected to memory cells in a memory cell array are shifted upward and downward to control respective next word lines, thereby replacing two defective memory cell rows with the two spare memory cell rows.
    Type: Application
    Filed: January 24, 2006
    Publication date: June 8, 2006
    Inventors: Chan-Ho Lee, Jeung-Joo Lim, Eun-Kyoung Lim
  • Publication number: 20060119772
    Abstract: The present invention relates to a transflective thin film transistor substrate and method of fabricating the same. A liquid crystal display device according to the present invention includes: a gate line crossing a data line with a gate insulating film there between to define a pixel area; a thin film transistor connected to the gate line and the data line; an organic film on the gate line, the data line and the thin film transistor, having a transmission hole passing through the gate insulating film in the pixel area; a pixel electrode on the organic film via the transmission hole and connected to the thin film transistor; and a reflective electrode having an edge part different from an edge part of the pixel electrode on the pixel electrode and exposing the pixel electrode of the transmission hole.
    Type: Application
    Filed: June 30, 2005
    Publication date: June 8, 2006
    Inventors: Joo Lim, Woong Kim
  • Publication number: 20060119771
    Abstract: The present invention relates to a transflective thin film transistor substrate and method of fabricating the same that is adaptive for simplifying its process. The liquid crystal display device includes: first and second substrates; a gate line on the first substrate; a gate insulating film on the first substrate; a data line crossing the gate line to define a pixel area; a thin film transistor connected to the gate line and the data line; an organic insulating film on the gate line, the data line and the thin film transistor, and having a transmission hole in the pixel area; a pixel electrode on the organic insulating film of the pixel area via the transmission hole and connected to the thin film transistor; and a reflective electrode on the pixel electrode having a same edge part as the pixel electrode or an edge part located at inner side from an edge part of the pixel electrode and exposing the pixel electrode of the transmission hole.
    Type: Application
    Filed: June 29, 2005
    Publication date: June 8, 2006
    Inventors: Joo Lim, Woong Kim
  • Patent number: 7031179
    Abstract: The present invention relates to bit cell arrays of read-only-memories, and more specifically, to a bit cell array capable of preventing a coupling effect between adjacent bit lines. In addition, the bit cell array according to the present invention does not require an additional device in order to prevent the coupling effect. In accordance with the present invention, the bit cell array comprising: a plurality of bit lines arranged in a row in a first direction; a plurality of ground lines in a row in a second direction vertical to the first direction; a plurality of word lines arranged with a zigzag line with respect to the second direction; and a plurality of ROM bit cells partially formed at a cross-section point of the bit lines and the word lines. In the meanwhile, the ROM bit cells are arranged with a zigzag line with respect to adjacent bit lines. Additionally, the ROM bit cells comprise a drain terminal, a gate terminal and a source terminal.
    Type: Grant
    Filed: October 4, 2004
    Date of Patent: April 18, 2006
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sang-Hoon Yon, Jeung-Joo Lim