Abstract: Methods, apparatuses, and systems related to operations for controlling direct refresh management (DRFM) operations. A memory may process a DRFM sample command using bank logic located downstream from a command decoder. The bank logic may be configured to process the DRFM sample command according to an operating state of a targeted memory bank.

Abstract: Methods, apparatuses, and systems related to operations for controlling direct refresh management (DRFM) operations. A memory may process a DRFM sample command using bank logic located downstream from a command decoder. The bank logic may be configured to process the DRFM sample command according to an operating state of a targeted memory bank.

Abstract: Memory devices, systems, and associated methods with per die temperature-compensated refresh control, and associated methods, are disclosed herein. In one embodiment, a memory device includes a plurality of memory cells and a sensor configured to measure a temperature of the memory device. The memory device determines a frequency at which it is receiving refresh commands. The memory device is further configured to skip refresh operations of the memory cells based, at least in part, on the determination and on the temperature of the memory device.

Abstract: Methods, systems, and devices for adjusting a refresh rate during a self-refresh state are described. A memory system may enter a self-refresh state and execute a first set of refresh operations on a set of rows of memory cells at the memory system according to a first rate. The memory system may determine, based on executing the first set of refresh operations, that a counter associated with the set of refresh operations satisfies a threshold for a second time while the memory system is in the self-refresh state. In response to the counter satisfying the threshold for the second time, a flip-flop circuit at the memory system may modify an output of the flip-flop circuit and the memory system may decrease the rate for executing the refresh operations to a second rate based on the modified output of the flip-flop circuit.

Abstract: The present disclosure relates to systems and methods for predicting response to cancer therapy, genes useful for predicting the sensitivity of a cancer to an anti-cancer therapy, and methods of treating such cancer.

Abstract: Methods of operating a memory device are disclosed. A method may include determining an amount of activity associated with at least one memory bank of a memory device. The method may further include adjusting a row hammer refresh rate for the at least one memory bank based on the amount of activity associated with the at least one memory bank. Memory devices and systems are also described.

Abstract: Apparatuses, systems, and methods for direct refresh management (DRFM) commands. A controller provides a DRFM command to a memory along with a row address. A command decoder of the memory provides an activate command and then a pre-charge command along a signal line to a bank. During a tRP time after the pre-charge command before a next activate command, a DRFM sampling command is provided along the signal line which causes the address to be latched in a DRFM latch. Responsive to a later DRFM service command, one or more wordlines based on the address in the DRFM latch are refreshed.

Abstract: Memory devices, systems, and associated methods with per die temperature-compensated refresh control, and associated methods, are disclosed herein. In one embodiment, a memory device includes a plurality of memory cells and a sensor configured to measure a temperature of the memory device. The memory device determines a frequency at which it is receiving refresh commands. The memory device is further configured to skip refresh operations of the memory cells based, at least in part, on the determination and on the temperature of the memory device.

Abstract: Apparatuses, systems, and methods for direct refresh management (DRFM) commands. A controller provides a DRFM command to a memory along with a row address. A command decoder of the memory provides an activate command and then a pre-charge command along a signal line to a bank. During a tRP time after the pre-charge command before a next activate command, a DRFM sampling command is provided along the signal line which causes the address to be latched in a DRFM latch. Responsive to a later DRFM service command, one or more wordlines based on the address in the DRFM latch are refreshed.

Abstract: Methods of operating a memory device are disclosed. A method may include determining an amount of activity associated with at least one memory bank of a memory device. The method may further include adjusting a row hammer refresh rate for the at least one memory bank based on the amount of activity associated with the at least one memory bank. Memory devices and systems are also described.

Abstract: Embodiments of the disclosure are drawn to apparatuses and methods for staggering the timing of skipped refresh operations on a memory. Memory cells of memories may need to periodically perform refresh operations. In some instances, auto-refresh operations may be periodically skipped when charge retention characteristics of the memory cells of the memory exceed the auto-refresh frequency. To reduce peak current draw during refresh operations, the skipped refresh operations may be staggered across different portions of the memory. In one example, the skipped refresh operation may be staggered in time among memory dies of the memory to limit a number of memory dies that are performing an auto-refresh operation to a maximum number. In another example, the skipped refresh operation may be staggered in time among memory banks of a single memory array to limit a number of memory banks that are performing an auto-refresh operation to a maximum number.

Abstract: Provided herein are methods of identifying gene expression levels in specific cell types based on bulk gene expression levels measured in tissue samples comprising a plurality of cell types.

Abstract: Methods of operating a memory device are disclosed. A method may include determining an amount of activity associated with at least one memory bank of a memory device. The method may further include adjusting a row hammer refresh rate for the at least one memory bank based on the amount of activity associated with the at least one memory bank. Memory devices and systems are also described.

Abstract: A memory device includes at least one memory bank comprising a set of redundant word lines, a set of normal word lines, and row hammer refresh logic. The RHR logic comprises a first input to receive a first signal indicative of whether a match was generated at a fuse of the memory device, a second input to receive a redundant row address corresponding to a first location of a memory array of the memory device, a third input to receive a word line address corresponding to a second location of the memory array of the memory device. The RHR logic also comprises an output to transmit at least one first memory address adjacent to the first location or at least one second memory address adjacent to the second location based on a value of the first signal.

Abstract: A memory device includes a memory bank having a set of word lines, a bank control block coupled to the memory bank, wherein the bank control block when in operation provides timing control and data control to facilitate execution of commands to and from the memory bank and a command decoder coupled to the bank control block. The command decoder when in operation transmits to the bank control block a refresh (REF) command associated with a first pump to refresh a memory cell of the memory bank and a row hammer refresh (RHR) command associated with a second pump to refresh a second memory cell of the memory bank in conjunction with a refresh operation, and the bank control block when in operation transmits a first control signal to the command decoder to determine which automatic error check and scrub (AECS) mode operation is selected.

Abstract: Methods of operating a memory device are disclosed. A method may include determining an amount of activity associated with at least one memory bank of a memory device. The method may further include adjusting a row hammer refresh rate for the at least one memory bank based on the amount of activity associated with the at least one memory bank. Memory devices and systems are also described.

Abstract: Memory devices, systems, and associated methods with per die temperature-compensated refresh control, and associated methods, are disclosed herein. In one embodiment, a memory device includes a plurality of memory cells and a sensor configured to measure a temperature of the memory device. The memory device determines a frequency at which it is receiving refresh commands. The memory device is further configured to skip refresh operations of the memory cells based, at least in part, on the determination and on the temperature of the memory device.

Abstract: A memory device includes at least one memory bank comprising a set of redundant word lines, a set of normal word lines, and row hammer refresh logic. The RHR logic comprises a first input to receive a first signal indicative of whether a match was generated at a fuse of the memory device, a second input to receive a redundant row address corresponding to a first location of a memory array of the memory device, a third input to receive a word line address corresponding to a second location of the memory array of the memory device. The RHR logic also comprises an output to transmit at least one first memory address adjacent to the first location or at least one second memory address adjacent to the second location based on a value of the first signal.

Abstract: A memory device includes a memory bank having a set of word lines, a bank control block coupled to the memory bank, wherein the bank control block when in operation provides timing control and data control to facilitate execution of commands to and from the memory bank and a command decoder coupled to the bank control block. The command decoder when in operation transmits to the bank control bank a refresh (REF) command associated with a first pump to refresh a memory cell of the memory bank and a row hammer refresh (RHR) command associated with a second pump to refresh a second memory cell of the memory bank in conjunction with a refresh operation, and the bank control block when in operation transmits a first control signal to the command decoder to determine which automatic error check and scrub (AECS) mode operation is selected.

Abstract: Memory devices, systems, and associated methods with per die temperature-compensated refresh control, and associated methods, are disclosed herein. In one embodiment, a memory device includes a plurality of memory cells and a sensor configured to measure a temperature of the memory device. The memory device determines a frequency at which it is receiving refresh commands. The memory device is further configured to skip refresh operations of the memory cells based, at least in part, on the determination and on the temperature of the memory device.