Abstract: An atomic layer deposition apparatus and a method of operating the same are provided. The atomic layer deposition apparatus is used to deposit an atomic layer by repeatedly supplying and purging a process gas, and includes a chamber used for depositing an atomic layer, a gas injection hole through which the process gas is supplied to the chamber, a first outlet through which particles or remnants are removed from the chamber when supplying the process gas, and a second outlet through which exhaust gas is discharged from the chamber when purging the process gas.

Abstract: A method for manufacturing a semiconductor device including a metal contact and a capacitor. Gate structures are formed on a semiconductor substrate, and a first dielectric layer is formed on the semiconductor substrate to cover the gate structures. A bit line is formed on the first dielectric layer and a second dielectric layer is formed on the first dielectric layer to cover the bit line. A buried contact is formed to be electrically connected to the semiconductor substrate between the gate structures by etching the second dielectric and first dielectric layer. A third dielectric layer is formed on the second dielectric layer. A lower electrode of a capacitor, a dielectric layer, and an upper electrode are formed to be connected to the buried contact. A fourth dielectric layer is formed to cover the capacitor.

Abstract: A semiconductor device includes a first electrode formed of a silicon-family material, a dielectric layer formed by sequentially supplying reactants on the first electrode, and a second electrode having a work function larger than that of the first electrode, with the second electrode being formed on the dielectric layer. The first electrode and the second electrode can be a lower electrode and an upper electrode, respectively, in a capacitor structure. Also, the first electrode and the second electrode can be a silicon substrate and a gate electrode, respectively, in a transistor structure. A stabilizing layer, which is, for example, a silicon oxide layer, a silicon nitride layer, or a composite layer of the silicon oxide layer and the silicon nitride layer, for facilitating the formation of the dielectric layer by hydrophilizing the surface of the first electrode, may be formed on the first electrode. The dielectric layer can be formed by an atomic layer deposition method.

Abstract: A method for manufacturing a semiconductor device employing a dielectric layer for forming a conductive layer into a three-dimensional shape. The dielectric layer is formed on a substrate in such a manner as to provide an intrinsic etch rate within the layer which increases in the direction of the thickness or depth of the dielectric layer. This variable intrinsic etch rate within the dielectric layer is achieved by changing one of a plurality of deposition variables. Once formed, the dielectric layer is selectively etched to form a through hole to contact a conductive area underlying the dielectric layer. A conductive layer is formed in the through hole, which may be a storage node of a capacitor.

Abstract: A method for manufacturing a semiconductor device including a metal contact and a capacitor. Gate structures are formed on a semiconductor substrate, and a first dielectric layer is formed on the semiconductor substrate to cover the gate structures. A bit line is formed on the first dielectric layer and a second dielectric layer is formed on the first dielectric layer to cover the bit line. A buried contact is formed to be electrically connected to the semiconductor substrate between the gate structures by etching the second dielectric and first dielectric layer. A third dielectric layer is formed on the second dielectric layer. A lower electrode of a capacitor, a dielectric layer, and an upper electrode are formed to be connected to the buried contact. A fourth dielectric layer is formed to cover the capacitor.

Abstract: A lower electrode of a capacitor of a semiconductor device according to the present invention is formed of a double film of a material film including a metal and a silicon film. The material film is formed of one selected from the group consisting of a metal film formed of one among Ti, W, Co, Al, Pt, Ru, and Ir, a silicide film of the above metals, an Ir oxide film, and an Ru oxide film. The silicon film may be formed of a hemispherical grain film (HSG—Si film). The lower electrode may be formed to be cylindrical. In the present invention, it is possible to increase Cmin/Cmax value since a material film including a metal is used as the lower electrode, thus reducing the charge depletion.