Abstract: An electroluminescent display device includes a display panel including a plurality of pixels each including a light-emitting element driven according to a driving current flowing between a high-level power supply voltage and a low-level power supply voltage, and an EVDD adjustment circuit configured to cut off the high-level power supply voltage for a black period in which emission of light from the light-emitting element stops in one frame such that the high-level power supply voltage is not applied to the pixels.

Abstract: An electroluminescent display device includes a display panel including a plurality of pixels each including a light-emitting element driven according to a driving current flowing between a high-level power supply voltage and a low-level power supply voltage, and an EVDD adjustment circuit configured to cut off the high-level power supply voltage for a black period in which emission of light from the light-emitting element stops in one frame such that the high-level power supply voltage is not applied to the pixels.

Abstract: An electronic device includes a processor configured to control a system, a main memory including a first region configured to store normal data according to a normal operation and a second region configured to store monitoring data, a first cache configured to be activated in response to a monitoring enable signal of the processor and to access the second region, and a second cache configured to load the normal data according to the normal operation of the processor.

Abstract: A display device includes: a display panel having a plurality of sub-pixels sharing a single reference voltage line, each of the sub-pixels comprising a switching transistor, a driving transistor, a sensing transistor, a storage capacitor, and a light-emitting element; a data driver configured to supply a data voltage to the plurality of sub-pixels; a gate driver configured to supply a gate signal to the plurality of sub-pixels; a timing controller configured to control the data driver and the gate driver; and a detector configured to sense a threshold voltage and mobility of the driving transistor to detect if there is a short-circuit between a gate electrode and an output terminal of the driving transistor.

Abstract: A display device includes a display panel having a plurality of gate lines, a plurality of data lines, and a plurality of subpixels; a gate driver circuit driving the plurality of gate lines; a data driver circuit driving the plurality of data lines; and a timing controller controlling signals applied to the gate driver circuit and the data driver circuit, wherein the timing controller controls the data driver circuit for a black data to be applied to at least one of designated subpixels among the plurality of subpixels, and controls the gate driver circuit for a gate signal, which is a signal for sensing a characteristic of a driving transistor of the designated subpixel, to be applied in an interval between times at which the black data are applied, such that the gate signal does not overlap the black data.

Abstract: Proposed are a directional airflow device and an air cleaner with the same. The directional airflow device includes: a cylindrical fan accommodating portion (140) including a fan assembly (150) that is configured to generate a flow of air; and a cylindrical guide accommodating portion (160) integrally formed on the fan accommodating portion (140), and including an airflow forming member (170) that is configured to discharge air suctioned by the fan assembly and guided to an airflow forming space, through a discharge port, wherein the airflow forming member is configured such that at least two helical bodies having different pitches are arranged in the airflow forming space along a circumferential direction of the guide accommodating portion, so that a part of the helical bodies forms a directional airflow having straightness, and a remaining part discharges air radially.

Abstract: A display device and a method of driving the same. Characteristics of driving transistors disposed in subpixels of a display panel are sensed and compensated for, thereby improving the image quality of the organic light-emitting display device. Changes in a data voltage between a point in time at which a blank period starts and a period in which the sensing of the driving transistors starts are reduced or minimized, thereby reducing deviations in the sensing of the characteristics of the driving transistors.

Abstract: A display device includes: a display panel having a plurality of sub-pixels sharing a single reference voltage line, each of the sub-pixels comprising a switching transistor, a driving transistor, a sensing transistor, a storage capacitor, and a light-emitting element; a data driver configured to supply a data voltage to the plurality of sub-pixels; a gate driver configured to supply a gate signal to the plurality of sub-pixels; a timing controller configured to control the data driver and the gate driver; and a detector configured to sense a threshold voltage and mobility of the driving transistor to detect if there is a short-circuit between a gate electrode and an output terminal of the driving transistor.

Abstract: In a display device, an edge portion of a pixel electrode is modified. A valley is provided in an overcoat layer located below the pixel electrode. The edge portion of the pixel electrode is configured to be curved or bent onto the overcoat layer. As a result, the aperture ratio of the display device can be increased, and an image abnormality in the edge portion of the pixel electrode can be prevented.

Abstract: A display device and a method of driving the same. Characteristics of driving transistors disposed in subpixels of a display panel are sensed and compensated for, thereby improving the image quality of the organic light-emitting display device. Changes in a data voltage between a point in time at which a blank period starts and a period in which the sensing of the driving transistors starts are reduced or minimized, thereby reducing deviations in the sensing of the characteristics of the driving transistors.

Abstract: A display device includes a display panel having a plurality of gate lines, a plurality of data lines, and a plurality of subpixels; a gate driver circuit driving the plurality of gate lines; a data driver circuit driving the plurality of data lines; and a timing controller controlling signals applied to the gate driver circuit and the data driver circuit, wherein the timing controller controls the data driver circuit for a black data to be applied to at least one of designated subpixels among the plurality of subpixels, and controls the gate driver circuit for a gate signal, which is a signal for sensing a characteristic of a driving transistor of the designated subpixel, to be applied in an interval between times at which the black data are applied, such that the gate signal does not overlap the black data.

Abstract: In a display device, an edge portion of a pixel electrode is modified. A valley is provided in an overcoat layer located below the pixel electrode. The edge portion of the pixel electrode is configured to be curved or bent onto the overcoat layer. As a result, the aperture ratio of the display device can be increased, and an image abnormality in the edge portion of the pixel electrode can be prevented.

Abstract: A display device can include a display panel, in which a subpixel including a transistor where data lines and gate lines intersect, is disposed; a gate driving unit that sequentially outputs a gate signal to the gate lines; a data driving unit that outputs a data voltage to the data lines according to the gate signal provided to each gate line, and outputs to the data lines during a blank time before a specific frame, data voltages having an output waveform that is identical to data voltages of at least one gate line of the specific frame; and a timing controller that controls the gate driving unit and the data driving unit, and performs a pixel compensation which changes data provided to each subpixel.

Abstract: Disclosed are a transistor structure for a display and an organic light emitting display device. The transistor structure includes: a voltage line positioned in one direction and configured to supply voltage to pixels; and two or more transistors which share one of drains and sources which are formed integrally with the voltage line and respectively include the other of the drains and sources which are individually formed and connected with different nodes directly or through a connection pattern.

Abstract: The present invention provides an organic light emitting display device that includes a display panel in which an organic light emitting diode and a driving circuit are disposed in each pixel area of a first pixel and a second pixel which are certain pixels among a plurality of pixels, a floating pattern insulated from at least one of a first electrode of the organic light emitting diode of the first pixel and a first electrode of the organic light emitting diode of the second pixel is formed in the display panel, or a connection pattern for electrically connecting the first electrode of the organic light emitting diode of the first pixel with the first electrode of the organic light emitting diode of the second pixel is formed.

Abstract: A display device can include a display panel, in which a subpixel including a transistor where data lines and gate lines intersect, is disposed; a gate driving unit that sequentially outputs a gate signal to the gate lines; a data driving unit that outputs a data voltage to the data lines according to the gate signal provided to each gate line, and outputs to the data lines during a blank time before a specific frame, data voltages having an output waveform that is identical to data voltages of at least one gate line of the specific frame; and a timing controller that controls the gate driving unit and the data driving unit, and performs a pixel compensation which changes da a provided to each subpixel.

Abstract: Disclosed are a transistor structure for a display and an organic light emitting display device. The transistor structure includes: a voltage line positioned in one direction and configured to supply voltage to pixels; and two or more transistors which share one of drains and sources which are formed integrally with the voltage line and respectively include the other of the drains and sources which are individually formed and connected with different nodes directly or through a connection pattern.

Abstract: The present invention provides an organic light emitting display device that includes a display panel in which an organic light emitting diode and a driving circuit are disposed in each pixel area of a first pixel and a second pixel which are certain pixels among a plurality of pixels, a floating pattern insulated from at least one of a first electrode of the organic light emitting diode of the first pixel and a first electrode of the organic light emitting diode of the second pixel is formed in the display panel, or a connection pattern for electrically connecting the first electrode of the organic light emitting diode of the first pixel with the first electrode of the organic light emitting diode of the second pixel is formed.

Abstract: A memory device includes a memory cell array including a plurality of memory blocks, each memory block including a plurality of memory cells, a plurality of word lines coupled to rows of the plurality of memory cells, a plurality of bit lines coupled to columns of the plurality of memory cells, and a control unit controlling an erase operation so that erase data is simultaneously written in the plurality of memory cells corresponding to an erase unit. A first erase mode may include a first erase unit and a first erase data pattern. A second erase mode may include a second erase unit and a second erase pattern. At least one of the first and second erase units and the first and second erase data patterns are different.

Abstract: A nonvolatile memory device includes an array of resistive memory cells and a write driver, which is configured to drive a selected bit line in the array with a reset current pulse, which is responsive to a first external voltage input through a first terminal/pad of the memory device during a memory cell reset operation. The write driver is further configured to drive the selected bit line in sequence with a first set current pulse, which is responsive to the first external voltage, and a second set current pulse, which is responsive to a second external voltage input through a second terminal/pad of the memory device during a memory cell set operation.