Abstract: A memory device includes an address generator which generates a first physical address and a second physical address different from the first physical address. A first nonvolatile memory includes the first physical address, and a second nonvolatile memory includes the second physical address. An attack detecting circuit detects whether the first and second nonvolatile memories are attacked. The attack detecting circuit receives first data from the first nonvolatile memory and receives second data from the second nonvolatile memory, compares the first data and the second data with each other, and determines whether the first and second nonvolatile memories are attacked on the basis of a comparison result of the first data and the second data.

Abstract: A method of operating a payment device for selectively enabling a payment function according to the validity of a host is provided. The method relates to a method of operating the payment device which includes a near field communication controller (NFCC) and a host communicating with the NFCC. The method selectively enables the payment function according to the validity of the host, thereby preventing illegal or unwanted payment.

Abstract: A biometric authentication smart card may include a biometric authentication sensor configured to sense at least two types of biometric information of a user and to generate raw images therefrom; and processing circuitry configured to, generate a matching template including biometric features based on the raw images, select a user index from among a plurality of user indices based on the matching template, and output, to a payment terminal, payment class information and payment means information set adaptively for the user index.

Abstract: A biometric authentication smart card may include a biometric authentication sensor configured to sense at least two types of biometric information of a user and to generate raw images therefrom; and processing circuitry configured to, generate a matching template including biometric features based on the raw images, select a user index from among a plurality of user indices based on the matching template, and output, to a payment terminal, payment class information and payment means information set adaptively for the user index.

Abstract: A random number generator generates a random number by using at least two algorithms. A security device includes the random number generator. The random number generator includes a random seed generator and a post processor. The random seed generator is configured to receive an entropy signal and to generate a random seed of a digital region generated by using the entropy signal. The post processor is configured to generate a random number from the random seed by using a first algorithm and a second algorithm. A bias property represents unbiasedness of a result value, and a bias property of the first algorithm is different from a bias property of the second algorithm.

Abstract: A method of operating a payment device for selectively enabling a payment function according to the validity of a host is provided. The method relates to a method of operating the payment device which includes a near field communication controller (NFCC) and a host communicating with the NFCC. The method selectively enables the payment function according to the validity of the host, thereby preventing illegal or unwanted payment.

Abstract: A method of operating a payment device for selectively enabling a payment function according to the validity of a host is provided. The method relates to a method of operating the payment device which includes a near field communication controller (NFCC) and a host communicating with the NFCC. The method selectively enables the payment function according to the validity of the host, thereby preventing illegal or unwanted payment.

Abstract: A memory device includes an address generator which generates a first physical address and a second physical address different from the first physical address. A first nonvolatile memory includes the first physical address, and a second nonvolatile memory includes the second physical address. An attack detecting circuit detects whether the first and second nonvolatile memories are attacked. The attack detecting circuit receives first data from the first nonvolatile memory and receives second data from the second nonvolatile memory, compares the first data and the second data with each other, and determines whether the first and second nonvolatile memories are attacked on the basis of a comparison result of the first data and the second data.

Abstract: A random number generator generates a random number by using at least two algorithms. A security device includes the random number generator. The random number generator includes a random seed generator and a post processor. The random seed generator is configured to receive an entropy signal and to generate a random seed of a digital region generated by using the entropy signal. The post processor is configured to generate a random number from the random seed by using a first algorithm and a second algorithm.

Abstract: A method of operating a payment device for selectively enabling a payment function according to the validity of a host is provided. The method relates to a method of operating the payment device which includes a near field communication controller (NFCC) and a host communicating with the NFCC. The method selectively enables the payment function according to the validity of the host, thereby preventing illegal or unwanted payment.

Abstract: An IC card and an IC card system are disclosed in which command processing performance is improved by storing current state data related to a first command upon interruption of an execution cycle for the first command by a second command. Upon completion of the second command, the current state information is reloaded and execution of the first command is resumed.

Abstract: An IC card and an IC card system are disclosed in which command processing performance is improved by storing current state data related to a first command upon interruption of an execution cycle for the first command by a second command. Upon completion of the second command, the current state information is reloaded and execution of the first command is resumed.

Abstract: An IC card and an IC card system are disclosed in which command processing performance is improved by storing current state data related to a first command upon interruption of an execution cycle for the first command by a second command Upon completion of the second command, the current state information is reloaded and execution of the first command is resumed.

Abstract: A method and apparatus for resetting a memory card having a plurality of interfaces and a plurality of function blocks, wherein each function block may be associated with a corresponding interface, may include detecting a reset signal for a selected interface of the plurality of interfaces, and interrupting a function block associated with the selected interface. When the selected interface is the only active interface, all function blocks in the memory card may be reset. If interfaces other than the selected interface are active, only the selected interface may be reset.

Abstract: An IC card and an IC card system are disclosed in which command processing performance is improved by storing current state data related to a first command upon interruption of an execution cycle for the first command by a second command Upon completion of the second command, the current state information is reloaded and execution of the first command is resumed.

Abstract: An IC card and an IC card system are disclosed in which command processing performance is improved by storing current state data related to a first command upon interruption of an execution cycle for the first command by a second command. Upon completion of the second command, the current state information is reloaded and execution of the first command is resumed.

Abstract: A method and apparatus for managing digital rights using a portable storage device are provided. The method includes a device performing primary authentication together with a license provider and establishing primary security association, the device performing secondary authentication together with the portable storage device and establishing secondary security association, receiving a license from the license provider, and transmitting the license to the portable storage device.

Abstract: A semiconductor memory device according to some embodiments includes a random converter that receives data and address information including a start address value and an end address value of the address from a central processing unit (CPU), generates and stores at least one random number for each address value from the start address value to the end address value, performs a logical operation on the random number and the data corresponding to the address, and responsively generates randomized data to be stored in memory. Accordingly, the semiconductor memory device randomizes a power consumption signature that can occur when data is stored, thereby writing and reading data in a manner that is resistant to a power attack.

Abstract: For digital rights management (DRM), a method for performing authentication between a device and a portable storage, which is performed by the device, includes transmitting a first key to the portable storage, receiving a third key and a first encrypted random number obtained by encrypting a first random number using the first key from the portable storage and decrypting the first encrypted random number using a second key related with the first key, generating a second encrypted random number by encrypting a second random number using the third key and transmitting the second encrypted random number to the portable storage, and generating a session key using the first random number and the second random number. The technique guarantees secure authentication between the device and the portable storage for DRM.

Abstract: An encryption processor, for storing encrypted data in a memory chip of a memory card, includes a FIFO memory for sequentially outputting m-bit data in response to a first signal, and an encryption key generator for generating m-bit encrypted keys (m being a positive integer) in response to a second signal and for sequentially outputting the keys in response to a third signal. A logic operator performs a logic operation on the data from the FIFO memory with the keys from the encryption key generator during a data write operation to sequentially encrypt the data. The logic operator performs a logic operation on the encrypted data received from a memory interface with the keys output from the encryption key generator during a data read operation in order to sequentially decode the encrypted data. The second signal is simultaneously generated with one of the write command or the read command.