Patents by Inventor Joon-myoung LEE

Joon-myoung LEE has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11293091
    Abstract: A substrate processing apparatus including a chamber accommodating a substrate; a substrate support in the chamber, the substrate support supporting the substrate; a gas injector to inject an oxidizing gas for oxidizing a metal layer to be disposed on the substrate; a cooler under the substrate to cool the substrate; a target mount disposed on the substrate, the target mount including a target for performing a sputtering process; and a blocker between the target and the gas injector, the blocker shielding the target from the oxidizing gas injected from the gas injector.
    Type: Grant
    Filed: April 30, 2020
    Date of Patent: April 5, 2022
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Joon-Myoung Lee, Yong-Sung Park, Whan-Kyun Kim, Se-Chung Oh, Young-Man Jang
  • Patent number: 10892400
    Abstract: A magnetic memory device includes a buffer layer on a substrate, a magnetic tunnel junction structure including a fixed layer structure, a tunnel barrier, and a free layer that are sequentially arranged on the buffer layer, and a spin-orbit torque (SOT) structure on the magnetic tunnel junction structure and including a topological insulator material, wherein the free layer includes a Heusler material.
    Type: Grant
    Filed: July 16, 2019
    Date of Patent: January 12, 2021
    Inventors: Eun-sun Noh, Ju-hyun Kim, Joon-myoung Lee, Woo-chang Lim
  • Patent number: 10847713
    Abstract: A method is for manufacturing a magnetic-tunnel-junction (MTJ) device. The method includes forming a free magnetic layer over a substrate, forming a metal layer over the free magnetic layer, and oxidizing the metal layer by exposing the metal layer to an oxidation gas at a temperature of 250° K or less.
    Type: Grant
    Filed: May 3, 2019
    Date of Patent: November 24, 2020
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Whan Kyun Kim, Eun Sun Noh, Joon Myoung Lee, Woo Chang Lim, Jun Ho Jeong
  • Publication number: 20200255934
    Abstract: A substrate processing apparatus including a chamber accommodating a substrate; a substrate support in the chamber, the substrate support supporting the substrate; a gas injector to inject an oxidizing gas for oxidizing a metal layer to be disposed on the substrate; a cooler under the substrate to cool the substrate; a target mount disposed on the substrate, the target mount including a target for performing a sputtering process; and a blocker between the target and the gas injector, the blocker shielding the target from the oxidizing gas injected from the gas injector.
    Type: Application
    Filed: April 30, 2020
    Publication date: August 13, 2020
    Inventors: Joon-Myoung LEE, Yong-Sung PARK, Whan-Kyun KIM, Se-Chung OH, Young-Man JANG
  • Patent number: 10714678
    Abstract: The methods of manufacturing an MRAM device and MRAM devices are provided. The methods may include forming a first electrode on an upper surface of a substrate, forming a first magnetic layer on the first electrode, forming a tunnel barrier structure on the first magnetic layer, forming a second magnetic layer on the tunnel barrier structure, and forming a second electrode on the second magnetic layer. The tunnel barrier structure may include a first tunnel barrier layer and a second tunnel barrier layer that are sequentially stacked on the first magnetic layer and may have different resistivity distributions from each other along a horizontal direction that may be parallel to the upper surface of the substrate.
    Type: Grant
    Filed: December 27, 2019
    Date of Patent: July 14, 2020
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Yong-Sung Park, Woo-Jin Kim, Jeong-Heon Park, Se-Chung Oh, Joon-Myoung Lee, Hyun Cho
  • Publication number: 20200185598
    Abstract: A magnetic memory device includes a buffer layer on a substrate, a magnetic tunnel junction structure including a fixed layer structure, a tunnel barrier, and a free layer that are sequentially arranged on the buffer layer, and a spin-orbit torque (SOT) structure on the magnetic tunnel junction structure and including a topological insulator material, wherein the free layer includes a Heusler material.
    Type: Application
    Filed: July 16, 2019
    Publication date: June 11, 2020
    Inventors: Eun-sun Noh, Ju-hyun Kim, Joon-myoung Lee, Woo-chang Lim
  • Patent number: 10640865
    Abstract: A substrate processing apparatus including a chamber accommodating a substrate; a substrate support in the chamber, the substrate support supporting the substrate; a gas injector to inject an oxidizing gas for oxidizing a metal layer to be disposed on the substrate; a cooler under the substrate to cool the substrate; a target mount disposed on the substrate, the target mount including a target for performing a sputtering process; and a blocker between the target and the gas injector, the blocker shielding the target from the oxidizing gas injected from the gas injector.
    Type: Grant
    Filed: June 22, 2017
    Date of Patent: May 5, 2020
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Joon-Myoung Lee, Yong-Sung Park, Whan-Kyun Kim, Se-Chung Oh, Young-Man Jang
  • Publication number: 20200136020
    Abstract: The methods of manufacturing an MRAM device and MRAM devices are provided. The methods may include forming a first electrode on an upper surface of a substrate, forming a first magnetic layer on the first electrode, forming a tunnel barrier structure on the first magnetic layer, forming a second magnetic layer on the tunnel barrier structure, and forming a second electrode on the second magnetic layer. The tunnel barrier structure may include a first tunnel barrier layer and a second tunnel barrier layer that are sequentially stacked on the first magnetic layer and may have different resistivity distributions from each other along a horizontal direction that may be parallel to the upper surface of the substrate.
    Type: Application
    Filed: December 27, 2019
    Publication date: April 30, 2020
    Inventors: Yong-Sung PARK, Woo-Jin KIM, Jeong-Heon PARK, Se-Chung OH, Joon-Myoung LEE, Hyun CHO
  • Patent number: 10559746
    Abstract: The methods of manufacturing an MRAM device and MRAM devices are provided. The methods may include forming a first electrode on an upper surface of a substrate, forming a first magnetic layer on the first electrode, forming a tunnel barrier structure on the first magnetic layer, forming a second magnetic layer on the tunnel barrier structure, and forming a second electrode on the second magnetic layer. The tunnel barrier structure may include a first tunnel barrier layer and a second tunnel barrier layer that are sequentially stacked on the first magnetic layer and may have different resistivity distributions from each other along a horizontal direction that may be parallel to the upper surface of the substrate.
    Type: Grant
    Filed: August 22, 2018
    Date of Patent: February 11, 2020
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Yong-Sung Park, Woo-Jin Kim, Jeong-Heon Park, Se-Chung Oh, Joon-Myoung Lee, Hyun Cho
  • Publication number: 20190355900
    Abstract: A method is for manufacturing a magnetic-tunnel-junction (MTJ) device. The method includes forming a free magnetic layer over a substrate, forming a metal layer over the free magnetic layer, and oxidizing the metal layer by exposing the metal layer to an oxidation gas at a temperature of 250° K or less.
    Type: Application
    Filed: May 3, 2019
    Publication date: November 21, 2019
    Inventors: WHAN KYUN KIM, EUN SUN NOH, JOON MYOUNG LEE, WOO CHANG LIM, JUN HO JEONG
  • Publication number: 20190123262
    Abstract: Provided is a semiconductor manufacturing apparatus including a transfer chamber, a first process chamber connected to the transfer chamber, and a second process chamber connected to the transfer chamber. The transfer chamber may be configured to transfer a substrate. The first process chamber may be configured to perform a first oxidation process for oxidizing a metal layer on the substrate at a first temperature. The second process chamber may be configured to perform a second oxidation process for oxidizing a metal layer on the substrate at a second temperature higher than the first temperature.
    Type: Application
    Filed: May 31, 2018
    Publication date: April 25, 2019
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Joon-myoung Lee, Jae-hoon Kim, Yong-sung Park, Se-chung Oh, Jun-ho Jeong
  • Publication number: 20190123263
    Abstract: The methods of manufacturing an MRAM device and MRAM devices are provided. The methods may include forming a first electrode on an upper surface of a substrate, forming a first magnetic layer on the first electrode, forming a tunnel barrier structure on the first magnetic layer, forming a second magnetic layer on the tunnel barrier structure, and forming a second electrode on the second magnetic layer. The tunnel barrier structure may include a first tunnel barrier layer and a second tunnel barrier layer that are sequentially stacked on the first magnetic layer and may have different resistivity distributions from each other along a horizontal direction that may be parallel to the upper surface of the substrate.
    Type: Application
    Filed: August 22, 2018
    Publication date: April 25, 2019
    Inventors: Yong-Sung PARK, Woo-Jin Kim, Jeong-Heon Park, Se-Chung Oh, Joon-Myoung Lee, Hyun Cho
  • Publication number: 20190097124
    Abstract: An MRAM device includes a lower electrode, a blocking pattern on the lower electrode and including a binary metal boride in an amorphous state, a seed pattern on the blocking pattern and including a metal, an MTJ structure on the seed pattern, and an upper electrode on the MTJ structure.
    Type: Application
    Filed: August 10, 2018
    Publication date: March 28, 2019
    Inventors: Joon-Myoung LEE, Ju-Hyun KIM, Jung-Hwan PARK, Se-Chung OH, Young-Man JANG
  • Publication number: 20180073131
    Abstract: A substrate processing apparatus including a chamber accommodating a substrate; a substrate support in the chamber, the substrate support supporting the substrate; a gas injector to inject an oxidizing gas for oxidizing a metal layer to be disposed on the substrate; a cooler under the substrate to cool the substrate; a target mount disposed on the substrate, the target mount including a target for performing a sputtering process; and a blocker between the target and the gas injector, the blocker shielding the target from the oxidizing gas injected from the gas injector.
    Type: Application
    Filed: June 22, 2017
    Publication date: March 15, 2018
    Inventors: Joon-Myoung LEE, Yong-Sung PARK, Whan-Kyun KIM, Se-Chung OH, Young-Man JANG
  • Patent number: 9899594
    Abstract: A magnetic memory device includes a substrate, a circuit device on the substrate, a lower electrode electrically connected to the circuit device, a magnetic tunnel junction structure (MTJ structure) on the lower electrode, and an upper electrode on the MTJ structure. The MTJ structure includes a pinned layer structure including at least one crystalline ferromagnetic layer and at least one amorphous ferromagnetic layer, a free layer, and a tunnel barrier layer between the pinned layer structure and the free layer.
    Type: Grant
    Filed: June 1, 2016
    Date of Patent: February 20, 2018
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Ki-Woong Kim, Ju-Hyun Kim, Yong-Sung Park, Se-Chung Oh, Joon-Myoung Lee
  • Publication number: 20170327941
    Abstract: A sputtering apparatus includes a chamber configured to provide a space where a deposition process is performed on a substrate, a substrate holder configured to support the substrate within the chamber, and at least one turret-type target assembly located over the substrate, including a plurality of targets mounted thereon and adapted to operatively rotate by a predetermined angle about its longitudinal axis such that any one of the targets is off-axis aligned with respect to a film-deposited surface of the substrate.
    Type: Application
    Filed: December 30, 2016
    Publication date: November 16, 2017
    Inventors: Woo-Jin KIM, Ki-Woong KIM, Joon-Myoung LEE
  • Patent number: 9666789
    Abstract: A semiconductor device is provided having a free layer and a pinned layer spaced apart from each other. A tunnel barrier layer is formed between the free layer and the pinned layer. The pinned layer may include a lower pinned layer, and an upper pinned layer spaced apart from the lower pinned layer. A spacer may be formed between the lower pinned layer and the upper pinned layer. A non-magnetic junction layer may be disposed adjacent to the spacer or between layers in the upper or lower pinned layer.
    Type: Grant
    Filed: June 16, 2015
    Date of Patent: May 30, 2017
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Jeong-Heon Park, Ki-Woong Kim, Hee-Ju Shin, Joon-Myoung Lee, Woo-Jin Kim, Jae-Hoon Kim, Se-Chung Oh, Yun-Jae Lee
  • Publication number: 20170084822
    Abstract: A magnetic memory device includes a substrate, a circuit device on the substrate, a lower electrode electrically connected to the circuit device, a magnetic tunnel junction structure (MTJ structure) on the lower electrode, and an upper electrode on the MTJ structure. The MTJ structure includes a pinned layer structure including at least one crystalline ferromagnetic layer and at least one amorphous ferromagnetic layer, a free layer, and a tunnel barrier layer between the pinned layer structure and the free layer.
    Type: Application
    Filed: June 1, 2016
    Publication date: March 23, 2017
    Inventors: Ki-Woong KIM, Ju-Hyun KIM, Yong-Sung PARK, Se-Chung OH, Joon-Myoung LEE
  • Publication number: 20160020386
    Abstract: Provided is a method of manufacturing a magnetic device, the method including forming a magnetic layer; forming a lower insulating layer on the magnetic layer using a first gas, which is an inert gas having a greater atomic weight than argon (Ar); and forming an upper insulating layer on the lower insulating layer using Ar gas.
    Type: Application
    Filed: April 3, 2015
    Publication date: January 21, 2016
    Inventors: Ki-woong KIM, Joon-myoung LEE, Woo-chang LIM, Sang-yong KIM
  • Publication number: 20150280108
    Abstract: A semiconductor device is provided having a free layer and a pinned layer spaced apart from each other. A tunnel barrier layer is formed between the free layer and the pinned layer. The pinned layer may include a lower pinned layer, and an upper pinned layer spaced apart from the lower pinned layer. A spacer may be formed between the lower pinned layer and the upper pinned layer. A non-magnetic junction layer may be disposed adjacent to the spacer or between layers in the upper or lower pinned layer.
    Type: Application
    Filed: June 16, 2015
    Publication date: October 1, 2015
    Inventors: JEONG-HEON PARK, KI-WOONG KIM, HEE-JU SHIN, JOON-MYOUNG LEE, WOO-JIN KIM, JAE-HOON KIM, SE-CHUNG OH, YUN-JAE LEE