Patents by Inventor Jordan Asher Katine

Jordan Asher Katine has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10211393
    Abstract: An MRAM memory cell is proposed that is based on spin accumulation torque. One embodiment includes a magnetic tunnel junction, a spin accumulation layer connected to the magnetic tunnel junction and a polarization layer connected to the spin accumulation layer. The polarization layer and the spin accumulation layer use spin accumulation to provide a spin accumulation torque on the free magnetic layer of the magnetic tunnel junction to change direction of magnetization of the free magnetic layer.
    Type: Grant
    Filed: February 23, 2017
    Date of Patent: February 19, 2019
    Assignee: SanDisk Technologies LLC
    Inventors: Goran Mihajlovic, Neil Smith, Jordan Asher Katine, Neil Leslie Robertson
  • Patent number: 10157656
    Abstract: A magnetic memory cell and a method for implementing the magnetic memory cell for use in Solid-State Drives (SSDs) are provided. A magnetic memory cell includes a first conductor M1, and a second conductor M2 and a programmable area using unpatterned programmable magnetic media. At least one of the conductors M1, M2 is formed of a magnetic material, and the conductor M2 is more conductive than conductor M1. Steering of current is provided for programming the magnetic memory cell.
    Type: Grant
    Filed: August 25, 2015
    Date of Patent: December 18, 2018
    Assignee: WESTERN DIGITAL TECHNOLOGIES, INC.
    Inventors: Zvonimir Z. Bandic, Jeffery Robinson Childress, Luiz M. Franca-Neto, Jordan Asher Katine, Neil Leslie Robertson
  • Publication number: 20180240966
    Abstract: An MRAM memory cell is proposed that is based on spin accumulation torque. One embodiment includes a magnetic tunnel junction, a spin accumulation layer connected to the magnetic tunnel junction and a polarization layer connected to the spin accumulation layer. The polarization layer and the spin accumulation layer use spin accumulation to provide a spin accumulation torque on the free magnetic layer of the magnetic tunnel junction to change direction of magnetization of the free magnetic layer.
    Type: Application
    Filed: February 23, 2017
    Publication date: August 23, 2018
    Applicant: SANDISK TECHNOLOGIES LLC
    Inventors: Goran Mihajlovic, Neil Smith, Jordan Asher Katine, Neil Leslie Robertson
  • Patent number: 9941331
    Abstract: A method is provided that includes forming a first level above a substrate, forming a second level above the first level, and forming a third level above the second level. The first level includes a plurality of first elements having a first minimum pitch, the second level includes a plurality of second elements having a second minimum pitch greater than the first minimum pitch, and the third level includes a plurality of third elements having a third minimum pitch greater than the first minimum pitch. The second elements are disposed above and aligned with a first plurality of the first elements, and the third elements are disposed above and aligned with a second plurality of the first elements.
    Type: Grant
    Filed: January 25, 2017
    Date of Patent: April 10, 2018
    Assignee: SanDisk Technologies LLC
    Inventors: Jordan Asher Katine, Christopher J. Petti, Yangyin Chen
  • Patent number: 9780143
    Abstract: A magnetic memory integrated with complementary metal oxide semiconductor (CMOS) driving circuits and a method for implementing magnetic memory integrated with complementary metal oxide semiconductor (CMOS) driving circuits for use in Solid-State Drives (SSDs) are provided. A complementary metal oxide semiconductor (CMOS) wafer is provided, and a magnetic memory is formed on top of the CMOS wafer providing a functioning magnetic memory chip.
    Type: Grant
    Filed: August 25, 2015
    Date of Patent: October 3, 2017
    Assignee: WESTERN DIGITAL TECHNOLOGIES, INC.
    Inventors: Zvonimir Z. Bandic, Jeffery Robinson Childress, Luiz M. Franca-Neto, Jordan Asher Katine, Neil Leslie Robertson
  • Patent number: 9673387
    Abstract: A magnetic memory pillar cell and a method for implementing the magnetic memory cell for use in Solid-State Drives (SSDs) are provided. A magnetic memory cell includes a first conductor M1, and a second conductor M2, the second conductor M1 surrounded by the first conductor M1 and a programmable area using unpatterned programmable magnetic media. At least one of the conductors M1, M2 is formed of a magnetic material, and the conductor M2 is more conductive than conductor M1. An oxide barrier extends between the first conductor M1 and a programmable input to the magnetic memory pillar cell; and the oxide barrier is unpatterned.
    Type: Grant
    Filed: December 5, 2016
    Date of Patent: June 6, 2017
    Assignee: Western Digital Technologies, Inc.
    Inventors: Zvonimir Z. Bandic, Jeffery Robinson Childress, Luiz M. Franca-Neto, Jordan Asher Katine, Neil Leslie Robertson
  • Publication number: 20170084827
    Abstract: A magnetic memory pillar cell and a method for implementing the magnetic memory cell for use in Solid-State Drives (SSDs) are provided. A magnetic memory cell includes a first conductor M1, and a second conductor M2, the second conductor M1 surrounded by the first conductor M1 and a programmable area using unpatterned programmable magnetic media. At least one of the conductors M1, M2 is formed of a magnetic material, and the conductor M2 is more conductive than conductor M1. An oxide barrier extends between the first conductor M1 and a programmable input to the magnetic memory pillar cell; and the oxide barrier is unpatterned.
    Type: Application
    Filed: December 5, 2016
    Publication date: March 23, 2017
    Inventors: Zvonimir Z. Bandic, Jeffery Robinson Childress, Luiz M. Franca-Neto, Jordan Asher Katine, Neil Leslie Robertson
  • Publication number: 20170062034
    Abstract: A magnetic memory cell and a method for implementing the magnetic memory cell for use in Solid-State Drives (SSDs) are provided. A magnetic memory cell includes a first conductor M1, and a second conductor M2 and a programmable area using unpatterned programmable magnetic media. At least one of the conductors M1, M2 is formed of a magnetic material, and the conductor M2 is more conductive than conductor M1. Steering of current is provided for programming the magnetic memory cell.
    Type: Application
    Filed: August 25, 2015
    Publication date: March 2, 2017
    Inventors: Zvonimir Z. Bandic, Jeffery Robinson Childress, Luiz M. Franca-Neto, Jordan Asher Katine, Neil Leslie Robertson
  • Publication number: 20170062519
    Abstract: A magnetic memory integrated with complementary metal oxide semiconductor (CMOS) driving circuits and a method for implementing magnetic memory integrated with complementary metal oxide semiconductor (CMOS) driving circuits for use in Solid-State Drives (SSDs) are provided. A complementary metal oxide semiconductor (CMOS) wafer is provided, and a magnetic memory is formed on top of the CMOS wafer providing a functioning magnetic memory chip.
    Type: Application
    Filed: August 25, 2015
    Publication date: March 2, 2017
    Inventors: Zvonimir Z. Bandic, Jeffery Robinson Childress, Luiz M. Franca-Neto, Jordan Asher Katine, Neil Leslie Robertson
  • Patent number: 9520444
    Abstract: A magnetic memory pillar cell and a method for implementing the magnetic memory cell for use in Solid-State Drives (SSDs) are provided. A magnetic memory cell includes a first conductor M1, and a second conductor M2, the second conductor M1 surrounded by the first conductor M1 and a programmable area using unpatterned programmable magnetic media. At least one of the conductors M1, M2 is formed of a magnetic material, and the conductor M2 is more conductive than conductor M1. An oxide barrier extends between the first conductor M1 and a programmable input to the magnetic memory pillar cell; and the oxide barrier is unpatterned.
    Type: Grant
    Filed: August 25, 2015
    Date of Patent: December 13, 2016
    Assignee: Western Digital Technologies, Inc.
    Inventors: Zvonimir Z. Bandic, Jeffery Robinson Childress, Luiz M. Franca-Neto, Jordan Asher Katine, Neil Leslie Robertson
  • Patent number: 9443905
    Abstract: A three-dimensional (3D) scalable magnetic memory array and a method for implementing the three-dimensional (3D) scalable magnetic memory array for use in Solid-State Drives (SSDs) are provided. A three-dimensional (3D) scalable magnetic memory array includes an interlayer dielectric (IDL) stack of word planes separated by a respective IDL. A plurality of pillar holes is formed in the IDL stack in a single etch step; each of the pillar holes including an oxide barrier coating, and a first conductor M1, and a second conductor M2 forming magnetic pillar memory cells. The first conductor M1 is formed of a magnetic material, and the second conductor M2 is more electrically conductive than the conductor M1; and each of the magnetic pillar memory cell inside the pillar holes have a programmable area using unpatterned programmable magnetic media proximate to a respective one of the word planes.
    Type: Grant
    Filed: August 25, 2015
    Date of Patent: September 13, 2016
    Assignee: HGST Netherlands B.V.
    Inventors: Zvonimir Z. Bandic, Jeffery Robinson Childress, Luiz M. Franca-Neto, Jordan Asher Katine, Neil Leslie Robertson
  • Patent number: 9236069
    Abstract: A method for making a current-perpendicular-to-the-plane magnetoresistive sensor structure produces a top electrode that is “self-aligned” on the top of the sensor and with a width less than the sensor trackwidth. A pair of walls of ion-milling resistant material are fabricated to a predetermined height above the biasing layers at the sensor side edges. A layer of electrode material is then deposited onto the top of the sensor between the two walls. The walls serve as a mask during angled ion milling to remove outer portions of the electrode layer. The height of the walls and the angle of ion milling determines the width of the resulting top electrode. This leaves the reduced-width top electrode located on the sensor. Because of the directional ion milling using walls that are aligned with the sensor side edges, the reduced-width top electrode is self-aligned in the center of the sensor.
    Type: Grant
    Filed: March 29, 2013
    Date of Patent: January 12, 2016
    Assignee: HGST Netherlands B.V.
    Inventors: Patrick Mesquita Braganca, Jeffrey R. Childress, Jordan Asher Katine, Yang Li, Neil Leslie Robertson, Neil Smith, Petrus Antonius VanDerHeijden, Douglas Johnson Werner
  • Patent number: 9218831
    Abstract: A side-by-side magnetic multi-input multi-output (MIMO) read head is provided. The read head may include a pair of side-by-side MIMO read sensors disposed between a bottom shield, a top shield and between a pair of side shields. The read head may also include a pair of electrical leads, each of which is coupled with one of the MIMO read sensors. The electrical leads extend away from an air bearing surface.
    Type: Grant
    Filed: September 17, 2014
    Date of Patent: December 22, 2015
    Assignee: HGST Netherlands B.V.
    Inventors: Patrick Mesquita Braganca, Jordan Asher Katine, Hsin-wei Tseng, Howard Gordon Zolla
  • Publication number: 20150147481
    Abstract: A method for making a scissoring type current-perpendicular-to-the-plane magnetoresistive sensor with exchange-coupled soft side shields uses oblique angle ion milling to remove unwanted material from the side edges of the upper free layer. All of the layers making up the sensor stack are deposited as full films. The sensor stack is then ion milled to define the sensor side edges. The side regions are then refilled by deposition of an insulating layer. Next, the lower soft magnetic layers of the exchange-coupled side shields are deposited, which also coats the insulating layer up to and past the side edges of the upper free layer. The soft magnetic material adjacent the side edges of the upper free layer is removed by oblique angle ion beam milling. The material for the antiparallel-coupling (APC) layers is deposited, followed by deposition of the material for the upper soft magnetic layers of the exchange-coupled side shields.
    Type: Application
    Filed: November 20, 2013
    Publication date: May 28, 2015
    Applicant: HGST Nertherlands B..V.
    Inventors: Patrick Mesquita Braganca, Jordan Asher Katine, Neil Smith
  • Patent number: 9042059
    Abstract: A two-dimensional magnetic recording (TDMR) read head has upper and lower read sensors wherein the lower read sensor has its magnetization biased by side shields of soft magnetic material. The center shield between the lower and upper sensors may be an antiparallel structure (APS) with two ferromagnetic layers separated by an antiparallel coupling (APC) layer. The center shield has a central region and two side regions, but there is no antiferromagnetic (AF) layer in the central region. Instead the two side regions of the upper ferromagnetic layer in the APS are pinned by AF tab layers that are electrically isolated from the upper sensor. The upper ferromagnetic layer and the APC layer in the APS may also be located only in the side regions. The thickness of the center shield can thus be made thinner, which reduces the free layer to free layer spacing.
    Type: Grant
    Filed: May 15, 2014
    Date of Patent: May 26, 2015
    Assignee: HGST Netherlands B.V.
    Inventors: Jordan Asher Katine, Stefan Maat, Neil Smith, Alexander M. Zeltser, Howard Gordon Zolla
  • Patent number: 8988833
    Abstract: A current-perpendicular-to-the plane magnetoresistive sensor has top and bottom electrodes narrower than the sensor trackwidth. The electrodes are formed of one of Cu, Au, Ag and AgSn, which have an ion milling etch rate much higher than the etch rates for the sensor's ferromagnetic materials. Ion milling is performed at a high angle relative to a line orthogonal to the plane of the electrode layers and the layers in the sensor stack. Because of the much higher etch rate of the material of the top and bottom electrode layers, the electrode layers will have side edges that are recessed from the side edges of the free layer. This reduces the surface areas for the top and bottom electrodes, which causes the sense current passing through the sensor's free layer to be confined in a narrower channel, which is equivalent to having a sensor with narrower physical trackwidth.
    Type: Grant
    Filed: May 16, 2013
    Date of Patent: March 24, 2015
    Assignee: HGST Netherlands B.V.
    Inventors: Patrick Mesquita Braganca, Jeffrey R. Childress, Jordan Asher Katine, Yang Li, Neil Leslie Robertson, Neil Smith, Petrus Antonius VanDerHeijden, Douglas Johnson Werner
  • Patent number: 8914970
    Abstract: A tunneling magnetoresistive sensor has an extended pinned layer wherein both the MgO spacer layer and the underlying ferromagnetic pinned layer extend beyond the back edge of the ferromagnetic free layer in the stripe height direction and optionally also beyond the side edges of the free layer in the trackwidth direction. A patterned photoresist layer with a back edge is formed on the sensor stack and a methanol (CH3OH)-based reactive ion etching (RIE) removes the unprotected free layer, defining the free layer back edge. The methanol-based RIE terminates at the MgO spacer layer without damaging the underlying reference layer. A second patterned photoresist layer may be deposited and a second methanol-based RIE may be performed if it is desired to have the reference layer also extend beyond the side edges of the free layer in the trackwidth direction.
    Type: Grant
    Filed: April 23, 2013
    Date of Patent: December 23, 2014
    Assignee: HGST Netherlands B.V.
    Inventor: Jordan Asher Katine
  • Publication number: 20140340791
    Abstract: A current-perpendicular-to-the plane magnetoresistive sensor has top and bottom electrodes narrower than the sensor trackwidth. The electrodes are formed of one of Cu, Au, Ag and AgSn, which have an ion milling etch rate much higher than the etch rates for the sensor's ferromagnetic materials. Ion milling is performed at a high angle relative to a line orthogonal to the plane of the electrode layers and the layers in the sensor stack. Because of the much higher etch rate of the material of the top and bottom electrode layers, the electrode layers will have side edges that are recessed from the side edges of the free layer. This reduces the surface areas for the top and bottom electrodes, which causes the sense current passing through the sensor's free layer to be confined in a narrower channel, which is equivalent to having a sensor with narrower physical trackwidth.
    Type: Application
    Filed: May 16, 2013
    Publication date: November 20, 2014
    Applicant: HGST Netherlands B.V.
    Inventors: Patrick Mesquita Braganca, Jeffrey R. Childress, Jordan Asher Katine, Yang Li, Neil Leslie Robertson, Neil Smith, Petrus Antonius VanDerHeijden, Douglas Johnson Werner
  • Publication number: 20140313617
    Abstract: A tunneling magnetoresistive sensor has an extended pinned layer wherein both the MgO spacer layer and the underlying ferromagnetic pinned layer extend beyond the back edge of the ferromagnetic free layer in the stripe height direction and optionally also beyond the side edges of the free layer in the trackwidth direction. A patterned photoresist layer with a back edge is formed on the sensor stack and a methanol (CH3OH)-based reactive ion etching (RIE) removes the unprotected free layer, defining the free layer back edge. The methanol-based RIE terminates at the MgO spacer layer without damaging the underlying reference layer. A second patterned photoresist layer may be deposited and a second methanol-based RIE may be performed if it is desired to have the reference layer also extend beyond the side edges of the free layer in the trackwidth direction.
    Type: Application
    Filed: April 23, 2013
    Publication date: October 23, 2014
    Applicant: HGST Netherlands B.V.
    Inventor: Jordan Asher Katine
  • Publication number: 20140291283
    Abstract: A method for making a current-perpendicular-to-the-plane magnetoresistive sensor structure produces a top electrode that is “self-aligned” on the top of the sensor and with a width less than the sensor trackwidth. A pair of walls of ion-milling resistant material are fabricated to a predetermined height above the biasing layers at the sensor side edges. A layer of electrode material is then deposited onto the top of the sensor between the two walls. The walls serve as a mask during angled ion milling to remove outer portions of the electrode layer. The height of the walls and the angle of ion milling determines the width of the resulting top electrode. This leaves the reduced-width top electrode located on the sensor. Because of the directional ion milling using walls that are aligned with the sensor side edges, the reduced-width top electrode is self-aligned in the center of the sensor.
    Type: Application
    Filed: March 29, 2013
    Publication date: October 2, 2014
    Applicant: HGST Netherlands B.V.
    Inventors: Patrick Mesquita Braganca, Jeffrey R. Childress, Jordan Asher Katine, Yang Li, Neil Leslie Robertson, Neil Smith, Petrus Antonius VanDerHeijden, Douglas Johnson Werner