Patents by Inventor Jorge Cruz

Jorge Cruz has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10827191
    Abstract: A device includes a memory configured to store image data and an image coding unit implemented in circuitry. The image coding unit is configured to code a first value of a first instance of a first syntax element of a first block of image data and determine a first context for coding a second value of a second instance of the first syntax element of a second block of the image data. The image coding unit is configured to context-based code the second value of the second instance of the first syntax element of the second block of the image data after coding the first value of the first instance of the first syntax element using the first context and code a third value of a first instance of a second syntax element of the first block in parallel with coding the second value or after coding the second value.
    Type: Grant
    Filed: November 2, 2018
    Date of Patent: November 3, 2020
    Assignee: Fungible, Inc.
    Inventors: Abhishek Kumar Dikshit, Jorge Cruz-Rios, Rajan Goyal, Satyanarayana Lakshmipathi Billa
  • Patent number: 10827192
    Abstract: A device includes a memory configured to store image data and an image coding unit. The image coding unit is configured to decode a first set of one or more bits of a first value of a first instance of a first syntax element of a block of image data, determine that the first set of one or more bits have values indicating that one or more values of respective instances of one or more other syntax elements of the block of image data are to be decoded. In response to the determination, the image coding unit is configured to decode one or more bits of the one or more values of the respective instances of the one or more other syntax elements of the block prior to decoding a second set of one or more bits of the first value of the first instance of the first syntax element.
    Type: Grant
    Filed: November 2, 2018
    Date of Patent: November 3, 2020
    Assignee: Fungible, Inc.
    Inventors: Abhishek Kumar Dikshit, Rajan Goyal, Jorge Cruz-Rios
  • Publication number: 20200145682
    Abstract: A device includes a memory configured to store image data and an image coding unit. The image coding unit is configured to decode a first set of one or more bits of a first value of a first instance of a first syntax element of a block of image data, determine that the first set of one or more bits have values indicating that one or more values of respective instances of one or more other syntax elements of the block of image data are to be decoded. In response to the determination, the image coding unit is configured to decode one or more bits of the one or more values of the respective instances of the one or more other syntax elements of the block prior to decoding a second set of one or more bits of the first value of the first instance of the first syntax element.
    Type: Application
    Filed: November 2, 2018
    Publication date: May 7, 2020
    Inventors: Abhishek Kumar Dikshit, Rajan Goyal, Jorge Cruz-Rios
  • Publication number: 20200145680
    Abstract: A device includes a memory configured to store image data and an image coding unit implemented in circuitry. The image coding unit is configured to code a first value of a first instance of a first syntax element of a first block of image data and determine a first context for coding a second value of a second instance of the first syntax element of a second block of the image data. The image coding unit is configured to context-based code the second value of the second instance of the first syntax element of the second block of the image data after coding the first value of the first instance of the first syntax element using the first context and code a third value of a first instance of a second syntax element of the first block in parallel with coding the second value or after coding the second value.
    Type: Application
    Filed: November 2, 2018
    Publication date: May 7, 2020
    Inventors: Abhishek Kumar Dikshit, Jorge Cruz-Rios, Rajan Goyal, Satyanarayana Lakshmipathi Billa
  • Patent number: 8545929
    Abstract: Systems and methods for applying liquid coating materials to a substrate, such as an electronic component or circuit board. A control system of a coating system controls an applicator and a robot moving the applicator to apply the liquid coating material to the substrate in accordance with the information contained in a coating program. The control system determines a volume of liquid coating material actually dispensed onto the substrate during the coating program, and compares the dispensed volume to a desired dispensed volume of liquid coating material to produce an error signal representing the difference between the calculated and desired volume values. The control system uses the error signal to change the dispensed volume of liquid coating material on a subsequent substrate by a future coating program.
    Type: Grant
    Filed: October 25, 2011
    Date of Patent: October 1, 2013
    Assignee: Nordson Corporation
    Inventors: Kenneth S. Espenschied, Patrick T. Hogan, Jorge Cruz, David Ruf
  • Publication number: 20120040088
    Abstract: Systems and methods for applying liquid coating materials to a substrate, such as an electronic component or circuit board. A control system of a coating system controls an applicator and a robot moving the applicator to apply the liquid coating material to the substrate in accordance with the information contained in a coating program. The control system determines a volume of liquid coating material actually dispensed onto the substrate during the coating program, and compares the dispensed volume to a desired dispensed volume of liquid coating material to produce an error signal representing the difference between the calculated and desired volume values. The control system uses the error signal to change the dispensed volume of liquid coating material on a subsequent substrate by a future coating program.
    Type: Application
    Filed: October 25, 2011
    Publication date: February 16, 2012
    Applicant: NORDSON CORPORATION
    Inventors: Kenneth S. Espenschied, Patrick T. Hogan, Jorge Cruz, David Ruf
  • Patent number: 7978609
    Abstract: A packet scheduler is configured to perform quality of service (QoS) scheduling on a per-data unit basis. A downstream processing engine is operatively connected to the packet scheduler for receiving forwarded packets. A feedback path is operatively connected between the downstream processing engine and the packet scheduler for transmitting a net data unit change value reflecting a change in packet size between an output of the packet scheduler and an output of the downstream processing engine.
    Type: Grant
    Filed: May 22, 2009
    Date of Patent: July 12, 2011
    Assignee: Juniper Networks, Inc.
    Inventors: Sreeram Veeragandham, Rami Rahim, Song Zhang, Anurag P. Gupta, Jorge Cruz-Rios, Jayabharat Boddu, Jeffrey R. Zimmer, Jia-Chang Wang, Srihari Shoroff, Chi-Chung K. Chen
  • Publication number: 20110069615
    Abstract: A method for processing high priority packets and low priority packets in a network device includes performing arbitration on high priority packets until no high priority packets remain. Arbitration then is enabled on low priority packets. A packet size associated with the selected low priority packet is compared with a programmable threshold. Low priority packets are excluded from subsequent arbitration for a programmable duration when the packet size exceeds the programmable threshold.
    Type: Application
    Filed: October 22, 2010
    Publication date: March 24, 2011
    Applicant: JUNIPER NETWORKS, INC.
    Inventors: Song ZHANG, Jorge CRUZ-RIOS, Anurag P. GUPTA
  • Patent number: 7843816
    Abstract: A method for processing high priority packets and low priority packets in a network device includes performing arbitration on high priority packets until no high priority packets remain. Arbitration then is enabled on low priority packets. A packet size associated with the selected low priority packet is compared with a programmable threshold. Low priority packets are excluded from subsequent arbitration for a programmable duration when the packet size exceeds the programmable threshold.
    Type: Grant
    Filed: January 22, 2008
    Date of Patent: November 30, 2010
    Assignee: Juniper Networks, Inc.
    Inventors: Song Zhang, Jorge Cruz-Rios, Anurag P Gupta
  • Publication number: 20090245246
    Abstract: A packet scheduler is configured to perform quality of service (QoS) scheduling on a per-data unit basis. A downstream processing engine is operatively connected to the packet scheduler for receiving forwarded packets. A feedback path is operatively connected between the downstream processing engine and the packet scheduler for transmitting a net data unit change value reflecting a change in packet size between an output of the packet scheduler and an output of the downstream processing engine.
    Type: Application
    Filed: May 22, 2009
    Publication date: October 1, 2009
    Applicant: JUNIPER NETWORKS, INC.
    Inventors: Sreeram Veeragandham, Rami Rahim, Song Zhang, Anurag P. Gupta, Jorge Cruz-Rios, Jayabharat Boddu, Jeffrey R. Zimmer, Jia-Chang Wang, Srihari Shoroff, Chi-Chung K. Chen
  • Patent number: 7554919
    Abstract: A packet scheduler is configured to perform quality of service (QoS) scheduling on a per-data unit basis. A downstream processing engine is operatively connected to the packet scheduler for receiving forwarded packets. A feedback path is operatively connected between the downstream processing engine and the packet scheduler for transmitting a net data unit change value reflecting a change in packet size between an output of the packet scheduler and an output of the downstream processing engine.
    Type: Grant
    Filed: June 9, 2004
    Date of Patent: June 30, 2009
    Assignee: Juniper Networks, Inc.
    Inventors: Sreeram Veeragandham, Rami Rahim, Song Zhang, Anurag P. Gupta, Jorge Cruz-Rios, Jayabharat Boddu, Jeffrey R. Zimmer, Jia-Chang Wang, Srihari Shoroff, Chi-Chung K. Chen
  • Publication number: 20090104343
    Abstract: Systems and methods for applying liquid coating materials to a substrate, such as an electronic component or circuit board. A control system (18, 24, 26) of a coating system (10) controls an applicator (16) and a robot (14) moving the applicator (16) to apply the liquid coating material to the substrate (12) in accordance with the information contained in a coating program. The control system (18, 24, 26) determines a volume of liquid coating material actually dispensed onto the substrate (12) during the coating program, and compares the dispensed volume to a desired dispensed volume of liquid coating material to produce an error signal representing the difference between the calculated and desired volume values. The control system (18, 24, 26) uses the error signal to change the dispensed volume of liquid coating material on a subsequent substrate by a future coating program.
    Type: Application
    Filed: June 21, 2007
    Publication date: April 23, 2009
    Applicant: NORDSON CORPORATION
    Inventors: Kenneth S. Espenschied, Patrick T. Hogan, Jorge Cruz, David Ruf
  • Patent number: 7375168
    Abstract: Siliceous materials were prepared by adding one or more additives, including one or more water soluble polymers, and derivatives thereof, as well as trifunctional silanes, to sols containing tetraalkoxysilanes derived from polyols. The polymers facilitate phase separation of the growing silica gel matrix, leading to high surface area self-supporting silica gels with cure occurring at ambient temperatures. The materials also show a significant reduction in shrinkage properties and significant protein stabilization abilities.
    Type: Grant
    Filed: April 1, 2004
    Date of Patent: May 20, 2008
    Assignee: McMaster University
    Inventors: Zheng Zhang, Yang Chen, Jorge Cruz-Aguado, Richard J. Hodgson, Dina Tleugabulova, John D. Brennan, Michael A. Brook
  • Patent number: 7346001
    Abstract: A method for processing high priority packets and low priority packets in a network device includes performing arbitration on high priority packets until no high priority packets remain. Arbitration then is enabled on low priority packets. A packet size associated with the selected low priority packet is compared with a programmable threshold. Low priority packets are excluded from subsequent arbitration for a programmable duration when the packet size exceeds the programmable threshold.
    Type: Grant
    Filed: September 5, 2006
    Date of Patent: March 18, 2008
    Assignee: Juniper Networks, Inc.
    Inventors: Song Zhang, Jorge Cruz-Rios, Anurag P. Gupta
  • Patent number: 7171530
    Abstract: A system maintains a first counter value that indicates a number of times memory addresses in a memory address pool have been replenished. The system further maintains a second counter value that indicates a number of times a circular buffer has been filled with memory addresses retrieved from the memory address pool. The system ages memory addresses allocated to memory write requests based on the first and second counter values.
    Type: Grant
    Filed: March 3, 2006
    Date of Patent: January 30, 2007
    Assignee: Juniper Networks, Inc.
    Inventors: Jorge Cruz-Rios, Rami Rahim, Venkateswarlu Talapaneni, Pradeep Sindhu
  • Patent number: 7120113
    Abstract: A method for processing high priority packets and low priority packets in a network device includes performing arbitration on high priority packets until no high priority packets remain. Arbitration then is enabled on low priority packets. A packet size associated with the selected low priority packet is compared with a programmable threshold. Low priority packets are excluded from subsequent arbitration for a programmable duration when the packet size exceeds the programmable threshold.
    Type: Grant
    Filed: July 16, 2001
    Date of Patent: October 10, 2006
    Assignee: Juniper Networks, Inc.
    Inventors: Song Zhang, Jorge Cruz-Rios, Anurag P. Gupta
  • Patent number: 7039774
    Abstract: A system for managing memory includes a memory and a memory allocation unit. The memory stores a pool of memory addresses for writing data to the memory and stores a counter value. The memory allocation unit retrieves memory addresses from the pool in response to write requests from data sources. The memory allocation unit further replenishes the memory addresses in the pool when the pool is emptied and increments the counter value in response to each replenishment of the memory addresses in the pool.
    Type: Grant
    Filed: February 5, 2002
    Date of Patent: May 2, 2006
    Assignee: Juniper Networks, Inc.
    Inventors: Jorge Cruz-Rios, Rami Rahim, Venkateswarlu Talapaneni, Pradeep Sindhu
  • Publication number: 20040249082
    Abstract: Siliceous materials were prepared by adding one or more additives, including one or more water soluble polymers, and derivatives thereof, as well as trifunctional silanes, to sols containing tetraalkoxysilanes derived from polyols. The polymers facilitate phase separation of the growing silica gel matrix, leading to high surface area self-supporting silica gels with cure occurring at ambient temperatures. The materials also show a significant reduction in shrinkage properties and significant protein stabilization abilities.
    Type: Application
    Filed: April 1, 2004
    Publication date: December 9, 2004
    Applicant: McMaster University
    Inventors: Zheng Zhang, Yang Chen, Jorge Cruz-Aguado, Richard J. Hodgson, Dina Tleugabulova, John D. Brennan, Michael A. Brook
  • Patent number: 6636952
    Abstract: A network device includes systems and methods for processes streams of data. The network device stores data and addresses corresponding to the streams in a memory. The addresses store pointers to the data. Output logic within the network device determines whether an address is required to be fetched. When no address is required to be fetched, then data is read from the memory. When an address is required to be fetched, the address is fetched from the memory and data is read from the memory using the fetched address. To facilitate this, notifications may be stored corresponding to the streams and notification pointers may be used to identify ones of the notifications to be processed. A prefetch pointer may also be used to identify a notification with one or more associated addresses to be prefetched.
    Type: Grant
    Filed: June 15, 2001
    Date of Patent: October 21, 2003
    Assignee: Juniper Networks, Inc.
    Inventors: Song Zhang, Anurag P. Gupta, Raymond Lim, Jorge Cruz-Rios, Phil Lacroute
  • Patent number: D822313
    Type: Grant
    Filed: March 29, 2017
    Date of Patent: July 10, 2018
    Assignee: Frito-Lay North America, Inc.
    Inventors: Jorge Cruz Aguilar, Daniel Rodriguez Elvira