Abstract: Methods and apparatus for providing amplifier protection for a radio frequency (RF) front-end circuit. An example RF front-end circuit generally includes an amplifier with a gain, a first sensor configured to sense a first power (or voltage) of a first node coupled to an input of the amplifier, a second sensor configured to sense a second power (or voltage) of a second node coupled to an output of the amplifier, and logic coupled to the first and second sensors. The logic is generally configured to determine that the second power (or voltage) is outside a range based on the gain and the first power (or voltage) and to take an action to protect the amplifier based on the determination. By utilizing the techniques and apparatus described herein, protection can be provided to the amplifier(s) in an RF front-end circuit without significantly impacting the performance of the RF front-end circuit.

Abstract: In certain aspects, a system includes a first filter, a second filter, a dummy load, and a switching circuit coupled to the first filter, the second filter, and the dummy load, and coupled to a first antenna and a second antenna. In a first mode, the switching circuit couples the first filter and the second filter to the first antenna, and, in a second mode, the switching circuit couples the first filter and the third filter to the first antenna and couples the second filter to the second antenna. In certain aspects, the dummy load includes a third filter.

Abstract: A power amplifier bias circuit with embedded envelope detection includes a bias circuit stage coupled to an envelope detector circuit to increases a bias provided to a power amplifier as a function of an incoming envelope signal. The envelope detector circuit includes a first source/emitter follower transistor, a current source, and a filter to generate a baseband envelope signal. The current source is coupled to an output node of the first source/emitter follower transistor and the filter is also coupled to the output node of the first source/emitter follower transistor. The bias circuit stage includes one or more replica transistors that replicate transistors of the power amplifier or power amplifier core stage, an envelope detector replica transistor and a replica of the current source of the envelope detector circuit.

Abstract: A power amplifier circuit, including: an input node configured to receive a radio frequency (RF) signal; an output node configured to output an amplified RF signal; a main path switchably coupled between the input node and the output node, and including a first plurality of amplification stages to generate a first amplified RF signal; a bypass path switchably coupled between the input node and the output node, and including at least one second amplification stage to generate a second amplified RF signal; and a coupling switch configured to reuse at least a portion of the bypass path to drive the main path to generate a third amplified RF signal.

Abstract: A circuit including: a power amplifier configured to provide amplified signals to a load; an impedance matching network disposed between the power amplifier and the load, the impedance matching network comprising an adjustable impedance unit; and a feedback loop comprising a rectifier, the rectifier being coupled with an output of the power amplifier, the feedback loop further comprising and impedance control circuit configured to receive a signal from the rectifier and to control the adjustable impedance unit in response to the signal from the rectifier.

Abstract: Methods, devices, apparatuses, and systems provide an efficient architecture for multi-mode amplifier modules by combining components of parallel transmit paths and reducing the number of total components used in amplifier modules. One such an amplifier module, including a first transmit path connected in parallel to a second transmit path between an input of the amplifier module and an intermediate node. The amplifier module further includes a common path connected to the intermediate node and an output of the amplifier module. The common path includes one or more shared components for a signal routed through either the first and second transmit paths.

Abstract: A circuit including: a power amplifier configured to provide amplified signals to a load; an impedance matching network disposed between the power amplifier and the load, the impedance matching network comprising an adjustable impedance unit; and a feedback loop comprising a rectifier, the rectifier being coupled with an output of the power amplifier, the feedback loop further comprising and impedance control circuit configured to receive a signal from the rectifier and to control the adjustable impedance unit in response to the signal from the rectifier.

Abstract: A power amplifier bias circuit with embedded envelope detection includes a bias circuit stage coupled to an envelope detector circuit to increases a bias provided to a power amplifier as a function of an incoming envelope signal. The envelope detector circuit includes a first source/emitter follower transistor, a current source, and a filter to generate a baseband envelope signal. The current source is coupled to an output node of the first source/emitter follower transistor and the filter is also coupled to the output node of the first source/emitter follower transistor. The bias circuit stage includes one or more replica transistors that replicate transistors of the power amplifier or power amplifier core stage, an envelope detector replica transistor and a replica of the current source of the envelope detector circuit.

Abstract: A power amplifier circuit, including: an input node configured to receive a radio frequency (RF) signal; an output node configured to output an amplified RF signal; a main path switchably coupled between the input node and the output node, and including a first plurality of amplification stages to generate a first amplified RF signal; a bypass path switchably coupled between the input node and the output node, and including at least one second amplification stage to generate a second amplified RF signal; and a coupling switch configured to reuse at least a portion of the bypass path to drive the main path to generate a third amplified RF signal.

Abstract: Techniques to implement a filter for a selected signal path by reusing a circuit component in an unselected signal path are disclosed. In an exemplary design, an apparatus includes first, second, and third circuits. The first circuit passes a first radio frequency (RF) signal to an antenna when a first signal path is selected. The second circuit passes a second RF signal to the antenna when a second signal path is selected. The third circuit is selectively coupled to the first circuit, e.g., via a switch. The first and third circuits form a filter for the second RF signal (e.g., to attenuate a harmonic of the second RF signal) when the second signal path is selected and the first signal path is unselected. The first circuit may include a series inductor, and the third circuit may include a shunt capacitor.

Abstract: The present disclosure includes circuits and methods for wideband biasing. In one embodiment, an amplifier includes a cascode transistor between an input and an output of the amplifier. The cascode transistor receives a bias from a bias circuit comprising a resistor between the power supply and a first node, a resistor between the first node and a reference voltage, and a capacitor between the power supply and the first node. The power supply may be a modulated power supply, which is coupled through the bias circuit to a capacitance at the control terminal of the cascode transistor. An inductor is configured between a terminal of the cascode transistor and the power supply. The inductor may isolate the output from the modulated supply signal.

Abstract: The present disclosure includes circuits and methods for wideband biasing. In one embodiment, an amplifier includes a cascode transistor between an input and an output of the amplifier. The cascode transistor receives a bias from a bias circuit comprising a resistor between the power supply and a first node, a resistor between the first node and a reference voltage, and a capacitor between the power supply and the first node. The power supply may be a modulated power supply, which is coupled through the bias circuit to a capacitance at the control terminal of the cascode transistor. An inductor is configured between a terminal of the cascode transistor and the power supply. The inductor may isolate the output from the modulated supply signal.

Abstract: The present disclosure includes circuits and methods for wideband biasing. In one embodiment, an amplifiers includes a cascode transistor between an input and an output of the amplifier. The cascode transistor receives a bias from a bias circuit comprising a resistor between the power supply and a first node, a resistor between the first node and a reference voltage, and a capacitor between the power supply and the first node. The power supply may be a modulated power supply, which is coupled through the bias circuit to a capacitance at the control terminal of the cascode transistor. An inductor is configured between a terminal of the cascode transistor and the power supply. The inductor may isolate the output from the modulated supply signal.

Abstract: The present disclosure includes circuits and methods for wideband biasing. In one embodiment, an amplifiers includes a cascode transistor between an input and an output of the amplifier. The cascode transistor receives a bias from a bias circuit comprising a resistor between the power supply and a first node, a resistor between the first node and a reference voltage, and a capacitor between the power supply and the first node. The power supply may be a modulated power supply, which is coupled through the bias circuit to a capacitance at the control terminal of the cascode transistor. An inductor is configured between a terminal of the cascode transistor and the power supply. The inductor may isolate the output from the modulated supply signal.

Abstract: An impedance matching circuit with at least one tunable notch filter for a power amplifier is disclosed. The power amplifier amplifies an input radio frequency (RF) signal and provides an amplified RF signal. The impedance matching circuit performs output impedance matching for the power amplifier and includes at least one tunable notch filter. Each tunable notch filter has a notch that can be varied in frequency to provide better attenuation of an undesired signal. The at least one tunable notch filter attenuates at least one undesired signal in the amplified RF signal. The at least one tunable notch filter may include (i) a first tunable notch filter to attenuate a first undesired signal at a second harmonic of the amplified RF signal and/or (ii) a second tunable notch filter to attenuate a second undesired signal at a third harmonic of the amplified RF signal.

Abstract: Techniques for bypassing a supply voltage for an amplifier are disclosed. In an exemplary design, an apparatus includes an amplifier and an adjustable bypass circuit. The amplifier (e.g., a power amplifier) receives a supply voltage from a supply source. The adjustable bypass circuit is coupled to the supply source and provides bypassing for the supply voltage. The adjustable bypass circuit includes an adjustable capacitor or a fixed capacitor coupled to an adjustable resistor. The supply source may be (i) a power supply source providing a fixed supply voltage for the amplifier or (ii) an envelope tracker providing a variable supply voltage for the amplifier.

Abstract: Techniques for reducing undesired source degeneration inductance are disclosed. In an exemplary design, an apparatus includes first and second connections. The first connection includes a first parasitic inductance acting as a source degeneration inductance of an amplifier. The second connection includes a second parasitic inductance magnetically coupled to the first parasitic inductance to reduce the source degeneration inductance of the amplifier. The amplifier (e.g., a single-ended power amplifier) may be coupled to circuit ground via the first connection. An impedance matching circuit may be coupled to the amplifier and may include a circuit component coupled to circuit ground via the second connection. The first connection may be located sufficiently close to (e.g., within a predetermined distance of) the second connection in order to obtain the desired magnetic coupling between the first and second parasitic inductances.

Abstract: Techniques to implement a filter for a selected signal path by reusing a circuit component in an unselected signal path are disclosed. In an exemplary design, an apparatus includes first, second, and third circuits. The first circuit passes a first radio frequency (RF) signal to an antenna when a first signal path is selected. The second circuit passes a second RF signal to the antenna when a second signal path is selected. The third circuit is selectively coupled to the first circuit, e.g., via a switch. The first and third circuits form a filter for the second RF signal (e.g., to attenuate a harmonic of the second RF signal) when the second signal path is selected and the first signal path is unselected. The first circuit may include a series inductor, and the third circuit may include a shunt capacitor.

Abstract: Techniques for bypassing a supply voltage for an amplifier are disclosed. In an exemplary design, an apparatus includes an amplifier and an adjustable bypass circuit. The amplifier (e.g., a power amplifier) receives a supply voltage from a supply source. The adjustable bypass circuit is coupled to the supply source and provides bypassing for the supply voltage. The adjustable bypass circuit includes an adjustable capacitor or a fixed capacitor coupled to an adjustable resistor. The supply source may be (i) a power supply source providing a fixed supply voltage for the amplifier or (ii) an envelope tracker providing a variable supply voltage for the amplifier.

Abstract: Techniques for reducing undesired source degeneration inductance are disclosed. In an exemplary design, an apparatus includes first and second connections. The first connection includes a first parasitic inductance acting as a source degeneration inductance of an amplifier. The second connection includes a second parasitic inductance magnetically coupled to the first parasitic inductance to reduce the source degeneration inductance of the amplifier. The amplifier (e.g., a single-ended power amplifier) may be coupled to circuit ground via the first connection. An impedance matching circuit may be coupled to the amplifier and may include a circuit component coupled to circuit ground via the second connection. The first connection may be located sufficiently close to (e.g., within a predetermined distance of) the second connection in order to obtain the desired magnetic coupling between the first and second parasitic inductances.