Patents by Inventor Jose Cabanillas

Jose Cabanillas has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20130187712
    Abstract: An impedance matching circuit with at least one tunable notch filter for a power amplifier is disclosed. The power amplifier amplifies an input radio frequency (RF) signal and provides an amplified RF signal. The impedance matching circuit performs output impedance matching for the power amplifier and includes at least one tunable notch filter. Each tunable notch filter has a notch that can be varied in frequency to provide better attenuation of an undesired signal. The at least one tunable notch filter attenuates at least one undesired signal in the amplified RF signal. The at least one tunable notch filter may include (i) a first tunable notch filter to attenuate a first undesired signal at a second harmonic of the amplified RF signal and/or (ii) a second tunable notch filter to attenuate a second undesired signal at a third harmonic of the amplified RF signal.
    Type: Application
    Filed: January 23, 2012
    Publication date: July 25, 2013
    Applicant: QUALCOMM INCORPORATED
    Inventors: Jose Cabanillas, Calogero D. Presti, Babak Nejati, Guy Klemens
  • Patent number: 8433272
    Abstract: A receiver includes a jammer detector configured to detect the presence or the absence of jamming in a communication signal within a gain state. The receiver further includes an amplifier configured to amplify the communication signal in a high linearity receiving mode or a low linearity receiving mode, wherein the high linearity receiving mode corresponds with a lower gain for the gain state in the amplifier relative to that of the low linearity receiving mode. In addition, the receiver includes a processing unit coupled to the jammer detector, the processing unit being configured to control the amplifier to amplify the communication signal in either the high linearity receiving mode or the low linearity receiving mode, based on the output of the jammer detector detecting the presence or the absence of jamming in the communication signal. A method is also provided for processing a communication signal in a receiver.
    Type: Grant
    Filed: September 18, 2008
    Date of Patent: April 30, 2013
    Assignee: Qualcomm Incorporated
    Inventors: Prasad S. Gudem, Jose Cabanillas, Li-Chung Chang, Li Liu
  • Patent number: 8331978
    Abstract: A wireless communication device includes a component operating in a single frequency mode. The component includes a first differential branch that includes first input nodes and first output nodes. The first output nodes are coupled to ground. A second differential branch includes second input nodes, second output nodes, and a first planar inductor coupling a first terminal and a second terminal to ground. A third differential branch includes third input nodes, third output nodes, and a second planar inductor. The second planar inductor is formed within the first planar inductor of the second differential branch and couples a third terminal and a fourth terminal to ground. The third and fourth terminals are electrically independent from the first planar inductor and the first and second terminals. The second and third differential branches form a dual inductor circuit.
    Type: Grant
    Filed: June 26, 2012
    Date of Patent: December 11, 2012
    Assignee: QUALCOMM Incorporated
    Inventors: Maulin Pareshbhai Bhagat, John Woolfrey, Jose Cabanillas
  • Publication number: 20120264482
    Abstract: A wireless communication device includes a component operating in a single frequency mode. The component includes a first differential branch that includes first input nodes and first output nodes. The first output nodes are coupled to ground. A second differential branch includes second input nodes, second output nodes, and a first planar inductor coupling a first terminal and a second terminal to ground. A third differential branch includes third input nodes, third output nodes, and a second planar inductor. The second planar inductor is formed within the first planar inductor of the second differential branch and couples a third terminal and a fourth terminal to ground. The third and fourth terminals are electrically independent from the first planar inductor and the first and second terminals. The second and third differential branches form a dual inductor circuit.
    Type: Application
    Filed: June 26, 2012
    Publication date: October 18, 2012
    Applicant: QUALCOMM INCORPORATED
    Inventors: Maulin Pareshbhai Bhagat, John Woolfrey, Jose Cabanillas
  • Patent number: 8219060
    Abstract: This disclosure describes a dual inductor circuit, which may be particularly useful in a mixer of a wireless communication device to allow the mixer to operate for two different frequency bands or in a multi-differential branch low noise amplifier wherein each of the differential branches possess a different set of gain and linearity characteristics for a signal operating at the same frequency. The dual inductor circuit comprises an inductor-within-inductor design in which a small inductor is disposed within a large inductor. The two inductors may share a ground terminal, but are otherwise physically separated and independent from one another. Terminals of the inner inductor, for example, are not tapped from the outer inductor, which can reduce parasitic effects and electromagnetic interference relative to tapped inductor designs. The independence of the inductors also allows the different inductors to define different resonance frequencies or gain and linearity characteristics, which is desirable.
    Type: Grant
    Filed: October 26, 2010
    Date of Patent: July 10, 2012
    Assignee: Qualcomm Incorporated
    Inventors: Maulin Pareshbhai Bhagat, John Woolfrey, Jose Cabanillas
  • Patent number: 8149050
    Abstract: Cascaded amplifiers with a transformer-based bypass mode are described. In an exemplary design, an apparatus includes first and second amplifiers and a circuit. The first amplifier (e.g., a driver amplifier) provides amplification in a high gain mode and a bypass mode. The second amplifier (e.g., a power amplifier) provides amplification in the high gain mode. The circuit is coupled between the first and second amplifiers and includes a transformer having (i) a primary coil coupled to the first amplifier and (ii) a secondary coil that provides an output signal in the bypass mode. The primary coil may be a load inductor for the first amplifier. The circuit may further include a series combination of a capacitor and a switch coupled in parallel with the primary coil, a switch coupled in series with the secondary coil, and/or a capacitor coupled in parallel with the secondary coil.
    Type: Grant
    Filed: May 19, 2010
    Date of Patent: April 3, 2012
    Assignee: QUALCOMM, Incorporated
    Inventor: Jose Cabanillas
  • Patent number: 8036623
    Abstract: This disclosure describes techniques for reducing adverse effects of TX signal leakage in a full-duplex, wireless communication device. The techniques make use of a notch filter to reject TX signal leakage in a signal processed in the RX path of the wireless communication device. The notch filter may be constructed as a complex notch filter using passive resistor and capacitor components to produce a notch frequency that attenuates TX signal leakage components in a desired signal. The notch filter may be applied to a down-converted, baseband signal produced by a passive mixer.
    Type: Grant
    Filed: July 12, 2007
    Date of Patent: October 11, 2011
    Assignee: QUALCOMM, Incorporated
    Inventors: Li-Chung Chang, Prasad S. Gudem, Jose Cabanillas
  • Publication number: 20110115565
    Abstract: Cascaded amplifiers with a transformer-based bypass mode are described. In an exemplary design, an apparatus includes first and second amplifiers and a circuit. The first amplifier (e.g., a driver amplifier) provides amplification in a high gain mode and a bypass mode. The second amplifier (e.g., a power amplifier) provides amplification in the high gain mode. The circuit is coupled between the first and second amplifiers and includes a transformer having (i) a primary coil coupled to the first amplifier and (ii) a secondary coil that provides an output signal in the bypass mode. The primary coil may be a load inductor for the first amplifier. The circuit may further include a series combination of a capacitor and a switch coupled in parallel with the primary coil, a switch coupled in series with the secondary coil, and/or a capacitor coupled in parallel with the secondary coil.
    Type: Application
    Filed: May 19, 2010
    Publication date: May 19, 2011
    Applicant: QUALCOMM INCORPORATED
    Inventor: Jose Cabanillas
  • Patent number: 7944298
    Abstract: A differential low noise amplifier (LNA) involves two main amplifying transistors biased in saturation, and two cancel transistors biased in sub-threshold. In one example, the gates of the cancel transistors are coupled to the drains of main transistors, in a symmetrical and cross-coupled fashion. The main transistors are source degenerated. Because the gates of cancel transistors are not coupled to the differential input leads of the LNA, the input capacitance of the LNA is reduced. Noise introduced into the LNA output due to the cancel transistors being biased in the sub-threshold region is reduced because there are two stages. The first stage involves the main transistors, and the second stage involves the cancel transistors. By increasing the gain of the first stage and decreasing the gain of the second stage, overall LNA gain is maintained while reducing the noise that the sub-threshold biased transistors contribute to the LNA output.
    Type: Grant
    Filed: December 18, 2007
    Date of Patent: May 17, 2011
    Assignee: QUALCOMM, Incorporated
    Inventors: Jose Cabanillas, Prasad S. Gudem, Namsoo Kim, Cristian Marcu, Anup Savla
  • Publication number: 20110105072
    Abstract: This disclosure describes a dual inductor circuit, which may be particularly useful in a mixer of a wireless communication device to allow the mixer to operate for two different frequency bands or in a multi-differential branch low noise amplifier wherein each of the differential branches possess a different set of gain and linearity characteristics for a signal operating at the same frequency. The dual inductor circuit comprises an inductor-within-inductor design in which a small inductor is disposed within a large inductor. The two inductors may share a ground terminal, but are otherwise physically separated and independent from one another. Terminals of the inner inductor, for example, are not tapped from the outer inductor, which can reduce parasitic effects and electromagnetic interference relative to tapped inductor designs. The independence of the inductors also allows the different inductors to define different resonance frequencies or gain and linearity characteristics, which is desirable.
    Type: Application
    Filed: October 26, 2010
    Publication date: May 5, 2011
    Applicant: QUALCOMM Incorporated
    Inventors: Maulin Pareshbhai Bhagat, John Woolfrey, Jose Cabanillas
  • Patent number: 7848713
    Abstract: Techniques for attenuating undesired signal components from a differential duplexer are described. The duplexer provides a differential received signal at RX+ and RX? ports. This differential received signal includes an undesired common mode signal, which may come from a transmit signal. The common mode signal is attenuated with a common mode trap in an impedance matching network coupled to the RX+ and RX? ports. The matching network includes a first passive circuit coupled between the RX+ port and a first node, a second passive circuit coupled between the RX? port and a second node, and the common mode trap coupled between the first and second nodes. In one design, the common mode trap includes a first inductor coupled between the first node and a common node, a second inductor coupled between the second node and the common node, and a capacitor coupled between the common node and circuit ground.
    Type: Grant
    Filed: September 28, 2007
    Date of Patent: December 7, 2010
    Assignee: QUALCOMM Incorporated
    Inventors: Jose Cabanillas, Prasad S. Gudem, Sai Chong Kwok, David Love
  • Publication number: 20090258624
    Abstract: A receiver includes a jammer detector configured to detect the presence or the absence of jamming in a communication signal within a gain state. The receiver further includes an amplifier configured to amplify the communication signal in a high linearity receiving mode or a low linearity receiving mode, wherein the high linearity receiving mode corresponds with a lower gain for the gain state in the amplifier relative to that of the low linearity receiving mode. In addition, the receiver includes a processing unit coupled to the jammer detector, the processing unit being configured to control the amplifier to amplify the communication signal in either the high linearity receiving mode or the low linearity receiving mode, based on the output of the jammer detector detecting the presence or the absence of jamming in the communication signal. A method is also provided for processing a communication signal in a receiver.
    Type: Application
    Filed: September 18, 2008
    Publication date: October 15, 2009
    Applicant: QUALCOMM INCORPORATED
    Inventors: Prasad S. Gudem, Jose Cabanillas, Li-Chung Chang, Li Liu
  • Publication number: 20090153244
    Abstract: A differential low noise amplifier (LNA) involves two main amplifying transistors biased in saturation, and two cancel transistors biased in sub-threshold. In one example, the gates of the cancel transistors are coupled to the drains of main transistors, in a symmetrical and cross-coupled fashion. The main transistors are source degenerated. Because the gates of cancel transistors are not coupled to the differential input leads of the LNA, the input capacitance of the LNA is reduced. Noise introduced into the LNA output due to the cancel transistors being biased in the sub-threshold region is reduced because there are two stages. The first stage involves the main transistors, and the second stage involves the cancel transistors. By increasing the gain of the first stage and decreasing the gain of the second stage, overall LNA gain is maintained while reducing the noise that the sub-threshold biased transistors contribute to the LNA output.
    Type: Application
    Filed: December 18, 2007
    Publication date: June 18, 2009
    Applicant: QUALCOMM INCORPORATED
    Inventors: Jose Cabanillas, Prasad S. Gudem, Namsoo Kim, Cristian Marcu, Anup Savla
  • Publication number: 20090068963
    Abstract: Techniques for attenuating undesired signal components from a differential duplexer are described. The duplexer provides a differential received signal at RX+ and RX? ports. This differential received signal includes an undesired common mode signal, which may come from a transmit signal. The common mode signal is attenuated with a common mode trap in an impedance matching network coupled to the RX+ and RX? ports. The matching network includes a first passive circuit coupled between the RX+ port and a first node, a second passive circuit coupled between the RX? port and a second node, and the common mode trap coupled between the first and second nodes. In one design, the common mode trap includes a first inductor coupled between the first node and a common node, a second inductor coupled between the second node and the common node, and a capacitor coupled between the common node and circuit ground.
    Type: Application
    Filed: September 28, 2007
    Publication date: March 12, 2009
    Applicant: QUALCOMM INCORPORATED
    Inventors: Jose Cabanillas, Prasad S. Gudem, Sai Chong Kwok, David Love
  • Publication number: 20080227409
    Abstract: This disclosure describes techniques for reducing adverse effects of TX signal leakage in a full-duplex, wireless communication device. The techniques make use of a notch filter to reject TX signal leakage in a signal processed in the RX path of the wireless communication device. The notch filter may be constructed as a complex notch filter using passive resistor and capacitor components to produce a notch frequency that attenuates TX signal leakage components in a desired signal. The notch filter may be applied to a down-converted, baseband signal produced by a passive mixer.
    Type: Application
    Filed: July 12, 2007
    Publication date: September 18, 2008
    Applicant: QUALCOMM INCORPORATED
    Inventors: Li-Chung Chang, Prasad S. Gudem, Jose Cabanillas
  • Patent number: 7154349
    Abstract: A multi-band VCO employs a coupled-inductor based resonator having N?2 ports. Each port has an inductor and at least one capacitor. The N inductors for the N ports are magnetically coupled. The inductors/ports may be selectively enabled and disabled to allow the VCO to operate at different frequency bands. The capacitor(s) for each port may include one or more fixed capacitors, one or more variable capacitors (varactors), one or more switchable capacitors, or any combination of fixed, variable, and switchable capacitors. The switchable capacitors (if any) in the enabled ports may be selectively enabled and disabled to vary the VCO oscillation frequency. The varactors (if any) in the enabled ports can vary the oscillation frequency to lock the VCO to a desired frequency. The multi-band VCO may be implemented with various oscillator topologies and can replace multiple single-band VCOs.
    Type: Grant
    Filed: November 4, 2004
    Date of Patent: December 26, 2006
    Assignee: Qualcomm, Incorporated
    Inventor: Jose Cabanillas
  • Publication number: 20060033587
    Abstract: A multi-band VCO employs a coupled-inductor based resonator having N?2 ports. Each port has an inductor and at least one capacitor. The N inductors for the N ports are magnetically coupled. The inductors/ports may be selectively enabled and disabled to allow the VCO to operate at different frequency bands. The capacitor(s) for each port may include one or more fixed capacitors, one or more variable capacitors (varactors), one or more switchable capacitors, or any combination of fixed, variable, and switchable capacitors. The switchable capacitors (if any) in the enabled ports may be selectively enabled and disabled to vary the VCO oscillation frequency. The varactors (if any) in the enabled ports can vary the oscillation frequency to lock the VCO to a desired frequency. The multi-band VCO may be implemented with various oscillator topologies and can replace multiple single-band VCOs.
    Type: Application
    Filed: November 4, 2004
    Publication date: February 16, 2006
    Inventor: Jose Cabanillas