Patents by Inventor Jose P. Allarey

Jose P. Allarey has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Method, Apparatus, and System for optimizing Frequency and Performance in a Multi-Die Microprocessor
    Publication number: 20090132844
    Abstract: With the progress toward multi-core processors, each core is can not readily ascertain the status of the other dies with respect to an idle or active status. A proposal for utilizing an interface to transmit core status among multiple cores in a multi-die microprocessor is discussed. Consequently, this facilitates thermal management by allowing an optimal setting for setting performance and frequency based on utilizing each core status.
    Type: Application
    Filed: November 15, 2007
    Publication date: May 21, 2009
    Inventors: Jose P Allarey, Varghese George, Sanjeev Jahagirdar, Oren Lamdan, Ofer J. Nathan, Tomer Ziv
  • Dynamic power reduction
    Publication number: 20080244294
    Abstract: Some embodiments of the invention include systems, apparatuses, and methods for dynamically reducing requested supply voltage based on idle functional blocks.
    Type: Application
    Filed: March 29, 2007
    Publication date: October 2, 2008
    Inventor: Jose P. Allarey