Patents by Inventor Jose Tejada
Jose Tejada has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8400862Abstract: Embodiments of the present invention may provide a power-gating switch circuit. The power-gating switch circuit may comprise a first switch to connect a power supply to a virtual power supply and a second switch to connect the power supply to the virtual power supply in parallel to the first switch. The first switch may have a higher impedance than the second switch. When a wake up signal is received, the first switch may be turned on first and the second switch may be turned on after the virtual power supply reaches a predetermined voltage level.Type: GrantFiled: October 8, 2010Date of Patent: March 19, 2013Assignee: Analog Devices, Inc.Inventor: Jose Tejada
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Patent number: 8400545Abstract: This invention is an amplification circuit which limits increased power consumption and circuit surface area use and an imaging device including this amplification circuit. After initially discharging a capacitor, a signal charge corresponding to the difference between pixel signals is transferred repeatedly to the capacitor during an integration phase storing a signal charge proportional to the number of repetitions. The output of amplification is the signal charge accumulated in the capacitor. The gain is independent of the capacitor capacitance ratio. Thus the capacitor size can be smaller than conventional amplification circuits.Type: GrantFiled: February 8, 2010Date of Patent: March 19, 2013Assignee: Texas Instruments IncorporatedInventors: Jose Tejada, Rafael Dominguez-Castro, Fernando Medeiro-Hidalgo, Francisco J. Jimenez-Garrido
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Publication number: 20120313696Abstract: Embodiments of the present invention may provide a power supply system that uses a capacitive voltage divider to selectively monitor various power supplies on an IC chip. The power supply system may sample a monitored power supply to a capacitor and select certain capacitors from a set of switched capacitors to divide down the sampled voltage. The resulting voltage may be compared to a voltage reference. Using different selections of switched capacitors, the monitored power supply may be compared for different voltage levels. The ratio of the sampling capacitor to the selected capacitors may determine a voltage level the comparator will trigger. Further, based on the monitored power supply level, the power supply system may turn on a switch between an external power supply and a regulated digital power supply to charge the regulated digital power supply while a main LDO is turned off.Type: ApplicationFiled: June 13, 2011Publication date: December 13, 2012Applicant: ANALOG DEVICES, INC.Inventors: José TEJADA, Alberto SANCHEZ
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Patent number: 8264568Abstract: This invention is an image pickup device that realizes a wide dynamic range while minimizing circuit area using a pixel array that can pick up a low-sensitivity image and a high-sensitivity image. This invention obtains information (S1/S2) needed for generating a correction coefficient using one more than the number of pixels readout circuits (RC1 to RCn+1). This significantly reduces the circuit area compared with the case of using twice as many readout circuits as pixels for generating the correction coefficient.Type: GrantFiled: February 4, 2010Date of Patent: September 11, 2012Assignee: Texas Instruments IncorporatedInventors: Jose Tejada, Rafael Dominguez-Castro, Fernando Medeiro-Hidalgo, Francisco J. Jimenez-Garrido
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Patent number: 8218044Abstract: The objective of this invention is to provide a solid-state imaging device and drive method with which sampling before the output values from pixels have reached a constant value can be avoided.Type: GrantFiled: August 26, 2009Date of Patent: July 10, 2012Assignee: Texas Instruments IncorporatedInventors: Hirokazu Sawada, Jose Tejada
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Patent number: 8189079Abstract: In recent years, the performance of CMOS and CCD image sensors has dramatically improved, and to utilize the improved performance of these sensors, processing circuitry is provided here. This processing circuitry employs a adjustable gain that varies depending on the intensity of the signal from the image sensor so as to reduce noise, reduce area used, and reduce power consumption.Type: GrantFiled: July 31, 2009Date of Patent: May 29, 2012Assignee: Texas Instruments IncorporatedInventors: Jose Tejada, Rafael Dominguez-Castro, Fernando Medeiro, Francisco J. Jimenez
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Publication number: 20120087199Abstract: Embodiments of the present invention may provide a power-gating switch circuit. The power-gating switch circuit may comprise a first switch to connect a power supply to a virtual power supply and a second switch to connect the power supply to the virtual power supply in parallel to the first switch. The first switch may have a lower impedance than the second switch. When a wake up signal is received, the second switch may be turned on first and the first switch may be turned on after the virtual power supply reaches a predetermined voltage level.Type: ApplicationFiled: October 8, 2010Publication date: April 12, 2012Applicant: ANALOG DEVICES, INC.Inventor: Jose TEJADA
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Publication number: 20120079023Abstract: A system and method for generating a ghost profile is disclosed. The ghost profile allows a user to use certain features in a social network without converting to a social network profile. Specifically, the ghost profiles are unsearchable and comments that originate from a ghost profile user are displayed as partial names. The ghost profile is generated when a member of the social network invites a user to join. In one example, the member is automatically added as a friend to the user's ghost profile.Type: ApplicationFiled: September 27, 2011Publication date: March 29, 2012Applicant: GOOGLE INC.Inventors: Eduardo Jose Tejada-Gamero, Eduardo Thuler, Diego de Assis Monteiro Fernandes, Fernando Antonio Fernandes, JR., Bruno Maciel Fonseca
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Patent number: 8054358Abstract: This invention improves linearity of a solid-state image pickup device beyond that of the prior art source follower to improve image quality. The image pickup device has plural pixels disposed in an array. Each pixel includes: a photodiode (PD); a transfer transistor (Tr1); a floating diffusion (FD); and an amplification transistor (Tr4). A compensating circuit has an amplifier (AP) receiving the output of the amplification transistor (Tr4), and a compensating transistor (M2) matched to the pixel amplification transistor (Tr4). Compensation is provided using negative feedback in the amplifier (AP).Type: GrantFiled: November 21, 2008Date of Patent: November 8, 2011Assignee: Texas Instruments IncorporatedInventors: Hirokazu Sawada, Jose Tejada
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Publication number: 20100277623Abstract: This invention is an image pickup device that realizes a wide dynamic range while minimizing circuit area using a pixel array that can pick up a low-sensitivity image and a high-sensitivity image. This invention obtains information (S1/S2) needed for generating a correction coefficient using one more than the number of pixels readout circuits (RC1 to RCn+1). This significantly reduces the circuit area compared with the case of using twice as many readout circuits as pixels for generating the correction coefficient.Type: ApplicationFiled: February 4, 2010Publication date: November 4, 2010Applicant: TEXAS INSTRUMENTS INCORPORATEDInventors: Jose Tejada, Rafael Dominguez-Castro, Fernando Medeiro-Hidalgo, Francisco J. Jimenez-Garrido
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Publication number: 20100265373Abstract: The objective of this invention is to provide a solid-state image pickup device and its driving method that has a minimum circuit area and a wide dynamic range. The invention includes: a sensor array SA; a memory M; and a signal determination circuit DC. The sensor array has plural pixels in an array integrated on a semiconductor substrate. Each pixel sequentially outputs a first signal and a second signal. The memory M is connected to each column of pixels array and stores the first signal or the second signal. The signal determination circuit DC outputs signal (SS) such that it works as follows: when the first signal is input to memory M from the pixel, the signal determination circuit DC determines whether the first signal can be used. If so, the first signal is selected and the second signal is discarded and is not output to memory M. When the second signal is selected, the second signal is uploaded to memory M.Type: ApplicationFiled: February 8, 2010Publication date: October 21, 2010Applicant: TEXAS INSTRUMENTS INCORPORATEDInventors: Jose Tejada, Rafael Dominguez-Castro, Fernando Medeiro-Hidalgo, Francisco J. Jimenez-Garrido
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Publication number: 20100259661Abstract: This invention is an amplification circuit which limits increased power consumption and circuit surface area use and an imaging device including this amplification circuit. After initially discharging a capacitor, a signal charge corresponding to the difference between pixel signals is transferred repeatedly to the capacitor during an integration phase storing a signal charge proportional to the number of repetitions. The output of amplification is the signal charge accumulated in the capacitor. The gain is independent of the capacitor capacitance ratio. Thus the capacitor size can be smaller than conventional amplification circuits.Type: ApplicationFiled: February 8, 2010Publication date: October 14, 2010Applicant: TEXAS INSTRUMENTS INCORPORATEDInventors: Jose Tejada, Rafael Dominguez-Castro, Fernando Medeiro-Hidalgo, Francisco J. Jimenez-Garrido
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Publication number: 20100194954Abstract: This invention targets improvement in CMOS sensors using a multiplexed read-out architecture in which pixels are output at the pixel VN level instead of the line/reference amplifier level. The pixel signal voltage VN and offset voltage VNS are read sequentially, eliminating the differential structure. Interference rejection, usually achieved by a differential signal, is obtained by using a CDS (Correlated Double Sampler) in the same way as in the prior art.Type: ApplicationFiled: February 5, 2009Publication date: August 5, 2010Inventor: Jose Tejada-Gomez
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Publication number: 20100053392Abstract: The objective of this invention is to provide a solid-state imaging device and drive method with which sampling before the output values from pixels have reached a constant value can be avoided.Type: ApplicationFiled: August 26, 2009Publication date: March 4, 2010Applicant: Texas Instruments IncorporatedInventors: Hirokazu Sawada, Jose Tejada
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Publication number: 20100039544Abstract: In recent years, the performance of CMOS and CCD image sensors has dramatically improved, and to utilize the improved performance of these sensors, processing circuitry is provided here. This processing circuitry employs a adjustable gain that varies depending on the intensity of the signal from the image sensor so as to reduce noise, reduce area used, and reduce power consumption.Type: ApplicationFiled: July 31, 2009Publication date: February 18, 2010Applicant: Texas Instruments IncorporatedInventors: Jose Tejada, Rafael Dominguez-Castro, Fernando Medeiro, Francisco J. Jimenez
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Publication number: 20090128679Abstract: This invention improves linearity of a solid-state image pickup device beyond that of the prior art source follower to improve image quality. The image pickup device has plural pixels disposed in an array. Each pixel includes: a photodiode (PD); a transfer transistor (Tr1); a floating diffusion (FD); and an amplification transistor (Tr4). A compensating circuit has an amplifier (AP) receiving the output of the amplification transistor (Tr4), and a compensating transistor (M2) matched to the pixel amplification transistor (Tr4). Compensation is provided using negative feedback in the amplifier (AP).Type: ApplicationFiled: November 21, 2008Publication date: May 21, 2009Inventors: Hirokazu Sawada, Jose Tejada