Patents by Inventor Josef Kramer
Josef Kramer has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20220213675Abstract: A toilet device with inspection functions, highly controllable cleaning, drying, visual observation and reporting functions. Certain embodiments of such observation, inspection, cleaning and drying of the user's posterior and genitals are introduced in some detail, and so are the automatic self-cleaning and drying mechanisms, structures and methods of the observation and cleaning devices. This device allows the user to take full control of observing their bowel movement as well as controlling proper cleaning and drying afterwards. In addition, toilet device embodiments are presented which can be combined with the described observation and cleaning features and which support people lacking mobility, strength or coordination or having sensory impairments by executing certain bodily motions, such as bringing the user into a more or less crouching or rocking position in order to facilitate bowel movement. For all actuations, activation via voice, push button, touch screen or joystick control are all envisioned.Type: ApplicationFiled: May 14, 2020Publication date: July 7, 2022Inventors: Karl-Josef Kramer, Werner Kramer
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Publication number: 20220123688Abstract: Embodiments of solutions for PV modules with integrated mounting systems are presented. Application of the systems are found primarily but not solely in commercial and industrial rooftop solar installations. The disclosed solutions allow for a very flexible use of said PV modules with integrated mounting systems in various installation situations, with a focus on demonstrating concepts that show direct applicability of mounting featured for adhesive as well as for ballasted solutions, as well as the combination of both. Support features that enable ergonomic transport and installation are highlighted. Features for alignment, for providing structural strength as well as reliable, strong, yet accommodating interlinkage of PV modules are disclosed. The use of polymeric or fiber reinforced polymeric frames and mounting structures eliminates the need for grounding. Features are presented which a focus on not requiring tooling or hardware along with the installation.Type: ApplicationFiled: March 4, 2020Publication date: April 21, 2022Applicant: LITESPEED ENERGY, INC.Inventors: Gianluigi Mascolo, Karl-Josef Kramer
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Publication number: 20210310227Abstract: A toilet device with inspection functions, with highly controllable cleaning, drying and reporting functions is presented. Said device is geared towards users with impaired mobility and sensory functions, such as overweight people, people lacking strength or reach, as well as, and in particular, paraplegic and quadriplegic users with sensory impairments. This device allows the user to take full control of observing their bowel movement as well as controlling proper cleaning and drying afterwards, including optional post drying treatments such as using lotions in inflamed areas. Voice activation, push button, touch screen and joystick control allow for direct, flexible and reliable control of the implemented functions, despite a user's potential impairments. Logging and reporting to caretakers or doctors provides possibility for quick interaction and feedback, as well as tracking diet incompatibilities when coupled to or compared with a user's diet diary.Type: ApplicationFiled: July 31, 2019Publication date: October 7, 2021Inventor: Karl-Josef KRAMER
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Patent number: 10829864Abstract: This disclosure enables high-productivity controlled fabrication of uniform porous semiconductor layers (made of single layer or multi-layer porous semiconductors such as porous silicon, comprising single porosity or multi-porosity layers). Some applications include fabrication of MEMS separation and sacrificial layers for die detachment and MEMS device fabrication, membrane formation and shallow trench isolation (STI) porous silicon (using porous silicon formation with an optimal porosity and its subsequent oxidation). Further, this disclosure is applicable to the general fields of photovoltaics, MEMS, including sensors and actuators, stand-alone, or integrated with integrated semiconductor microelectronics, semiconductor microelectronics chips and optoelectronics.Type: GrantFiled: December 21, 2017Date of Patent: November 10, 2020Assignee: TruTag Technologies, Inc.Inventors: Karl-Josef Kramer, Mehrdad M. Moslehi, Subramanian Tamilmani, George Kamian, Jay Ashjaee, Takao Yonehara
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Publication number: 20190223991Abstract: A cleaning device provides for quick, thorough and pleasant multi-parallel cleaning of teeth and gums through use of a pressurized cleaning liquid, applied to teeth and gums by a cleaning headpiece with a plurality of cleaning nozzles and with optimized and practical geometry as well as readily applicable control of the clean by the user. Sensations of suffocating or drowning, which can be serious detriments and hindrances of prior art devices, are effectively overcome. In a preferred embodiment, teeth are cleaned in two steps, where each step cleans the teeth and gums in just over one side of the user's jaws. The device can simply be extracted, flipped by 180 degrees and reinserted into the mouth between the two steps.Type: ApplicationFiled: October 4, 2017Publication date: July 25, 2019Inventor: Karl-Josef KRAMER
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Patent number: 10181535Abstract: Fabrication methods and structures relating to backplanes for back contact solar cells that provide for solar cell substrate reinforcement and electrical interconnects are described. The method comprises depositing an interdigitated pattern of base electrodes and emitter electrodes on a backside surface of a semiconductor substrate, forming electrically conductive emitter plugs and base plugs on the interdigitated pattern, and attaching a backplane having a second interdigitated pattern of base electrodes and emitter electrodes at the conductive emitter and base plugs to form electrical interconnects.Type: GrantFiled: February 2, 2015Date of Patent: January 15, 2019Assignee: Tesla, Inc.Inventors: Mehrdad M. Moslehi, David Xuan-Qi Wang, Karl-Josef Kramer, Sean M. Seutter, Sam Tone Tor, Anthony Calcaterra
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Publication number: 20180347063Abstract: This disclosure enables high-productivity controlled fabrication of uniform porous semiconductor layers (made of single layer or multi-layer porous semiconductors such as porous silicon, comprising single porosity or multi-porosity layers). Some applications include fabrication of MEMS separation and sacrificial layers for die detachment and MEMS device fabrication, membrane formation and shallow trench isolation (STI) porous silicon (using porous silicon formation with an optimal porosity and its subsequent oxidation). Further, this disclosure is applicable to the general fields of photovoltaics, MEMS, including sensors and actuators, stand-alone, or integrated with integrated semiconductor microelectronics, semiconductor microelectronics chips and optoelectronics.Type: ApplicationFiled: December 21, 2017Publication date: December 6, 2018Inventors: Karl-Josef Kramer, Mehrdad M. Moslehi, Subramanian Tamilmani, George Kamian, Jay Ashjaee, Takao Yonehara
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Patent number: 10138565Abstract: This disclosure enables high-productivity fabrication of porous semiconductor layers (made of single layer or multi-layer porous semiconductors such as porous silicon, comprising single porosity or multi-porosity layers). Some applications include fabrication of MEMS separation and sacrificial layers for die detachment and MEMS device fabrication, membrane formation and shallow trench isolation (STI) porous silicon (using porous silicon formation with an optimal porosity and its subsequent oxidation). Further, this disclosure is applicable to the general fields of photovoltaics, MEMS, including sensors and actuators, stand-alone, or integrated with integrated semiconductor microelectronics, semiconductor microelectronics chips and optoelectronics.Type: GrantFiled: January 4, 2017Date of Patent: November 27, 2018Assignee: TruTag Technologies, Inc.Inventors: Takao Yonehara, Subramanian Tamilmani, Karl-Josef Kramer, Jay Ashjaee, Mehrdad M. Moslehi, Yasuyoshi Miyaji, Noriyuki Hayashi, Takamitsu Inahara
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Publication number: 20180323087Abstract: This disclosure enables high-productivity fabrication of porous semiconductor layers (made of single layer or multi-layer porous semiconductors such as porous silicon, comprising single porosity or multi-porosity layers). Some applications include fabrication of MEMS separation and sacrificial layers for die detachment and MEMS device fabrication, membrane formation and shallow trench isolation (STI) porous silicon (using porous silicon formation with an optimal porosity and its subsequent oxidation). Further, this disclosure is applicable to the general fields of photovoltaics, MEMS, including sensors and actuators, stand-alone, or integrated with integrated semiconductor microelectronics, semiconductor microelectronics chips and optoelectronics.Type: ApplicationFiled: January 4, 2017Publication date: November 8, 2018Inventors: Takao Yonehara, Subramanian Tamilmani, Karl-Josef Kramer, Jay Ashjaee, Mehrdad M. Moslehi, Yasuyoshi Miyaji, Noriyuki Hayashi, Takamitsu Inahara
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Patent number: 9890465Abstract: This disclosure enables high-productivity controlled fabrication of uniform porous semiconductor layers (made of single layer or multi-layer porous semiconductors such as porous silicon, comprising single porosity or multi-porosity layers). Some applications include fabrication of MEMS separation and sacrificial layers for die detachment and MEMS device fabrication, membrane formation and shallow trench isolation (STI) porous silicon (using porous silicon formation with an optimal porosity and its subsequent oxidation). Further, this disclosure is applicable to the general fields of photovoltaics, MEMS, including sensors and actuators, stand-alone, or integrated with integrated semiconductor microelectronics, semiconductor microelectronics chips and optoelectronics.Type: GrantFiled: December 8, 2014Date of Patent: February 13, 2018Assignee: TruTag Technologies, Inc.Inventors: Karl-Josef Kramer, Mehrdad M. Moslehi, Subramanian Tamilmani, George D. Kamian, Jay Ashjaee, Takao Yonehara
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Patent number: 9870937Abstract: High productivity thin film deposition methods and tools are provided wherein a thin film semiconductor material layer with a thickness in the range of less than 1 micron to 100 microns is deposited on a plurality of wafers in a reactor. The wafers are loaded on a batch susceptor and the batch susceptor is positioned in the reactor such that a tapered gas flow space is created between the susceptor and an interior wall of the reactor. Reactant gas is then directed into the tapered gas space and over each wafer thereby improving deposition uniformity across each wafer and from wafer to wafer.Type: GrantFiled: June 9, 2011Date of Patent: January 16, 2018Assignee: OB Realty, LLCInventors: Mehrdad M. Moslehi, Karl-Josef Kramer, Jay Ashjaee, George D. Kamian, David Mordo, Takao Yonehara
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Patent number: 9869031Abstract: This disclosure enables high-productivity fabrication of semiconductor-based separation layers (made of single layer or multi-layer porous semiconductors such as porous silicon, comprising single porosity or multi-porosity layers), optical reflectors (made of multi-layer/multi-porosity porous semiconductors such as porous silicon), formation of porous semiconductor (such as porous silicon) for anti-reflection coatings, passivation layers, and multi-junction, multi-band-gap solar cells (for instance, by forming a variable band gap porous silicon emitter on a crystalline silicon thin film or wafer-based solar cell). Other applications include fabrication of MEMS separation and sacrificial layers for die detachment and MEMS device fabrication, membrane formation and shallow trench isolation (STI) porous silicon (using porous silicon formation with an optimal porosity and its subsequent oxidation).Type: GrantFiled: April 6, 2015Date of Patent: January 16, 2018Assignee: OB Realty, LLCInventors: George D. Kamian, Somnath Nag, Subramanian Tamilmani, Mehrdad M. Moslehi, Karl-Josef Kramer, Takao Yonehara
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Patent number: 9842949Abstract: Fabrication methods and structures relating to backplanes for back contact solar cells that provide for solar cell substrate reinforcement and electrical interconnects as well as Fabrication methods and structures for forming thin film back contact solar cells are described.Type: GrantFiled: August 9, 2012Date of Patent: December 12, 2017Assignee: OB REALTY, LLCInventors: Mehrdad M. Moslehi, Pawan Kapur, K.-Josef Kramer, Virendra V. Rana, Sean Seutter, Anand Deshpande, Anthony Calcaterra, Gerry Olsen, Kamran Manteghi, Thom Stalcup, George D. Kamian, David Xuan-Qi Wang, Yen-Sheng Su, Michael Wingert
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Patent number: 9806220Abstract: A back contact solar cell is described which includes a semiconductor light absorbing layer; a first-level metal layer (M1), the M1 metal layer on a back side of the light absorbing layer, the back side being opposite from a front side of the light absorbing layer designed to receive incident light; an electrically insulating backplane sheet backside of said solar cell with the M1 layer, the backplane sheet comprising a plurality of via holes that expose portions of the M1 layer beneath the backplane sheet; and an M2 layer in contact with the backplane sheet, the M2 layer made of a sheet of pre-fabricated metal foil material comprising a thickness of between 5-250 ?m, the M2 layer electrically connected to the M1 layer through the via holes in the backplane sheet.Type: GrantFiled: November 12, 2014Date of Patent: October 31, 2017Assignee: OB REALTY, LLCInventors: Mehrdad M. Moslehi, Thom Stalcup, Karl-Josef Kramer, Anthony Calcaterra, Virendra V. Rana, Sean M. Seutter, Pawan Kapur, Michael Wingert
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Publication number: 20170278991Abstract: Fabrication methods and structures relating to multi-level metallization for solar cells as well as fabrication methods and structures for forming thin film back contact solar cells are provided.Type: ApplicationFiled: April 3, 2017Publication date: September 28, 2017Inventors: Mehrdad M. Moslehi, Pawan Kapur, Karl-Josef Kramer, Thom Stalcup
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Patent number: 9771662Abstract: This disclosure enables high-productivity fabrication of porous semiconductor layers (made of single layer or multi-layer porous semiconductors such as porous silicon, comprising single porosity or multi-porosity layers). Some applications include fabrication of MEMS separation and sacrificial layers for die detachment and MEMS device fabrication, membrane formation and shallow trench isolation (STI) porous silicon (using porous silicon formation with an optimal porosity and its subsequent oxidation). Further, this disclosure is applicable to the general fields of photovoltaics, MEMS, including sensors and actuators, stand-alone, or integrated with integrated semiconductor microelectronics, semiconductor microelectronics chips and optoelectronics.Type: GrantFiled: July 6, 2015Date of Patent: September 26, 2017Assignee: OB REALTY, LLCInventors: Takao Yonehara, Subramanian Tamilmani, Karl-Josef Kramer, Jay Ashjaee, Mehrdad M. Moslehi, Yasuyoshi Miyaji, Noriyuki Hayashi, Takamitsu Inahara
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Publication number: 20170243767Abstract: This disclosure enables high-productivity fabrication of porous semiconductor layers (made of single layer or multi-layer porous semiconductors such as porous silicon, comprising single porosity or multi-porosity layers). Some applications include fabrication of MEMS separation and sacrificial layers for die detachment and MEMS device fabrication, membrane formation and shallow trench isolation (STI) porous silicon (using porous silicon formation with an optimal porosity and its subsequent oxidation). Further, this disclosure is applicable to the general fields of photovoltaics, MEMS, including sensors and actuators, stand-alone, or integrated with integrated semiconductor microelectronics, semiconductor microelectronics chips and optoelectronics.Type: ApplicationFiled: January 4, 2017Publication date: August 24, 2017Inventors: Takao Yonehara, Subramanian Tamilmani, Karl-Josef Kramer, Jay Ashjaee, Mehrdad M. Moslehi, Yasuyoshi Miyaji, Noriyuki Hayashi, Takamitsu Inahara
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Publication number: 20170236954Abstract: Fabrication methods and structures relating to multi-level metallization for solar cells as well as fabrication methods and structures for forming back contact solar cells are provided.Type: ApplicationFiled: April 3, 2017Publication date: August 17, 2017Inventors: Karl-Josef Kramer, Mehrdad M. Moslehi, Pawan Kapur, Virendra V. Rana, David Dutton, Sean M. Seutter, Anthony Calcaterra, Jay Ashjaee, Takao Yonehara
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Patent number: 9515217Abstract: According to one aspect of the disclosed subject matter, a method for forming a monolithically isled back contact back junction solar cell is provided. Emitter and base contact regions are formed on a backside of a semiconductor wafer having a light receiving frontside and a backside opposite said frontside. A first level contact metallization is formed on the wafer backside and an electrically insulating backplane is attached to the semiconductor wafer backside. Isolation trenches are formed in the semiconductor wafer patterning the semiconductor wafer into a plurality of electrically isolated isles and the semiconductor wafer is thinned. A metallization structure is formed on the electrically insulating backplane electrically connecting the plurality of isles.Type: GrantFiled: February 12, 2014Date of Patent: December 6, 2016Assignee: Solexel, Inc.Inventors: Mehrdad M. Moslehi, Pawan Kapur, Karl-Josef Kramer, Michael Wingert
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Publication number: 20160336465Abstract: Back contact back junction solar cell and methods for manufacturing are provided. The back contact back junction solar cell comprises a substrate having a light capturing frontside surface with a passivation layer, a doped base region, and a doped backside emitter region with a polarity opposite the doped base region. A backside passivation layer and patterned reflective layer on the emitter form a light trapping backside mirror. An interdigitated metallization pattern is positioned on the backside of the solar cell and a permanent reinforcement provides support to the cell.Type: ApplicationFiled: November 23, 2015Publication date: November 17, 2016Inventors: Mehrdad M. Moslehi, Pawan Kapur, Karl-Josef Kramer, David Xuan-Qi Wang, Sean M. Seutter, Virendra V. Rana, Anthony Calcaterra, Emmanuel Van Kerschaver