Abstract: The present invention relates to a method of manufacturing an electrically programmable memory cell with a lateral floating gate with respect to the control gate, including the steps of forming an insulated control gate on an active area; forming a thin insulating layer around the control gate; successively depositing a thin layer of a conductive material and a layer of an insulating material; anisotropically etching the insulating material to form spacers of this material; and removing the portions of the thin conductive layer which are not coated with the spacers.

Abstract: The present invention relates to a method of manufacturing an electrically programmable memory cell with a lateral floating gate with respect to the control gate, including the steps of forming an insulated control gate on an active area; forming a thin insulating layer around the control gate; successively depositing a thin layer of a conductive material and a layer of an insulating material; anisotropically etching the insulating material to form spacers of this material; and removing the portions of the thin conductive layer which are not coated with the spacers.

Abstract: The present invention relates to a method of manufacturing an electrically programmable memory cell with a lateral floating gate with respect to the control gate, including the steps of forming an insulated control gate on an active area; forming a thin insulating layer around the control gate; successively depositing a thin layer of a conductive material and a layer of an insulating material; anisotropically etching the insulating material to form spacers of this material; and removing the portions of the thin conductive layer which are not coated with the spacers.

Abstract: An interconnect track connects, on several metallization levels, an insulated gate of a transistor to a discharge diode within an integrated circuit. The interconnect track comprises a first track element extending under the highest metallization level, having a first end connected to the gate and having a length greater than a predetermined critical length. This first track element includes an interrupted track portion at a site a first distance less than the critical length away from the first end. This point is compatible with the placement of the metallization level above, and extends between two insulating layers on the same metallization level. The two branches of the interrupted portion are mutually connected by a metallic filling contact which also extends in the insulating support layer of the metallization level immediately above that containing the interrupted track portion.

Abstract: A process for manufacturing isolated semi conductor components in a semi conductor wafer of the type used in bipolar technology. In this process, polycrystalline silicon is deposited in a recess in a silicon substrate whose walls are insulated by a silicon nitride layer except for an opening formed in this nitride layer at the bottom of said recess. Then, the polycrystalline silicon is re-epitaxied so as to become monocrystalline silicon by thermal heating from the "nucleus" formed by the underlying silicon in said opening.

Abstract: A process for manufacturing isolated semiconductor components in a semiconductor wafer of the type used in bipolar technology. In this process, polycrystalline silicon is deposited in a recess in a silicon substrate whose walls are insulated by a silicon nitride layer except for an opening formed in this nitride layer at the bottom of said recess. Then, the polycrystalline silicon is recrystallized so as to become monocrystalline silicon by thermal heating from the "nucleus" formed by the underlying silicon in said opening.

Abstract: In a method of fabrication of field-effect transistors having very small dimensions, the gate electrode is formed by a first layer of metallic silicide. Insulating embankments are formed along the lateral edges of the gate and a second layer of metallic silicide is then deposited so as to form the source and drain electrodes. At locations in which the second layer covers the first, planning by planarizing etching is performed so as to produce a structure of flat electrodes in which the gate is separated from the source and drain electrodes by a smaller interval than would be possible in the case of separation by photoetching.

Abstract: A novel MOS transistor structure comprises electrodes of metallic silicide and especially tantalum silicide. In the case of the gate electrode, the silicide is directly in contact with an insulating thin-film layer. In the case of the drain and source electrodes, the silicide is directly in contact with the monocrystalline silicon. The method of fabrication is thus simplified while avoiding the use of polycrystalline silicon.

Abstract: A process for manufacturing isolated semi conductor components in a semi conductor wafer of the type used in bipolar technology. In this process, polycrystalline silicon is deposited in a recess in a silicon substrate whose walls are insulated by a silicon nitride layer except for an opening formed in this nitride layer at the bottom of said recess. Then, the polycrystalline silicon is re-epitaxied so as to become monocrystalline silicon by thermal heating from the "nucleus" formed by the underlying silicon in said opening.

Abstract: The method consists in fabricating an MOS transistor comprising a drain region and a source region separated from each other by a bulk region of opposite doping type relative to the first two regions, in delivering the radiation to be detected into the carrier-collection region of the MOS transistor, in leaving the bulk region at a floating potential and in collecting the drain-source current of the transistor.

Abstract: The fabrication of a charge-coupled device consists in forming an insulating layer in the form of a periodic series of insulating steps, in depositing a metallic layer on alternate steps so as to form electrodes, in implanting regions doped with a type opposite to the substrate into the surface of the semiconductor by directing an ion beam through the insulating steps of small thickness which are transparent to the beam, and in connecting each electrode to a control line.

Abstract: In a method and a device for storing analog signals in integrated circuit elements, the memory elements are constituted by field-effect transistors having a number of layers of different dielectrics between the gate and the doped semiconductor substrate of the transistor. After discrete sampling of the analog signal has been performed at N points, the N amplitudes corresponding to the N points are stored in N transistors in the form of a threshold voltage.

Abstract: The invention relates to a method of controlling an optical characteristic of a material and it is concerned also with devices and image-forming means for carrying out the method.The method of control is particularly advantageous in devices comprising a plurality of points distributed in the form of a matrix. The optical characteristic K of the material is controlled by an energization having a magnitude G for a duration t, the values G and t being so selected as a function of the time response K (G, t) of the characteristic K at an energization stage of magnitude G that K (G.sub.O, t.sub.O) is equal to K.sub.O.

Abstract: Asymmetrical potential wells are created in surface zones of a first doped semiconductor forming a substrate and are of greater depth at the downstream end than at the upstream end in order to ensure unidirectional transfer of the minority carriers. Regions localized at one extremity of the surface zones and constituting the potential wells are formed by a second semiconductor having a forbidden band width which is different from that of the first semiconductor.

Abstract: In a method and a device for storing analog signals in integrated circuit elements, the memory elements are constituted by field-effect transistors having a number of layers of different dielectrics between the gate and the doped semiconductor substrate of the transistor. After discrete sampling of the analog signal has been performed at N points, the N amplitudes corresponding to the N points are stored in N transistors in the form of a threshold voltage.

Abstract: In a liquid crystal whose molecules have temperature-dependent dielectric anisotropy within a range such that the liquid crystal retains the same phase, the optical properties of a liquid crystal film are controlled by applying an electric field of predetermined frequency to the film and by bringing the temperature of the film to a value within the range mentioned. The dielectric anisotropy then assumes a predetermined value in respect of said frequency and the liquid crystal film assumes a predetermined optical state.

Abstract: The fabrication of a charge-coupled device consists in forming an insulating layer in the form of a periodic series of insulating steps, in depositing a metallic layer on alternate steps so as to form electrodes, in implanting regions doped with a type opposite to the substrate into the surface of the semiconductor by directing an ion beam through the insulating steps of small thickness which are transparent to the beam, and in connecting each electrode to a control line.

Abstract: In a first step, the semiconductor material is doped in a known manner with impurities having a given conductivity type and a given concentration profile. In a second step, the material is maintained at a high temperature, bombarded with a beam of particles which are accelerated with a given energy so as to penetrate into the crystal during a predetermined time interval. The resultant migration of impurities produces an increase in the impurity concentration irrespective of the sign of the initial concentration gradient within a zone adjacent to the zone of stopping of the particles.

Abstract: A method for controlling an optical characteristic of a material which is intercalated between two electrodes driven by periodic excitation signals having a zero mean value consists in applying to the electrodes signals having the same time-duration and the same recurrence frequency but in which one signal has a phase shift .phi. with respect to the other, the phase shift being modified in order to adjust the optical characteristic.

Abstract: An electrooptical display device comprising a film of liquid crystals between two systems of electrodes. One system comprises a plurality of integrated circuits forming a supporting layer on a substrate and a plurality of flat metallic electrodes deposited on the supporting layer, each electrode being connected electrically to one circuit. The other system comprises a transparent insulating plate provided on one face with a uniform coating of electrically conductive and semi-transparent material.