Abstract: An electrical connector. An electrical connector comprising a connector body having a first channel and a first conductive element extending through the first channel in a first tip section. The first tip section having a first moment arm that, when forced in contact with a first conductive surface, twists the first conductive element to produce a torsion force. The torsion force holds the first tip section in contact with the first conductive surface.

Abstract: A method of making a microelectronic connection component is disclosed. A plurality of portions of a conductive, etch-resistant material is provided on a surface of a metallic sheet. The sheet is etched from the surface to form posts extending generally parallel to one another aligned with the portions of the etch-resistant material. A microelectronic device is provided having one of a front face or a rear face overlying first ends of the posts. Second ends of the posts remote from the first ends face away from the microelectronic device as interconnection terminals for the connection component. At least some of the posts are electrically connected to the microelectronic device.

Abstract: An electrical connector. An electrical connector comprising a connector body having a first channel and a first conductive element extending through the first channel in a first tip section. The first tip section having a first moment arm that, when forced in contact with a first conductive surface, twists the first conductive element to produce a torsion force. The torsion force holds the first tip section in contact with the first conductive surface.

Abstract: An electrical interconnection device for establishing redundant contacts between the ends of two conductive elements to be mated, creating a electrical interconnection without capacitive stubs.

Abstract: A method and apparatus for constructing a packaged integrated circuit stack 40 having at least two packaged integrated circuits 44 and 45 with an interposer 42 between the packaged integrated circuits 44 and 45. Interposer 42 is provided with apertures 47 which allow adhesive 50 to flow through interposer 42 to bond packaged integrated circuits 44 and 45 together with interposer 42. Alternate embodiments provide holes 54 to allow passage of leads 56 through interposer 42 to a substrate 60 through additional connections 48. The method describes the construction of the stack.

Abstract: An ESD device with a protection structure utilizing radiated heat dissipation to prevent or reduce thermal failures. The device includes a voltage switchable polymer 10 between electrodes 11 and 12, which is configured to provide a heat radiating surface 40 for radiating heat when an ESD condition occurs. A radiation transmission material 19 is disposed between the heat radiating surface and the environment for radiating heat 20 when an ESD event occurs. One embodiment adds a spacer 50 for accurately spacing electrodes. A method for fabricating the device is further illustrated.

Abstract: Integrated circuit chips have top and bottom surfaces. The bottom surfaces comprise a plurality of IC die terminals in flip-chip assembly with fine-pitch terminals formed on the top surface of corresponding interconnection substrate. Each IC chip includes one or more through-silicon vias and/or edge wrap connectors that extend to the top surface, terminating in IC die terminals. Flexible connectors are coupled between the IC die terminals on the top surfaces of corresponding first and second integrated circuit chips. The flexible connectors are preferably controlled impedance, and may include differential pairs, including twisted pairs, coaxial pairs, and broadside pairs. Conductive vias within the interconnection substrates couple the fine-pitch terminals to corresponding next-level terminals on the bottom surface of the respective interconnection substrates. The next level terminals of the interconnection substrates are interconnected with terminals of a printed circuit board.

Abstract: An IC package having multiple surfaces for interconnection with interconnection elements making connections from the IC chip to the I/O terminations of the package assembly which reside on more than one of its surfaces and which make interconnections to other devices or assemblies that are spatially separated.

Abstract: Disclosed are IC package structures comprised of standard IC packages modified with separate circuit interconnection structures and disposed to interconnect either directly to other IC packages or to intermediate pedestal connectors which serve to support and interconnect various circuit elements, thus effectively allowing critical signals to bypass the generally less capable interconnection paths within standard interconnection substrates.

Abstract: Disclosed are low profile discrete electronic component structures that are suitable for placement and use in a vertical interconnection mode either within an electronic interconnection substrate, between interconnection substrate and electronic component or within an IC package.

Abstract: An electrical connector comprised of a plurality of electrical contacts arranged in a stair-step configuration designed to mate with electrical components having electrical contacts arranged in a stair-step configuration. A direct connect signaling system comprised of stair-step electrical connectors mated to stair-step printed circuit boards, other stair-step electrical components, or combinations thereof.

Abstract: An IC package having multiple surfaces for interconnection with interconnection elements making connections from the IC chip to the I/O terminations of the package assembly which reside on more than one of its surfaces and which make interconnections to other devices or assemblies that are spatially separated.

Abstract: A cost effective, high performance, IC package assembly of the present invention comprises stair-stepped layers of redistribution circuits from at least one chip to terminals on any of multiple surfaces and levels of the IC package assembly. Critical path circuits of the assembly have no plated vias and are directly routed from interconnection terminals which are used to interconnect the package to the IC chip terminals by flip chip or wire bond methods.

Abstract: Structures employed by a plurality of packages, printed circuit boards, connectors and interposers to create signal paths which reduce the deleterious signal quality issues associated with the use of through-holes. Disclosed structures can coexist with through-hole implementations.

Abstract: An electrical interconnection device for establishing redundant contacts between the ends of two conductive elements to be mated, creating a electrical interconnection without capacitive stubs.

Abstract: The present invention provides an electronic assembly 400 and a method for its manufacture 800, 900, 1000 1200, 1400, 1500, and 1700. The assembly 400 uses no solder. Components 406 or component packages 402, 802, 804, 806 with I/O leads 412 are placed 800 onto a planar substrate 808. The assembly is encapsulated 900 with electrically insulating material 908 with vias 420, 1002 formed or drilled 1000 through the substrate 808 to the components' leads 412. Then the assembly is plated 1200 and the encapsulation and drilling process 1500 repeated to build up desired layers 422, 1502, 1702. The planar substrate 808 may be a flexible substrate 2016 allowing bending of an assembly 2000 to fit into various enclosures.

Abstract: Disclosed are low profile discrete electronic component structures that are suitable for placement and use in a vertical interconnection mode either within an electronic interconnection substrate, between interconnection substrate and electronic component or within an IC package.

Abstract: Structures employed by a plurality of packages, printed circuit boards, connectors and interposers to create signal paths which reduce the deleterious signal quality issues associated with the use of through-holes. Disclosed structures can coexist with through-hole implementations.

Abstract: An electrical connector comprised of a plurality of electrical contacts arranged in a stair-step configuration designed to mate with electrical components having electrical contacts arranged in a stair-step configuration. A direct connect signaling system comprised of stair-step electrical connectors mated to stair-step printed circuit boards, other stair-step electrical components, or combinations thereof.

Abstract: An electrical interconnection device for establishing redundant contacts between the ends of two conductive elements to be mated, creating a electrical interconnection without capacitive stubs.